1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2014 eGauge Systems LLC 4*4882a593Smuzhiyun * Contributed by David Mosberger-Tang <davidm@egauge.net> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Platform-data structure for MAX3421 USB HCD driver. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #ifndef MAX3421_HCD_PLAT_H_INCLUDED 10*4882a593Smuzhiyun #define MAX3421_HCD_PLAT_H_INCLUDED 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * This structure defines the mapping of certain auxiliary functions to the 14*4882a593Smuzhiyun * MAX3421E GPIO pins. The chip has eight GP inputs and eight GP outputs. 15*4882a593Smuzhiyun * A value of 0 indicates that the pin is not used/wired to anything. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * At this point, the only control the max3421-hcd driver cares about is 18*4882a593Smuzhiyun * to control Vbus (5V to the peripheral). 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun struct max3421_hcd_platform_data { 21*4882a593Smuzhiyun u8 vbus_gpout; /* pin controlling Vbus */ 22*4882a593Smuzhiyun u8 vbus_active_level; /* level that turns on power */ 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif /* MAX3421_HCD_PLAT_H_INCLUDED */ 26