1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * LP8755 High Performance Power Management Unit Driver:System Interface Driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Daniel(Geon Si) Jeong <daniel.jeong@ti.com> 8*4882a593Smuzhiyun * G.Shark Jeong <gshark.jeong@gmail.com> 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef _LP8755_H 12*4882a593Smuzhiyun #define _LP8755_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <linux/regulator/consumer.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define LP8755_NAME "lp8755-regulator" 17*4882a593Smuzhiyun /* 18*4882a593Smuzhiyun *PWR FAULT : power fault detected 19*4882a593Smuzhiyun *OCP : over current protect activated 20*4882a593Smuzhiyun *OVP : over voltage protect activated 21*4882a593Smuzhiyun *TEMP_WARN : thermal warning 22*4882a593Smuzhiyun *TEMP_SHDN : thermal shutdonw detected 23*4882a593Smuzhiyun *I_LOAD : current measured 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun #define LP8755_EVENT_PWR_FAULT REGULATOR_EVENT_FAIL 26*4882a593Smuzhiyun #define LP8755_EVENT_OCP REGULATOR_EVENT_OVER_CURRENT 27*4882a593Smuzhiyun #define LP8755_EVENT_OVP 0x10000 28*4882a593Smuzhiyun #define LP8755_EVENT_TEMP_WARN 0x2000 29*4882a593Smuzhiyun #define LP8755_EVENT_TEMP_SHDN REGULATOR_EVENT_OVER_TEMP 30*4882a593Smuzhiyun #define LP8755_EVENT_I_LOAD 0x40000 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun enum lp8755_bucks { 33*4882a593Smuzhiyun LP8755_BUCK0 = 0, 34*4882a593Smuzhiyun LP8755_BUCK1, 35*4882a593Smuzhiyun LP8755_BUCK2, 36*4882a593Smuzhiyun LP8755_BUCK3, 37*4882a593Smuzhiyun LP8755_BUCK4, 38*4882a593Smuzhiyun LP8755_BUCK5, 39*4882a593Smuzhiyun LP8755_BUCK_MAX, 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /** 43*4882a593Smuzhiyun * multiphase configuration options 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun enum lp8755_mphase_config { 46*4882a593Smuzhiyun MPHASE_CONF0, 47*4882a593Smuzhiyun MPHASE_CONF1, 48*4882a593Smuzhiyun MPHASE_CONF2, 49*4882a593Smuzhiyun MPHASE_CONF3, 50*4882a593Smuzhiyun MPHASE_CONF4, 51*4882a593Smuzhiyun MPHASE_CONF5, 52*4882a593Smuzhiyun MPHASE_CONF6, 53*4882a593Smuzhiyun MPHASE_CONF7, 54*4882a593Smuzhiyun MPHASE_CONF8, 55*4882a593Smuzhiyun MPHASE_CONF_MAX 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /** 59*4882a593Smuzhiyun * struct lp8755_platform_data 60*4882a593Smuzhiyun * @mphase_type : Multiphase Switcher Configurations. 61*4882a593Smuzhiyun * @buck_data : buck0~6 init voltage in uV 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun struct lp8755_platform_data { 64*4882a593Smuzhiyun int mphase; 65*4882a593Smuzhiyun struct regulator_init_data *buck_data[LP8755_BUCK_MAX]; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun #endif 68