xref: /OK3568_Linux_fs/kernel/include/linux/platform_data/lp855x.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * LP855x Backlight Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *			Copyright (C) 2011 Texas Instruments
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _LP855X_H
9*4882a593Smuzhiyun #define _LP855X_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define BL_CTL_SHFT	(0)
12*4882a593Smuzhiyun #define BRT_MODE_SHFT	(1)
13*4882a593Smuzhiyun #define BRT_MODE_MASK	(0x06)
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* Enable backlight. Only valid when BRT_MODE=10(I2C only) */
16*4882a593Smuzhiyun #define ENABLE_BL	(1)
17*4882a593Smuzhiyun #define DISABLE_BL	(0)
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define I2C_CONFIG(id)	id ## _I2C_CONFIG
20*4882a593Smuzhiyun #define PWM_CONFIG(id)	id ## _PWM_CONFIG
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* DEVICE CONTROL register - LP8550 */
23*4882a593Smuzhiyun #define LP8550_PWM_CONFIG	(LP8550_PWM_ONLY << BRT_MODE_SHFT)
24*4882a593Smuzhiyun #define LP8550_I2C_CONFIG	((ENABLE_BL << BL_CTL_SHFT) | \
25*4882a593Smuzhiyun 				(LP8550_I2C_ONLY << BRT_MODE_SHFT))
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /* DEVICE CONTROL register - LP8551 */
28*4882a593Smuzhiyun #define LP8551_PWM_CONFIG	LP8550_PWM_CONFIG
29*4882a593Smuzhiyun #define LP8551_I2C_CONFIG	LP8550_I2C_CONFIG
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun /* DEVICE CONTROL register - LP8552 */
32*4882a593Smuzhiyun #define LP8552_PWM_CONFIG	LP8550_PWM_CONFIG
33*4882a593Smuzhiyun #define LP8552_I2C_CONFIG	LP8550_I2C_CONFIG
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /* DEVICE CONTROL register - LP8553 */
36*4882a593Smuzhiyun #define LP8553_PWM_CONFIG	LP8550_PWM_CONFIG
37*4882a593Smuzhiyun #define LP8553_I2C_CONFIG	LP8550_I2C_CONFIG
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* CONFIG register - LP8555 */
40*4882a593Smuzhiyun #define LP8555_PWM_STANDBY	BIT(7)
41*4882a593Smuzhiyun #define LP8555_PWM_FILTER	BIT(6)
42*4882a593Smuzhiyun #define LP8555_RELOAD_EPROM	BIT(3)	/* use it if EPROMs should be reset
43*4882a593Smuzhiyun 					   when the backlight turns on */
44*4882a593Smuzhiyun #define LP8555_OFF_OPENLEDS	BIT(2)
45*4882a593Smuzhiyun #define LP8555_PWM_CONFIG	LP8555_PWM_ONLY
46*4882a593Smuzhiyun #define LP8555_I2C_CONFIG	LP8555_I2C_ONLY
47*4882a593Smuzhiyun #define LP8555_COMB1_CONFIG	LP8555_COMBINED1
48*4882a593Smuzhiyun #define LP8555_COMB2_CONFIG	LP8555_COMBINED2
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* DEVICE CONTROL register - LP8556 */
51*4882a593Smuzhiyun #define LP8556_PWM_CONFIG	(LP8556_PWM_ONLY << BRT_MODE_SHFT)
52*4882a593Smuzhiyun #define LP8556_COMB1_CONFIG	(LP8556_COMBINED1 << BRT_MODE_SHFT)
53*4882a593Smuzhiyun #define LP8556_I2C_CONFIG	((ENABLE_BL << BL_CTL_SHFT) | \
54*4882a593Smuzhiyun 				(LP8556_I2C_ONLY << BRT_MODE_SHFT))
55*4882a593Smuzhiyun #define LP8556_COMB2_CONFIG	(LP8556_COMBINED2 << BRT_MODE_SHFT)
56*4882a593Smuzhiyun #define LP8556_FAST_CONFIG	BIT(7) /* use it if EPROMs should be maintained
57*4882a593Smuzhiyun 					  when exiting the low power mode */
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* CONFIG register - LP8557 */
60*4882a593Smuzhiyun #define LP8557_PWM_STANDBY	BIT(7)
61*4882a593Smuzhiyun #define LP8557_PWM_FILTER	BIT(6)
62*4882a593Smuzhiyun #define LP8557_RELOAD_EPROM	BIT(3)	/* use it if EPROMs should be reset
63*4882a593Smuzhiyun 					   when the backlight turns on */
64*4882a593Smuzhiyun #define LP8557_OFF_OPENLEDS	BIT(2)
65*4882a593Smuzhiyun #define LP8557_PWM_CONFIG	LP8557_PWM_ONLY
66*4882a593Smuzhiyun #define LP8557_I2C_CONFIG	LP8557_I2C_ONLY
67*4882a593Smuzhiyun #define LP8557_COMB1_CONFIG	LP8557_COMBINED1
68*4882a593Smuzhiyun #define LP8557_COMB2_CONFIG	LP8557_COMBINED2
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun enum lp855x_chip_id {
71*4882a593Smuzhiyun 	LP8550,
72*4882a593Smuzhiyun 	LP8551,
73*4882a593Smuzhiyun 	LP8552,
74*4882a593Smuzhiyun 	LP8553,
75*4882a593Smuzhiyun 	LP8555,
76*4882a593Smuzhiyun 	LP8556,
77*4882a593Smuzhiyun 	LP8557,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun enum lp8550_brighntess_source {
81*4882a593Smuzhiyun 	LP8550_PWM_ONLY,
82*4882a593Smuzhiyun 	LP8550_I2C_ONLY = 2,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun enum lp8551_brighntess_source {
86*4882a593Smuzhiyun 	LP8551_PWM_ONLY = LP8550_PWM_ONLY,
87*4882a593Smuzhiyun 	LP8551_I2C_ONLY = LP8550_I2C_ONLY,
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun enum lp8552_brighntess_source {
91*4882a593Smuzhiyun 	LP8552_PWM_ONLY = LP8550_PWM_ONLY,
92*4882a593Smuzhiyun 	LP8552_I2C_ONLY = LP8550_I2C_ONLY,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun enum lp8553_brighntess_source {
96*4882a593Smuzhiyun 	LP8553_PWM_ONLY = LP8550_PWM_ONLY,
97*4882a593Smuzhiyun 	LP8553_I2C_ONLY = LP8550_I2C_ONLY,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun enum lp8555_brightness_source {
101*4882a593Smuzhiyun 	LP8555_PWM_ONLY,
102*4882a593Smuzhiyun 	LP8555_I2C_ONLY,
103*4882a593Smuzhiyun 	LP8555_COMBINED1,	/* Brightness register with shaped PWM */
104*4882a593Smuzhiyun 	LP8555_COMBINED2,	/* PWM with shaped brightness register */
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun enum lp8556_brightness_source {
108*4882a593Smuzhiyun 	LP8556_PWM_ONLY,
109*4882a593Smuzhiyun 	LP8556_COMBINED1,	/* pwm + i2c before the shaper block */
110*4882a593Smuzhiyun 	LP8556_I2C_ONLY,
111*4882a593Smuzhiyun 	LP8556_COMBINED2,	/* pwm + i2c after the shaper block */
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun enum lp8557_brightness_source {
115*4882a593Smuzhiyun 	LP8557_PWM_ONLY,
116*4882a593Smuzhiyun 	LP8557_I2C_ONLY,
117*4882a593Smuzhiyun 	LP8557_COMBINED1,	/* pwm + i2c after the shaper block */
118*4882a593Smuzhiyun 	LP8557_COMBINED2,	/* pwm + i2c before the shaper block */
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct lp855x_rom_data {
122*4882a593Smuzhiyun 	u8 addr;
123*4882a593Smuzhiyun 	u8 val;
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun /**
127*4882a593Smuzhiyun  * struct lp855x_platform_data
128*4882a593Smuzhiyun  * @name : Backlight driver name. If it is not defined, default name is set.
129*4882a593Smuzhiyun  * @device_control : value of DEVICE CONTROL register
130*4882a593Smuzhiyun  * @initial_brightness : initial value of backlight brightness
131*4882a593Smuzhiyun  * @period_ns : platform specific pwm period value. unit is nano.
132*4882a593Smuzhiyun 		Only valid when mode is PWM_BASED.
133*4882a593Smuzhiyun  * @size_program : total size of lp855x_rom_data
134*4882a593Smuzhiyun  * @rom_data : list of new eeprom/eprom registers
135*4882a593Smuzhiyun  */
136*4882a593Smuzhiyun struct lp855x_platform_data {
137*4882a593Smuzhiyun 	const char *name;
138*4882a593Smuzhiyun 	u8 device_control;
139*4882a593Smuzhiyun 	u8 initial_brightness;
140*4882a593Smuzhiyun 	unsigned int period_ns;
141*4882a593Smuzhiyun 	int size_program;
142*4882a593Smuzhiyun 	struct lp855x_rom_data *rom_data;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #endif
146