1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __I2C_OMAP_H__ 3*4882a593Smuzhiyun #define __I2C_OMAP_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/platform_device.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * Version 2 of the I2C peripheral unit has a different register 9*4882a593Smuzhiyun * layout and extra registers. The ID register in the V2 peripheral 10*4882a593Smuzhiyun * unit on the OMAP4430 reports the same ID as the V1 peripheral 11*4882a593Smuzhiyun * unit on the OMAP3530, so we must inform the driver which IP 12*4882a593Smuzhiyun * version we know it is running on from platform / cpu-specific 13*4882a593Smuzhiyun * code using these constants in the hwmod class definition. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define OMAP_I2C_IP_VERSION_1 1 17*4882a593Smuzhiyun #define OMAP_I2C_IP_VERSION_2 2 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* struct omap_i2c_bus_platform_data .flags meanings */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define OMAP_I2C_FLAG_NO_FIFO BIT(0) 22*4882a593Smuzhiyun #define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) 23*4882a593Smuzhiyun #define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) 24*4882a593Smuzhiyun #define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) 25*4882a593Smuzhiyun #define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) 26*4882a593Smuzhiyun /* how the CPU address bus must be translated for I2C unit access */ 27*4882a593Smuzhiyun #define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 28*4882a593Smuzhiyun #define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) 29*4882a593Smuzhiyun #define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) 30*4882a593Smuzhiyun #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun struct omap_i2c_bus_platform_data { 33*4882a593Smuzhiyun u32 clkrate; 34*4882a593Smuzhiyun u32 rev; 35*4882a593Smuzhiyun u32 flags; 36*4882a593Smuzhiyun void (*set_mpu_wkup_lat)(struct device *dev, long set); 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40