1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * AD7266/65 SPI ADC driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2012 Analog Devices Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __IIO_ADC_AD7266_H__ 9*4882a593Smuzhiyun #define __IIO_ADC_AD7266_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /** 12*4882a593Smuzhiyun * enum ad7266_range - AD7266 reference voltage range 13*4882a593Smuzhiyun * @AD7266_RANGE_VREF: Device is configured for input range 0V - VREF 14*4882a593Smuzhiyun * (RANGE pin set to low) 15*4882a593Smuzhiyun * @AD7266_RANGE_2VREF: Device is configured for input range 0V - 2VREF 16*4882a593Smuzhiyun * (RANGE pin set to high) 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun enum ad7266_range { 19*4882a593Smuzhiyun AD7266_RANGE_VREF, 20*4882a593Smuzhiyun AD7266_RANGE_2VREF, 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /** 24*4882a593Smuzhiyun * enum ad7266_mode - AD7266 sample mode 25*4882a593Smuzhiyun * @AD7266_MODE_DIFF: Device is configured for full differential mode 26*4882a593Smuzhiyun * (SGL/DIFF pin set to low, AD0 pin set to low) 27*4882a593Smuzhiyun * @AD7266_MODE_PSEUDO_DIFF: Device is configured for pseudo differential mode 28*4882a593Smuzhiyun * (SGL/DIFF pin set to low, AD0 pin set to high) 29*4882a593Smuzhiyun * @AD7266_MODE_SINGLE_ENDED: Device is configured for single-ended mode 30*4882a593Smuzhiyun * (SGL/DIFF pin set to high) 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun enum ad7266_mode { 33*4882a593Smuzhiyun AD7266_MODE_DIFF, 34*4882a593Smuzhiyun AD7266_MODE_PSEUDO_DIFF, 35*4882a593Smuzhiyun AD7266_MODE_SINGLE_ENDED, 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /** 39*4882a593Smuzhiyun * struct ad7266_platform_data - Platform data for the AD7266 driver 40*4882a593Smuzhiyun * @range: Reference voltage range the device is configured for 41*4882a593Smuzhiyun * @mode: Sample mode the device is configured for 42*4882a593Smuzhiyun * @fixed_addr: Whether the address pins are hard-wired 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun struct ad7266_platform_data { 45*4882a593Smuzhiyun enum ad7266_range range; 46*4882a593Smuzhiyun enum ad7266_mode mode; 47*4882a593Smuzhiyun bool fixed_addr; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif 51