1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog 4*4882a593Smuzhiyun * Converter driver. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright 2012 Analog Devices Inc. 7*4882a593Smuzhiyun * Author: Lars-Peter Clausen <lars@metafoo.de> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __LINUX_PLATFORM_DATA_AD5449_H__ 11*4882a593Smuzhiyun #define __LINUX_PLATFORM_DATA_AD5449_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /** 14*4882a593Smuzhiyun * enum ad5449_sdo_mode - AD5449 SDO pin configuration 15*4882a593Smuzhiyun * @AD5449_SDO_DRIVE_FULL: Drive the SDO pin with full strength. 16*4882a593Smuzhiyun * @AD5449_SDO_DRIVE_WEAK: Drive the SDO pin with not full strength. 17*4882a593Smuzhiyun * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode. 18*4882a593Smuzhiyun * @AD5449_SDO_DISABLED: Disable the SDO pin, in this mode it is not possible to 19*4882a593Smuzhiyun * read back from the device. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun enum ad5449_sdo_mode { 22*4882a593Smuzhiyun AD5449_SDO_DRIVE_FULL = 0x0, 23*4882a593Smuzhiyun AD5449_SDO_DRIVE_WEAK = 0x1, 24*4882a593Smuzhiyun AD5449_SDO_OPEN_DRAIN = 0x2, 25*4882a593Smuzhiyun AD5449_SDO_DISABLED = 0x3, 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /** 29*4882a593Smuzhiyun * struct ad5449_platform_data - Platform data for the ad5449 DAC driver 30*4882a593Smuzhiyun * @sdo_mode: SDO pin mode 31*4882a593Smuzhiyun * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the 32*4882a593Smuzhiyun * outputs to midscale (true) or to zero scale(false). 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun struct ad5449_platform_data { 35*4882a593Smuzhiyun enum ad5449_sdo_mode sdo_mode; 36*4882a593Smuzhiyun bool hardware_clear_to_midscale; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40