1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Interface the pinmux subsystem 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2011 ST-Ericsson SA 6*4882a593Smuzhiyun * Written on behalf of Linaro for ST-Ericsson 7*4882a593Smuzhiyun * Based on bits of regulator core, gpio core and clk core 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Author: Linus Walleij <linus.walleij@linaro.org> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #ifndef __LINUX_PINCTRL_PINMUX_H 12*4882a593Smuzhiyun #define __LINUX_PINCTRL_PINMUX_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <linux/list.h> 15*4882a593Smuzhiyun #include <linux/seq_file.h> 16*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct pinctrl_dev; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /** 21*4882a593Smuzhiyun * struct pinmux_ops - pinmux operations, to be implemented by pin controller 22*4882a593Smuzhiyun * drivers that support pinmuxing 23*4882a593Smuzhiyun * @request: called by the core to see if a certain pin can be made 24*4882a593Smuzhiyun * available for muxing. This is called by the core to acquire the pins 25*4882a593Smuzhiyun * before selecting any actual mux setting across a function. The driver 26*4882a593Smuzhiyun * is allowed to answer "no" by returning a negative error code 27*4882a593Smuzhiyun * @free: the reverse function of the request() callback, frees a pin after 28*4882a593Smuzhiyun * being requested 29*4882a593Smuzhiyun * @get_functions_count: returns number of selectable named functions available 30*4882a593Smuzhiyun * in this pinmux driver 31*4882a593Smuzhiyun * @get_function_name: return the function name of the muxing selector, 32*4882a593Smuzhiyun * called by the core to figure out which mux setting it shall map a 33*4882a593Smuzhiyun * certain device to 34*4882a593Smuzhiyun * @get_function_groups: return an array of groups names (in turn 35*4882a593Smuzhiyun * referencing pins) connected to a certain function selector. The group 36*4882a593Smuzhiyun * name can be used with the generic @pinctrl_ops to retrieve the 37*4882a593Smuzhiyun * actual pins affected. The applicable groups will be returned in 38*4882a593Smuzhiyun * @groups and the number of groups in @num_groups 39*4882a593Smuzhiyun * @set_mux: enable a certain muxing function with a certain pin group. The 40*4882a593Smuzhiyun * driver does not need to figure out whether enabling this function 41*4882a593Smuzhiyun * conflicts some other use of the pins in that group, such collisions 42*4882a593Smuzhiyun * are handled by the pinmux subsystem. The @func_selector selects a 43*4882a593Smuzhiyun * certain function whereas @group_selector selects a certain set of pins 44*4882a593Smuzhiyun * to be used. On simple controllers the latter argument may be ignored 45*4882a593Smuzhiyun * @gpio_request_enable: requests and enables GPIO on a certain pin. 46*4882a593Smuzhiyun * Implement this only if you can mux every pin individually as GPIO. The 47*4882a593Smuzhiyun * affected GPIO range is passed along with an offset(pin number) into that 48*4882a593Smuzhiyun * specific GPIO range - function selectors and pin groups are orthogonal 49*4882a593Smuzhiyun * to this, the core will however make sure the pins do not collide. 50*4882a593Smuzhiyun * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of 51*4882a593Smuzhiyun * @gpio_request_enable 52*4882a593Smuzhiyun * @gpio_set_direction: Since controllers may need different configurations 53*4882a593Smuzhiyun * depending on whether the GPIO is configured as input or output, 54*4882a593Smuzhiyun * a direction selector function may be implemented as a backing 55*4882a593Smuzhiyun * to the GPIO controllers that need pin muxing. 56*4882a593Smuzhiyun * @strict: do not allow simultaneous use of the same pin for GPIO and another 57*4882a593Smuzhiyun * function. Check both gpio_owner and mux_owner strictly before approving 58*4882a593Smuzhiyun * the pin request. 59*4882a593Smuzhiyun */ 60*4882a593Smuzhiyun struct pinmux_ops { 61*4882a593Smuzhiyun int (*request) (struct pinctrl_dev *pctldev, unsigned offset); 62*4882a593Smuzhiyun int (*free) (struct pinctrl_dev *pctldev, unsigned offset); 63*4882a593Smuzhiyun int (*get_functions_count) (struct pinctrl_dev *pctldev); 64*4882a593Smuzhiyun const char *(*get_function_name) (struct pinctrl_dev *pctldev, 65*4882a593Smuzhiyun unsigned selector); 66*4882a593Smuzhiyun int (*get_function_groups) (struct pinctrl_dev *pctldev, 67*4882a593Smuzhiyun unsigned selector, 68*4882a593Smuzhiyun const char * const **groups, 69*4882a593Smuzhiyun unsigned *num_groups); 70*4882a593Smuzhiyun int (*set_mux) (struct pinctrl_dev *pctldev, unsigned func_selector, 71*4882a593Smuzhiyun unsigned group_selector); 72*4882a593Smuzhiyun int (*gpio_request_enable) (struct pinctrl_dev *pctldev, 73*4882a593Smuzhiyun struct pinctrl_gpio_range *range, 74*4882a593Smuzhiyun unsigned offset); 75*4882a593Smuzhiyun void (*gpio_disable_free) (struct pinctrl_dev *pctldev, 76*4882a593Smuzhiyun struct pinctrl_gpio_range *range, 77*4882a593Smuzhiyun unsigned offset); 78*4882a593Smuzhiyun int (*gpio_set_direction) (struct pinctrl_dev *pctldev, 79*4882a593Smuzhiyun struct pinctrl_gpio_range *range, 80*4882a593Smuzhiyun unsigned offset, 81*4882a593Smuzhiyun bool input); 82*4882a593Smuzhiyun bool strict; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #endif /* __LINUX_PINCTRL_PINMUX_H */ 86