xref: /OK3568_Linux_fs/kernel/include/linux/pinctrl/pinconf-generic.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Interface the generic pinconfig portions of the pinctrl subsystem
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 ST-Ericsson SA
6*4882a593Smuzhiyun  * Written on behalf of Linaro for ST-Ericsson
7*4882a593Smuzhiyun  * This interface is used in the core to keep track of pins.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Author: Linus Walleij <linus.walleij@linaro.org>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun #ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H
12*4882a593Smuzhiyun #define __LINUX_PINCTRL_PINCONF_GENERIC_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/pinctrl/machine.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct pinctrl_dev;
18*4882a593Smuzhiyun struct pinctrl_map;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /**
21*4882a593Smuzhiyun  * enum pin_config_param - possible pin configuration parameters
22*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
23*4882a593Smuzhiyun  *	weakly drives the last value on a tristate bus, also known as a "bus
24*4882a593Smuzhiyun  *	holder", "bus keeper" or "repeater". This allows another device on the
25*4882a593Smuzhiyun  *	bus to change the value by driving the bus high or low and switching to
26*4882a593Smuzhiyun  *	tristate. The argument is ignored.
27*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
28*4882a593Smuzhiyun  *	transition from say pull-up to pull-down implies that you disable
29*4882a593Smuzhiyun  *	pull-up in the process, this setting disables all biasing.
30*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
31*4882a593Smuzhiyun  *	mode, also know as "third-state" (tristate) or "high-Z" or "floating".
32*4882a593Smuzhiyun  *	On output pins this effectively disconnects the pin, which is useful
33*4882a593Smuzhiyun  *	if for example some other pin is going to drive the signal connected
34*4882a593Smuzhiyun  *	to it for a while. Pins used for input are usually always high
35*4882a593Smuzhiyun  *	impedance.
36*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
37*4882a593Smuzhiyun  *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
38*4882a593Smuzhiyun  *	if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
39*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
40*4882a593Smuzhiyun  *	on embedded knowledge of the controller hardware, like current mux
41*4882a593Smuzhiyun  *	function. The pull direction and possibly strength too will normally
42*4882a593Smuzhiyun  *	be decided completely inside the hardware block and not be readable
43*4882a593Smuzhiyun  *	from the kernel side.
44*4882a593Smuzhiyun  *	If the argument is != 0 pull up/down is enabled, if it is 0, the
45*4882a593Smuzhiyun  *	configuration is ignored. The proper way to disable it is to use
46*4882a593Smuzhiyun  *	@PIN_CONFIG_BIAS_DISABLE.
47*4882a593Smuzhiyun  * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
48*4882a593Smuzhiyun  *	impedance to VDD). If the argument is != 0 pull-up is enabled,
49*4882a593Smuzhiyun  *	if it is 0, pull-up is total, i.e. the pin is connected to VDD.
50*4882a593Smuzhiyun  * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
51*4882a593Smuzhiyun  *	collector) which means it is usually wired with other output ports
52*4882a593Smuzhiyun  *	which are then pulled up with an external resistor. Setting this
53*4882a593Smuzhiyun  *	config will enable open drain mode, the argument is ignored.
54*4882a593Smuzhiyun  * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
55*4882a593Smuzhiyun  *	(open emitter). Setting this config will enable open source mode, the
56*4882a593Smuzhiyun  *	argument is ignored.
57*4882a593Smuzhiyun  * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
58*4882a593Smuzhiyun  *	low, this is the most typical case and is typically achieved with two
59*4882a593Smuzhiyun  *	active transistors on the output. Setting this config will enable
60*4882a593Smuzhiyun  *	push-pull mode, the argument is ignored.
61*4882a593Smuzhiyun  * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
62*4882a593Smuzhiyun  *	passed as argument. The argument is in mA.
63*4882a593Smuzhiyun  * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current
64*4882a593Smuzhiyun  *	passed as argument. The argument is in uA.
65*4882a593Smuzhiyun  * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
66*4882a593Smuzhiyun  *	which means it will wait for signals to settle when reading inputs. The
67*4882a593Smuzhiyun  *	argument gives the debounce time in usecs. Setting the
68*4882a593Smuzhiyun  *	argument to zero turns debouncing off.
69*4882a593Smuzhiyun  * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input.  Note that this does not
70*4882a593Smuzhiyun  *	affect the pin's ability to drive output.  1 enables input, 0 disables
71*4882a593Smuzhiyun  *	input.
72*4882a593Smuzhiyun  * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
73*4882a593Smuzhiyun  *	schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
74*4882a593Smuzhiyun  *	the threshold value is given on a custom format as argument when
75*4882a593Smuzhiyun  *	setting pins to this mode.
76*4882a593Smuzhiyun  * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
77*4882a593Smuzhiyun  *      If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
78*4882a593Smuzhiyun  *      schmitt-trigger mode is disabled.
79*4882a593Smuzhiyun  * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power
80*4882a593Smuzhiyun  *	operation, if several modes of operation are supported these can be
81*4882a593Smuzhiyun  *	passed in the argument on a custom form, else just use argument 1
82*4882a593Smuzhiyun  *	to indicate low power mode, argument 0 turns low power mode off.
83*4882a593Smuzhiyun  * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
84*4882a593Smuzhiyun  * 	without driving a value there. For most platforms this reduces to
85*4882a593Smuzhiyun  * 	enable the output buffers and then let the pin controller current
86*4882a593Smuzhiyun  * 	configuration (eg. the currently selected mux function) drive values on
87*4882a593Smuzhiyun  * 	the line. Use argument 1 to enable output mode, argument 0 to disable
88*4882a593Smuzhiyun  * 	it.
89*4882a593Smuzhiyun  * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
90*4882a593Smuzhiyun  * 	value on the line. Use argument 1 to indicate high level, argument 0 to
91*4882a593Smuzhiyun  *	indicate low level. (Please see Documentation/driver-api/pinctl.rst,
92*4882a593Smuzhiyun  *	section "GPIO mode pitfalls" for a discussion around this parameter.)
93*4882a593Smuzhiyun  * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
94*4882a593Smuzhiyun  *	supplies, the argument to this parameter (on a custom format) tells
95*4882a593Smuzhiyun  *	the driver which alternative power source to use.
96*4882a593Smuzhiyun  * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
97*4882a593Smuzhiyun  * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
98*4882a593Smuzhiyun  *	this parameter (on a custom format) tells the driver which alternative
99*4882a593Smuzhiyun  *	slew rate to use.
100*4882a593Smuzhiyun  * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
101*4882a593Smuzhiyun  *	or latch delay (on outputs) this parameter (in a custom format)
102*4882a593Smuzhiyun  *	specifies the clock skew or latch delay. It typically controls how
103*4882a593Smuzhiyun  *	many double inverters are put in front of the line.
104*4882a593Smuzhiyun  * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
105*4882a593Smuzhiyun  * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
106*4882a593Smuzhiyun  *	you need to pass in custom configurations to the pin controller, use
107*4882a593Smuzhiyun  *	PIN_CONFIG_END+1 as the base offset.
108*4882a593Smuzhiyun  * @PIN_CONFIG_MAX: this is the maximum configuration value that can be
109*4882a593Smuzhiyun  *	presented using the packed format.
110*4882a593Smuzhiyun  */
111*4882a593Smuzhiyun enum pin_config_param {
112*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_BUS_HOLD,
113*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_DISABLE,
114*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
115*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_PULL_DOWN,
116*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
117*4882a593Smuzhiyun 	PIN_CONFIG_BIAS_PULL_UP,
118*4882a593Smuzhiyun 	PIN_CONFIG_DRIVE_OPEN_DRAIN,
119*4882a593Smuzhiyun 	PIN_CONFIG_DRIVE_OPEN_SOURCE,
120*4882a593Smuzhiyun 	PIN_CONFIG_DRIVE_PUSH_PULL,
121*4882a593Smuzhiyun 	PIN_CONFIG_DRIVE_STRENGTH,
122*4882a593Smuzhiyun 	PIN_CONFIG_DRIVE_STRENGTH_UA,
123*4882a593Smuzhiyun 	PIN_CONFIG_INPUT_DEBOUNCE,
124*4882a593Smuzhiyun 	PIN_CONFIG_INPUT_ENABLE,
125*4882a593Smuzhiyun 	PIN_CONFIG_INPUT_SCHMITT,
126*4882a593Smuzhiyun 	PIN_CONFIG_INPUT_SCHMITT_ENABLE,
127*4882a593Smuzhiyun 	PIN_CONFIG_LOW_POWER_MODE,
128*4882a593Smuzhiyun 	PIN_CONFIG_OUTPUT_ENABLE,
129*4882a593Smuzhiyun 	PIN_CONFIG_OUTPUT,
130*4882a593Smuzhiyun 	PIN_CONFIG_POWER_SOURCE,
131*4882a593Smuzhiyun 	PIN_CONFIG_SLEEP_HARDWARE_STATE,
132*4882a593Smuzhiyun 	PIN_CONFIG_SLEW_RATE,
133*4882a593Smuzhiyun 	PIN_CONFIG_SKEW_DELAY,
134*4882a593Smuzhiyun 	PIN_CONFIG_PERSIST_STATE,
135*4882a593Smuzhiyun 	PIN_CONFIG_END = 0x7F,
136*4882a593Smuzhiyun 	PIN_CONFIG_MAX = 0xFF,
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun  * Helpful configuration macro to be used in tables etc.
141*4882a593Smuzhiyun  */
142*4882a593Smuzhiyun #define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL))
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun  * The following inlines stuffs a configuration parameter and data value
146*4882a593Smuzhiyun  * into and out of an unsigned long argument, as used by the generic pin config
147*4882a593Smuzhiyun  * system. We put the parameter in the lower 8 bits and the argument in the
148*4882a593Smuzhiyun  * upper 24 bits.
149*4882a593Smuzhiyun  */
150*4882a593Smuzhiyun 
pinconf_to_config_param(unsigned long config)151*4882a593Smuzhiyun static inline enum pin_config_param pinconf_to_config_param(unsigned long config)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	return (enum pin_config_param) (config & 0xffUL);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
pinconf_to_config_argument(unsigned long config)156*4882a593Smuzhiyun static inline u32 pinconf_to_config_argument(unsigned long config)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun 	return (u32) ((config >> 8) & 0xffffffUL);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
pinconf_to_config_packed(enum pin_config_param param,u32 argument)161*4882a593Smuzhiyun static inline unsigned long pinconf_to_config_packed(enum pin_config_param param,
162*4882a593Smuzhiyun 						     u32 argument)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	return PIN_CONF_PACKED(param, argument);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun #define PCONFDUMP(a, b, c, d) {					\
168*4882a593Smuzhiyun 	.param = a, .display = b, .format = c, .has_arg = d	\
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun struct pin_config_item {
172*4882a593Smuzhiyun 	const enum pin_config_param param;
173*4882a593Smuzhiyun 	const char * const display;
174*4882a593Smuzhiyun 	const char * const format;
175*4882a593Smuzhiyun 	bool has_arg;
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun struct pinconf_generic_params {
179*4882a593Smuzhiyun 	const char * const property;
180*4882a593Smuzhiyun 	enum pin_config_param param;
181*4882a593Smuzhiyun 	u32 default_value;
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
185*4882a593Smuzhiyun 		struct device_node *np, struct pinctrl_map **map,
186*4882a593Smuzhiyun 		unsigned *reserved_maps, unsigned *num_maps,
187*4882a593Smuzhiyun 		enum pinctrl_map_type type);
188*4882a593Smuzhiyun int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
189*4882a593Smuzhiyun 		struct device_node *np_config, struct pinctrl_map **map,
190*4882a593Smuzhiyun 		unsigned *num_maps, enum pinctrl_map_type type);
191*4882a593Smuzhiyun void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev,
192*4882a593Smuzhiyun 		struct pinctrl_map *map, unsigned num_maps);
193*4882a593Smuzhiyun 
pinconf_generic_dt_node_to_map_group(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned * num_maps)194*4882a593Smuzhiyun static inline int pinconf_generic_dt_node_to_map_group(
195*4882a593Smuzhiyun 		struct pinctrl_dev *pctldev, struct device_node *np_config,
196*4882a593Smuzhiyun 		struct pinctrl_map **map, unsigned *num_maps)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
199*4882a593Smuzhiyun 			PIN_MAP_TYPE_CONFIGS_GROUP);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
pinconf_generic_dt_node_to_map_pin(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned * num_maps)202*4882a593Smuzhiyun static inline int pinconf_generic_dt_node_to_map_pin(
203*4882a593Smuzhiyun 		struct pinctrl_dev *pctldev, struct device_node *np_config,
204*4882a593Smuzhiyun 		struct pinctrl_map **map, unsigned *num_maps)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
207*4882a593Smuzhiyun 			PIN_MAP_TYPE_CONFIGS_PIN);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
pinconf_generic_dt_node_to_map_all(struct pinctrl_dev * pctldev,struct device_node * np_config,struct pinctrl_map ** map,unsigned * num_maps)210*4882a593Smuzhiyun static inline int pinconf_generic_dt_node_to_map_all(
211*4882a593Smuzhiyun 		struct pinctrl_dev *pctldev, struct device_node *np_config,
212*4882a593Smuzhiyun 		struct pinctrl_map **map, unsigned *num_maps)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	/*
215*4882a593Smuzhiyun 	 * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser
216*4882a593Smuzhiyun 	 * to infer the map type from the DT properties used.
217*4882a593Smuzhiyun 	 */
218*4882a593Smuzhiyun 	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
219*4882a593Smuzhiyun 			PIN_MAP_TYPE_INVALID);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun #endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */
223