1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Consumer interface the pin control subsystem
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2012 ST-Ericsson SA
6*4882a593Smuzhiyun * Written on behalf of Linaro for ST-Ericsson
7*4882a593Smuzhiyun * Based on bits of regulator core, gpio core and clk core
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Author: Linus Walleij <linus.walleij@linaro.org>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #ifndef __LINUX_PINCTRL_CONSUMER_H
12*4882a593Smuzhiyun #define __LINUX_PINCTRL_CONSUMER_H
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/list.h>
16*4882a593Smuzhiyun #include <linux/seq_file.h>
17*4882a593Smuzhiyun #include <linux/pinctrl/pinctrl-state.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* This struct is private to the core and should be regarded as a cookie */
20*4882a593Smuzhiyun struct pinctrl;
21*4882a593Smuzhiyun struct pinctrl_state;
22*4882a593Smuzhiyun struct device;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #ifdef CONFIG_PINCTRL
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* External interface to pin control */
27*4882a593Smuzhiyun extern bool pinctrl_gpio_can_use_line(unsigned gpio);
28*4882a593Smuzhiyun extern int pinctrl_gpio_request(unsigned gpio);
29*4882a593Smuzhiyun extern void pinctrl_gpio_free(unsigned gpio);
30*4882a593Smuzhiyun extern int pinctrl_gpio_direction_input(unsigned gpio);
31*4882a593Smuzhiyun extern int pinctrl_gpio_direction_output(unsigned gpio);
32*4882a593Smuzhiyun extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun extern struct pinctrl * __must_check pinctrl_get(struct device *dev);
35*4882a593Smuzhiyun extern void pinctrl_put(struct pinctrl *p);
36*4882a593Smuzhiyun extern struct pinctrl_state * __must_check pinctrl_lookup_state(
37*4882a593Smuzhiyun struct pinctrl *p,
38*4882a593Smuzhiyun const char *name);
39*4882a593Smuzhiyun extern int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *s);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun extern struct pinctrl * __must_check devm_pinctrl_get(struct device *dev);
42*4882a593Smuzhiyun extern void devm_pinctrl_put(struct pinctrl *p);
43*4882a593Smuzhiyun extern int pinctrl_select_default_state(struct device *dev);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #ifdef CONFIG_PM
46*4882a593Smuzhiyun extern int pinctrl_pm_select_default_state(struct device *dev);
47*4882a593Smuzhiyun extern int pinctrl_pm_select_sleep_state(struct device *dev);
48*4882a593Smuzhiyun extern int pinctrl_pm_select_idle_state(struct device *dev);
49*4882a593Smuzhiyun #else
pinctrl_pm_select_default_state(struct device * dev)50*4882a593Smuzhiyun static inline int pinctrl_pm_select_default_state(struct device *dev)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
pinctrl_pm_select_sleep_state(struct device * dev)54*4882a593Smuzhiyun static inline int pinctrl_pm_select_sleep_state(struct device *dev)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun return 0;
57*4882a593Smuzhiyun }
pinctrl_pm_select_idle_state(struct device * dev)58*4882a593Smuzhiyun static inline int pinctrl_pm_select_idle_state(struct device *dev)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun return 0;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #else /* !CONFIG_PINCTRL */
65*4882a593Smuzhiyun
pinctrl_gpio_can_use_line(unsigned gpio)66*4882a593Smuzhiyun static inline bool pinctrl_gpio_can_use_line(unsigned gpio)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun return true;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
pinctrl_gpio_request(unsigned gpio)71*4882a593Smuzhiyun static inline int pinctrl_gpio_request(unsigned gpio)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
pinctrl_gpio_free(unsigned gpio)76*4882a593Smuzhiyun static inline void pinctrl_gpio_free(unsigned gpio)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
pinctrl_gpio_direction_input(unsigned gpio)80*4882a593Smuzhiyun static inline int pinctrl_gpio_direction_input(unsigned gpio)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
pinctrl_gpio_direction_output(unsigned gpio)85*4882a593Smuzhiyun static inline int pinctrl_gpio_direction_output(unsigned gpio)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun return 0;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
pinctrl_gpio_set_config(unsigned gpio,unsigned long config)90*4882a593Smuzhiyun static inline int pinctrl_gpio_set_config(unsigned gpio, unsigned long config)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
pinctrl_get(struct device * dev)95*4882a593Smuzhiyun static inline struct pinctrl * __must_check pinctrl_get(struct device *dev)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun return NULL;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
pinctrl_put(struct pinctrl * p)100*4882a593Smuzhiyun static inline void pinctrl_put(struct pinctrl *p)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
pinctrl_lookup_state(struct pinctrl * p,const char * name)104*4882a593Smuzhiyun static inline struct pinctrl_state * __must_check pinctrl_lookup_state(
105*4882a593Smuzhiyun struct pinctrl *p,
106*4882a593Smuzhiyun const char *name)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun return NULL;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
pinctrl_select_state(struct pinctrl * p,struct pinctrl_state * s)111*4882a593Smuzhiyun static inline int pinctrl_select_state(struct pinctrl *p,
112*4882a593Smuzhiyun struct pinctrl_state *s)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
devm_pinctrl_get(struct device * dev)117*4882a593Smuzhiyun static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun return NULL;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
devm_pinctrl_put(struct pinctrl * p)122*4882a593Smuzhiyun static inline void devm_pinctrl_put(struct pinctrl *p)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
pinctrl_select_default_state(struct device * dev)126*4882a593Smuzhiyun static inline int pinctrl_select_default_state(struct device *dev)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
pinctrl_pm_select_default_state(struct device * dev)131*4882a593Smuzhiyun static inline int pinctrl_pm_select_default_state(struct device *dev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
pinctrl_pm_select_sleep_state(struct device * dev)136*4882a593Smuzhiyun static inline int pinctrl_pm_select_sleep_state(struct device *dev)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun return 0;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
pinctrl_pm_select_idle_state(struct device * dev)141*4882a593Smuzhiyun static inline int pinctrl_pm_select_idle_state(struct device *dev)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #endif /* CONFIG_PINCTRL */
147*4882a593Smuzhiyun
pinctrl_get_select(struct device * dev,const char * name)148*4882a593Smuzhiyun static inline struct pinctrl * __must_check pinctrl_get_select(
149*4882a593Smuzhiyun struct device *dev, const char *name)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun struct pinctrl *p;
152*4882a593Smuzhiyun struct pinctrl_state *s;
153*4882a593Smuzhiyun int ret;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun p = pinctrl_get(dev);
156*4882a593Smuzhiyun if (IS_ERR(p))
157*4882a593Smuzhiyun return p;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun s = pinctrl_lookup_state(p, name);
160*4882a593Smuzhiyun if (IS_ERR(s)) {
161*4882a593Smuzhiyun pinctrl_put(p);
162*4882a593Smuzhiyun return ERR_CAST(s);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = pinctrl_select_state(p, s);
166*4882a593Smuzhiyun if (ret < 0) {
167*4882a593Smuzhiyun pinctrl_put(p);
168*4882a593Smuzhiyun return ERR_PTR(ret);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return p;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
pinctrl_get_select_default(struct device * dev)174*4882a593Smuzhiyun static inline struct pinctrl * __must_check pinctrl_get_select_default(
175*4882a593Smuzhiyun struct device *dev)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun return pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
devm_pinctrl_get_select(struct device * dev,const char * name)180*4882a593Smuzhiyun static inline struct pinctrl * __must_check devm_pinctrl_get_select(
181*4882a593Smuzhiyun struct device *dev, const char *name)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct pinctrl *p;
184*4882a593Smuzhiyun struct pinctrl_state *s;
185*4882a593Smuzhiyun int ret;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun p = devm_pinctrl_get(dev);
188*4882a593Smuzhiyun if (IS_ERR(p))
189*4882a593Smuzhiyun return p;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun s = pinctrl_lookup_state(p, name);
192*4882a593Smuzhiyun if (IS_ERR(s)) {
193*4882a593Smuzhiyun devm_pinctrl_put(p);
194*4882a593Smuzhiyun return ERR_CAST(s);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun ret = pinctrl_select_state(p, s);
198*4882a593Smuzhiyun if (ret < 0) {
199*4882a593Smuzhiyun devm_pinctrl_put(p);
200*4882a593Smuzhiyun return ERR_PTR(ret);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun return p;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
devm_pinctrl_get_select_default(struct device * dev)206*4882a593Smuzhiyun static inline struct pinctrl * __must_check devm_pinctrl_get_select_default(
207*4882a593Smuzhiyun struct device *dev)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun return devm_pinctrl_get_select(dev, PINCTRL_STATE_DEFAULT);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun #endif /* __LINUX_PINCTRL_CONSUMER_H */
213