xref: /OK3568_Linux_fs/kernel/include/linux/phy.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Framework and drivers for configuring and reading different PHYs
4*4882a593Smuzhiyun  * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Author: Andy Fleming
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (c) 2004 Freescale Semiconductor, Inc.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __PHY_H
12*4882a593Smuzhiyun #define __PHY_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/compiler.h>
15*4882a593Smuzhiyun #include <linux/spinlock.h>
16*4882a593Smuzhiyun #include <linux/ethtool.h>
17*4882a593Smuzhiyun #include <linux/linkmode.h>
18*4882a593Smuzhiyun #include <linux/netlink.h>
19*4882a593Smuzhiyun #include <linux/mdio.h>
20*4882a593Smuzhiyun #include <linux/mii.h>
21*4882a593Smuzhiyun #include <linux/mii_timestamper.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun #include <linux/timer.h>
24*4882a593Smuzhiyun #include <linux/workqueue.h>
25*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
26*4882a593Smuzhiyun #include <linux/u64_stats_sync.h>
27*4882a593Smuzhiyun #include <linux/irqreturn.h>
28*4882a593Smuzhiyun #include <linux/iopoll.h>
29*4882a593Smuzhiyun #include <linux/refcount.h>
30*4882a593Smuzhiyun #include <linux/android_kabi.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include <linux/atomic.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
35*4882a593Smuzhiyun 				 SUPPORTED_TP | \
36*4882a593Smuzhiyun 				 SUPPORTED_MII)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
39*4882a593Smuzhiyun 				 SUPPORTED_10baseT_Full)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
42*4882a593Smuzhiyun 				 SUPPORTED_100baseT_Full)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
45*4882a593Smuzhiyun 				 SUPPORTED_1000baseT_Full)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
48*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
49*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
50*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
51*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
52*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
53*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
54*4882a593Smuzhiyun extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
57*4882a593Smuzhiyun #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
58*4882a593Smuzhiyun #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
59*4882a593Smuzhiyun #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
60*4882a593Smuzhiyun #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
61*4882a593Smuzhiyun #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
62*4882a593Smuzhiyun #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
63*4882a593Smuzhiyun #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun extern const int phy_basic_ports_array[3];
66*4882a593Smuzhiyun extern const int phy_fibre_port_array[1];
67*4882a593Smuzhiyun extern const int phy_all_ports_features_array[7];
68*4882a593Smuzhiyun extern const int phy_10_100_features_array[4];
69*4882a593Smuzhiyun extern const int phy_basic_t1_features_array[2];
70*4882a593Smuzhiyun extern const int phy_gbit_features_array[2];
71*4882a593Smuzhiyun extern const int phy_10gbit_features_array[1];
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun  * Set phydev->irq to PHY_POLL if interrupts are not supported,
75*4882a593Smuzhiyun  * or not desired for this PHY.  Set to PHY_IGNORE_INTERRUPT if
76*4882a593Smuzhiyun  * the attached driver handles the interrupt
77*4882a593Smuzhiyun  */
78*4882a593Smuzhiyun #define PHY_POLL		-1
79*4882a593Smuzhiyun #define PHY_IGNORE_INTERRUPT	-2
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define PHY_IS_INTERNAL		0x00000001
82*4882a593Smuzhiyun #define PHY_RST_AFTER_CLK_EN	0x00000002
83*4882a593Smuzhiyun #define PHY_POLL_CABLE_TEST	0x00000004
84*4882a593Smuzhiyun #define MDIO_DEVICE_IS_PHY	0x80000000
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /**
87*4882a593Smuzhiyun  * enum phy_interface_t - Interface Mode definitions
88*4882a593Smuzhiyun  *
89*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
90*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
91*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_MII: Median-independent interface
92*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface
93*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
94*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
95*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
96*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
97*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
98*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
99*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
100*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
101*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
102*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_SMII: ??? MII
103*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
104*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
105*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
106*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
107*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
108*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
109*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
110*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
111*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
112*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
113*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
114*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
115*4882a593Smuzhiyun  * @PHY_INTERFACE_MODE_MAX: Book keeping
116*4882a593Smuzhiyun  *
117*4882a593Smuzhiyun  * Describes the interface between the MAC and PHY.
118*4882a593Smuzhiyun  */
119*4882a593Smuzhiyun typedef enum {
120*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_NA,
121*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_INTERNAL,
122*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_MII,
123*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_GMII,
124*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_SGMII,
125*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_TBI,
126*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_REVMII,
127*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RMII,
128*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RGMII,
129*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RGMII_ID,
130*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RGMII_RXID,
131*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RGMII_TXID,
132*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RTBI,
133*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_SMII,
134*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_XGMII,
135*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_XLGMII,
136*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_MOCA,
137*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_QSGMII,
138*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_TRGMII,
139*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_1000BASEX,
140*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_2500BASEX,
141*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_RXAUI,
142*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_XAUI,
143*4882a593Smuzhiyun 	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
144*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_10GBASER,
145*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_USXGMII,
146*4882a593Smuzhiyun 	/* 10GBASE-KR - with Clause 73 AN */
147*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_10GKR,
148*4882a593Smuzhiyun 	PHY_INTERFACE_MODE_MAX,
149*4882a593Smuzhiyun } phy_interface_t;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun  * phy_supported_speeds - return all speeds currently supported by a PHY device
153*4882a593Smuzhiyun  */
154*4882a593Smuzhiyun unsigned int phy_supported_speeds(struct phy_device *phy,
155*4882a593Smuzhiyun 				      unsigned int *speeds,
156*4882a593Smuzhiyun 				      unsigned int size);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /**
159*4882a593Smuzhiyun  * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
160*4882a593Smuzhiyun  * @interface: enum phy_interface_t value
161*4882a593Smuzhiyun  *
162*4882a593Smuzhiyun  * Description: maps enum &phy_interface_t defined in this file
163*4882a593Smuzhiyun  * into the device tree binding of 'phy-mode', so that Ethernet
164*4882a593Smuzhiyun  * device driver can get PHY interface from device tree.
165*4882a593Smuzhiyun  */
166*4882a593Smuzhiyun static inline const char *phy_modes(phy_interface_t interface)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	switch (interface) {
169*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_NA:
170*4882a593Smuzhiyun 		return "";
171*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_INTERNAL:
172*4882a593Smuzhiyun 		return "internal";
173*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_MII:
174*4882a593Smuzhiyun 		return "mii";
175*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_GMII:
176*4882a593Smuzhiyun 		return "gmii";
177*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_SGMII:
178*4882a593Smuzhiyun 		return "sgmii";
179*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_TBI:
180*4882a593Smuzhiyun 		return "tbi";
181*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_REVMII:
182*4882a593Smuzhiyun 		return "rev-mii";
183*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RMII:
184*4882a593Smuzhiyun 		return "rmii";
185*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RGMII:
186*4882a593Smuzhiyun 		return "rgmii";
187*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RGMII_ID:
188*4882a593Smuzhiyun 		return "rgmii-id";
189*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RGMII_RXID:
190*4882a593Smuzhiyun 		return "rgmii-rxid";
191*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RGMII_TXID:
192*4882a593Smuzhiyun 		return "rgmii-txid";
193*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RTBI:
194*4882a593Smuzhiyun 		return "rtbi";
195*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_SMII:
196*4882a593Smuzhiyun 		return "smii";
197*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_XGMII:
198*4882a593Smuzhiyun 		return "xgmii";
199*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_XLGMII:
200*4882a593Smuzhiyun 		return "xlgmii";
201*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_MOCA:
202*4882a593Smuzhiyun 		return "moca";
203*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_QSGMII:
204*4882a593Smuzhiyun 		return "qsgmii";
205*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_TRGMII:
206*4882a593Smuzhiyun 		return "trgmii";
207*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_1000BASEX:
208*4882a593Smuzhiyun 		return "1000base-x";
209*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_2500BASEX:
210*4882a593Smuzhiyun 		return "2500base-x";
211*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_RXAUI:
212*4882a593Smuzhiyun 		return "rxaui";
213*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_XAUI:
214*4882a593Smuzhiyun 		return "xaui";
215*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_10GBASER:
216*4882a593Smuzhiyun 		return "10gbase-r";
217*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_USXGMII:
218*4882a593Smuzhiyun 		return "usxgmii";
219*4882a593Smuzhiyun 	case PHY_INTERFACE_MODE_10GKR:
220*4882a593Smuzhiyun 		return "10gbase-kr";
221*4882a593Smuzhiyun 	default:
222*4882a593Smuzhiyun 		return "unknown";
223*4882a593Smuzhiyun 	}
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun #define PHY_INIT_TIMEOUT	100000
228*4882a593Smuzhiyun #define PHY_FORCE_TIMEOUT	10
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun #define PHY_MAX_ADDR	32
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
233*4882a593Smuzhiyun #define PHY_ID_FMT "%s:%02x"
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun #define MII_BUS_ID_SIZE	61
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun struct device;
238*4882a593Smuzhiyun struct phylink;
239*4882a593Smuzhiyun struct sfp_bus;
240*4882a593Smuzhiyun struct sfp_upstream_ops;
241*4882a593Smuzhiyun struct sk_buff;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun /**
244*4882a593Smuzhiyun  * struct mdio_bus_stats - Statistics counters for MDIO busses
245*4882a593Smuzhiyun  * @transfers: Total number of transfers, i.e. @writes + @reads
246*4882a593Smuzhiyun  * @errors: Number of MDIO transfers that returned an error
247*4882a593Smuzhiyun  * @writes: Number of write transfers
248*4882a593Smuzhiyun  * @reads: Number of read transfers
249*4882a593Smuzhiyun  * @syncp: Synchronisation for incrementing statistics
250*4882a593Smuzhiyun  */
251*4882a593Smuzhiyun struct mdio_bus_stats {
252*4882a593Smuzhiyun 	u64_stats_t transfers;
253*4882a593Smuzhiyun 	u64_stats_t errors;
254*4882a593Smuzhiyun 	u64_stats_t writes;
255*4882a593Smuzhiyun 	u64_stats_t reads;
256*4882a593Smuzhiyun 	/* Must be last, add new statistics above */
257*4882a593Smuzhiyun 	struct u64_stats_sync syncp;
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun /**
261*4882a593Smuzhiyun  * struct phy_package_shared - Shared information in PHY packages
262*4882a593Smuzhiyun  * @addr: Common PHY address used to combine PHYs in one package
263*4882a593Smuzhiyun  * @refcnt: Number of PHYs connected to this shared data
264*4882a593Smuzhiyun  * @flags: Initialization of PHY package
265*4882a593Smuzhiyun  * @priv_size: Size of the shared private data @priv
266*4882a593Smuzhiyun  * @priv: Driver private data shared across a PHY package
267*4882a593Smuzhiyun  *
268*4882a593Smuzhiyun  * Represents a shared structure between different phydev's in the same
269*4882a593Smuzhiyun  * package, for example a quad PHY. See phy_package_join() and
270*4882a593Smuzhiyun  * phy_package_leave().
271*4882a593Smuzhiyun  */
272*4882a593Smuzhiyun struct phy_package_shared {
273*4882a593Smuzhiyun 	int addr;
274*4882a593Smuzhiyun 	refcount_t refcnt;
275*4882a593Smuzhiyun 	unsigned long flags;
276*4882a593Smuzhiyun 	size_t priv_size;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	/* private data pointer */
279*4882a593Smuzhiyun 	/* note that this pointer is shared between different phydevs and
280*4882a593Smuzhiyun 	 * the user has to take care of appropriate locking. It is allocated
281*4882a593Smuzhiyun 	 * and freed automatically by phy_package_join() and
282*4882a593Smuzhiyun 	 * phy_package_leave().
283*4882a593Smuzhiyun 	 */
284*4882a593Smuzhiyun 	void *priv;
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun /* used as bit number in atomic bitops */
288*4882a593Smuzhiyun #define PHY_SHARED_F_INIT_DONE  0
289*4882a593Smuzhiyun #define PHY_SHARED_F_PROBE_DONE 1
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun /**
292*4882a593Smuzhiyun  * struct mii_bus - Represents an MDIO bus
293*4882a593Smuzhiyun  *
294*4882a593Smuzhiyun  * @owner: Who owns this device
295*4882a593Smuzhiyun  * @name: User friendly name for this MDIO device, or driver name
296*4882a593Smuzhiyun  * @id: Unique identifier for this bus, typical from bus hierarchy
297*4882a593Smuzhiyun  * @priv: Driver private data
298*4882a593Smuzhiyun  *
299*4882a593Smuzhiyun  * The Bus class for PHYs.  Devices which provide access to
300*4882a593Smuzhiyun  * PHYs should register using this structure
301*4882a593Smuzhiyun  */
302*4882a593Smuzhiyun struct mii_bus {
303*4882a593Smuzhiyun 	struct module *owner;
304*4882a593Smuzhiyun 	const char *name;
305*4882a593Smuzhiyun 	char id[MII_BUS_ID_SIZE];
306*4882a593Smuzhiyun 	void *priv;
307*4882a593Smuzhiyun 	/** @read: Perform a read transfer on the bus */
308*4882a593Smuzhiyun 	int (*read)(struct mii_bus *bus, int addr, int regnum);
309*4882a593Smuzhiyun 	/** @write: Perform a write transfer on the bus */
310*4882a593Smuzhiyun 	int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
311*4882a593Smuzhiyun 	/** @reset: Perform a reset of the bus */
312*4882a593Smuzhiyun 	int (*reset)(struct mii_bus *bus);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	/** @stats: Statistic counters per device on the bus */
315*4882a593Smuzhiyun 	struct mdio_bus_stats stats[PHY_MAX_ADDR];
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/**
318*4882a593Smuzhiyun 	 * @mdio_lock: A lock to ensure that only one thing can read/write
319*4882a593Smuzhiyun 	 * the MDIO bus at a time
320*4882a593Smuzhiyun 	 */
321*4882a593Smuzhiyun 	struct mutex mdio_lock;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/** @parent: Parent device of this bus */
324*4882a593Smuzhiyun 	struct device *parent;
325*4882a593Smuzhiyun 	/** @state: State of bus structure */
326*4882a593Smuzhiyun 	enum {
327*4882a593Smuzhiyun 		MDIOBUS_ALLOCATED = 1,
328*4882a593Smuzhiyun 		MDIOBUS_REGISTERED,
329*4882a593Smuzhiyun 		MDIOBUS_UNREGISTERED,
330*4882a593Smuzhiyun 		MDIOBUS_RELEASED,
331*4882a593Smuzhiyun 	} state;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/** @dev: Kernel device representation */
334*4882a593Smuzhiyun 	struct device dev;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/** @mdio_map: list of all MDIO devices on bus */
337*4882a593Smuzhiyun 	struct mdio_device *mdio_map[PHY_MAX_ADDR];
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	/** @phy_mask: PHY addresses to be ignored when probing */
340*4882a593Smuzhiyun 	u32 phy_mask;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	/** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
343*4882a593Smuzhiyun 	u32 phy_ignore_ta_mask;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/**
346*4882a593Smuzhiyun 	 * @irq: An array of interrupts, each PHY's interrupt at the index
347*4882a593Smuzhiyun 	 * matching its address
348*4882a593Smuzhiyun 	 */
349*4882a593Smuzhiyun 	int irq[PHY_MAX_ADDR];
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	/** @reset_delay_us: GPIO reset pulse width in microseconds */
352*4882a593Smuzhiyun 	int reset_delay_us;
353*4882a593Smuzhiyun 	/** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
354*4882a593Smuzhiyun 	int reset_post_delay_us;
355*4882a593Smuzhiyun 	/** @reset_gpiod: Reset GPIO descriptor pointer */
356*4882a593Smuzhiyun 	struct gpio_desc *reset_gpiod;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/** @probe_capabilities: bus capabilities, used for probing */
359*4882a593Smuzhiyun 	enum {
360*4882a593Smuzhiyun 		MDIOBUS_NO_CAP = 0,
361*4882a593Smuzhiyun 		MDIOBUS_C22,
362*4882a593Smuzhiyun 		MDIOBUS_C45,
363*4882a593Smuzhiyun 		MDIOBUS_C22_C45,
364*4882a593Smuzhiyun 	} probe_capabilities;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	/** @shared_lock: protect access to the shared element */
367*4882a593Smuzhiyun 	struct mutex shared_lock;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	/** @shared: shared state across different PHYs */
370*4882a593Smuzhiyun 	struct phy_package_shared *shared[PHY_MAX_ADDR];
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun struct mii_bus *mdiobus_alloc_size(size_t size);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun /**
377*4882a593Smuzhiyun  * mdiobus_alloc - Allocate an MDIO bus structure
378*4882a593Smuzhiyun  *
379*4882a593Smuzhiyun  * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
380*4882a593Smuzhiyun  * for the driver to register the bus.
381*4882a593Smuzhiyun  */
382*4882a593Smuzhiyun static inline struct mii_bus *mdiobus_alloc(void)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun 	return mdiobus_alloc_size(0);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun int __mdiobus_register(struct mii_bus *bus, struct module *owner);
388*4882a593Smuzhiyun int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
389*4882a593Smuzhiyun 			    struct module *owner);
390*4882a593Smuzhiyun #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
391*4882a593Smuzhiyun #define devm_mdiobus_register(dev, bus) \
392*4882a593Smuzhiyun 		__devm_mdiobus_register(dev, bus, THIS_MODULE)
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun void mdiobus_unregister(struct mii_bus *bus);
395*4882a593Smuzhiyun void mdiobus_free(struct mii_bus *bus);
396*4882a593Smuzhiyun struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
397*4882a593Smuzhiyun static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	return devm_mdiobus_alloc_size(dev, 0);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun struct mii_bus *mdio_find_bus(const char *mdio_name);
403*4882a593Smuzhiyun struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun #define PHY_INTERRUPT_DISABLED	false
406*4882a593Smuzhiyun #define PHY_INTERRUPT_ENABLED	true
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun /**
409*4882a593Smuzhiyun  * enum phy_state - PHY state machine states:
410*4882a593Smuzhiyun  *
411*4882a593Smuzhiyun  * @PHY_DOWN: PHY device and driver are not ready for anything.  probe
412*4882a593Smuzhiyun  * should be called if and only if the PHY is in this state,
413*4882a593Smuzhiyun  * given that the PHY device exists.
414*4882a593Smuzhiyun  * - PHY driver probe function will set the state to @PHY_READY
415*4882a593Smuzhiyun  *
416*4882a593Smuzhiyun  * @PHY_READY: PHY is ready to send and receive packets, but the
417*4882a593Smuzhiyun  * controller is not.  By default, PHYs which do not implement
418*4882a593Smuzhiyun  * probe will be set to this state by phy_probe().
419*4882a593Smuzhiyun  * - start will set the state to UP
420*4882a593Smuzhiyun  *
421*4882a593Smuzhiyun  * @PHY_UP: The PHY and attached device are ready to do work.
422*4882a593Smuzhiyun  * Interrupts should be started here.
423*4882a593Smuzhiyun  * - timer moves to @PHY_NOLINK or @PHY_RUNNING
424*4882a593Smuzhiyun  *
425*4882a593Smuzhiyun  * @PHY_NOLINK: PHY is up, but not currently plugged in.
426*4882a593Smuzhiyun  * - irq or timer will set @PHY_RUNNING if link comes back
427*4882a593Smuzhiyun  * - phy_stop moves to @PHY_HALTED
428*4882a593Smuzhiyun  *
429*4882a593Smuzhiyun  * @PHY_RUNNING: PHY is currently up, running, and possibly sending
430*4882a593Smuzhiyun  * and/or receiving packets
431*4882a593Smuzhiyun  * - irq or timer will set @PHY_NOLINK if link goes down
432*4882a593Smuzhiyun  * - phy_stop moves to @PHY_HALTED
433*4882a593Smuzhiyun  *
434*4882a593Smuzhiyun  * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
435*4882a593Smuzhiyun  * is not expected to work, carrier will be indicated as down. PHY will be
436*4882a593Smuzhiyun  * poll once per second, or on interrupt for it current state.
437*4882a593Smuzhiyun  * Once complete, move to UP to restart the PHY.
438*4882a593Smuzhiyun  * - phy_stop aborts the running test and moves to @PHY_HALTED
439*4882a593Smuzhiyun  *
440*4882a593Smuzhiyun  * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
441*4882a593Smuzhiyun  * PHY is in an error state.
442*4882a593Smuzhiyun  * - phy_start moves to @PHY_UP
443*4882a593Smuzhiyun  */
444*4882a593Smuzhiyun enum phy_state {
445*4882a593Smuzhiyun 	PHY_DOWN = 0,
446*4882a593Smuzhiyun 	PHY_READY,
447*4882a593Smuzhiyun 	PHY_HALTED,
448*4882a593Smuzhiyun 	PHY_UP,
449*4882a593Smuzhiyun 	PHY_RUNNING,
450*4882a593Smuzhiyun 	PHY_NOLINK,
451*4882a593Smuzhiyun 	PHY_CABLETEST,
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun #define MDIO_MMD_NUM 32
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun /**
457*4882a593Smuzhiyun  * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
458*4882a593Smuzhiyun  * @devices_in_package: IEEE 802.3 devices in package register value.
459*4882a593Smuzhiyun  * @mmds_present: bit vector of MMDs present.
460*4882a593Smuzhiyun  * @device_ids: The device identifer for each present device.
461*4882a593Smuzhiyun  */
462*4882a593Smuzhiyun struct phy_c45_device_ids {
463*4882a593Smuzhiyun 	u32 devices_in_package;
464*4882a593Smuzhiyun 	u32 mmds_present;
465*4882a593Smuzhiyun 	u32 device_ids[MDIO_MMD_NUM];
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun struct macsec_context;
469*4882a593Smuzhiyun struct macsec_ops;
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun /**
472*4882a593Smuzhiyun  * struct phy_device - An instance of a PHY
473*4882a593Smuzhiyun  *
474*4882a593Smuzhiyun  * @mdio: MDIO bus this PHY is on
475*4882a593Smuzhiyun  * @drv: Pointer to the driver for this PHY instance
476*4882a593Smuzhiyun  * @phy_id: UID for this device found during discovery
477*4882a593Smuzhiyun  * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
478*4882a593Smuzhiyun  * @is_c45:  Set to true if this PHY uses clause 45 addressing.
479*4882a593Smuzhiyun  * @is_internal: Set to true if this PHY is internal to a MAC.
480*4882a593Smuzhiyun  * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
481*4882a593Smuzhiyun  * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
482*4882a593Smuzhiyun  * @has_fixups: Set to true if this PHY has fixups/quirks.
483*4882a593Smuzhiyun  * @suspended: Set to true if this PHY has been suspended successfully.
484*4882a593Smuzhiyun  * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
485*4882a593Smuzhiyun  * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
486*4882a593Smuzhiyun  * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
487*4882a593Smuzhiyun  * @downshifted_rate: Set true if link speed has been downshifted.
488*4882a593Smuzhiyun  * @state: State of the PHY for management purposes
489*4882a593Smuzhiyun  * @dev_flags: Device-specific flags used by the PHY driver.
490*4882a593Smuzhiyun  * @irq: IRQ number of the PHY's interrupt (-1 if none)
491*4882a593Smuzhiyun  * @phy_timer: The timer for handling the state machine
492*4882a593Smuzhiyun  * @phylink: Pointer to phylink instance for this PHY
493*4882a593Smuzhiyun  * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
494*4882a593Smuzhiyun  * @sfp_bus: SFP bus attached to this PHY's fiber port
495*4882a593Smuzhiyun  * @attached_dev: The attached enet driver's device instance ptr
496*4882a593Smuzhiyun  * @adjust_link: Callback for the enet controller to respond to changes: in the
497*4882a593Smuzhiyun  *               link state.
498*4882a593Smuzhiyun  * @phy_link_change: Callback for phylink for notification of link change
499*4882a593Smuzhiyun  * @macsec_ops: MACsec offloading ops.
500*4882a593Smuzhiyun  *
501*4882a593Smuzhiyun  * @speed: Current link speed
502*4882a593Smuzhiyun  * @duplex: Current duplex
503*4882a593Smuzhiyun  * @port: Current port
504*4882a593Smuzhiyun  * @pause: Current pause
505*4882a593Smuzhiyun  * @asym_pause: Current asymmetric pause
506*4882a593Smuzhiyun  * @supported: Combined MAC/PHY supported linkmodes
507*4882a593Smuzhiyun  * @advertising: Currently advertised linkmodes
508*4882a593Smuzhiyun  * @adv_old: Saved advertised while power saving for WoL
509*4882a593Smuzhiyun  * @lp_advertising: Current link partner advertised linkmodes
510*4882a593Smuzhiyun  * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
511*4882a593Smuzhiyun  * @autoneg: Flag autoneg being used
512*4882a593Smuzhiyun  * @link: Current link state
513*4882a593Smuzhiyun  * @autoneg_complete: Flag auto negotiation of the link has completed
514*4882a593Smuzhiyun  * @mdix: Current crossover
515*4882a593Smuzhiyun  * @mdix_ctrl: User setting of crossover
516*4882a593Smuzhiyun  * @interrupts: Flag interrupts have been enabled
517*4882a593Smuzhiyun  * @interface: enum phy_interface_t value
518*4882a593Smuzhiyun  * @skb: Netlink message for cable diagnostics
519*4882a593Smuzhiyun  * @nest: Netlink nest used for cable diagnostics
520*4882a593Smuzhiyun  * @ehdr: nNtlink header for cable diagnostics
521*4882a593Smuzhiyun  * @phy_led_triggers: Array of LED triggers
522*4882a593Smuzhiyun  * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
523*4882a593Smuzhiyun  * @led_link_trigger: LED trigger for link up/down
524*4882a593Smuzhiyun  * @last_triggered: last LED trigger for link speed
525*4882a593Smuzhiyun  * @master_slave_set: User requested master/slave configuration
526*4882a593Smuzhiyun  * @master_slave_get: Current master/slave advertisement
527*4882a593Smuzhiyun  * @master_slave_state: Current master/slave configuration
528*4882a593Smuzhiyun  * @mii_ts: Pointer to time stamper callbacks
529*4882a593Smuzhiyun  * @lock:  Mutex for serialization access to PHY
530*4882a593Smuzhiyun  * @state_queue: Work queue for state machine
531*4882a593Smuzhiyun  * @shared: Pointer to private data shared by phys in one package
532*4882a593Smuzhiyun  * @priv: Pointer to driver private data
533*4882a593Smuzhiyun  *
534*4882a593Smuzhiyun  * interrupts currently only supports enabled or disabled,
535*4882a593Smuzhiyun  * but could be changed in the future to support enabling
536*4882a593Smuzhiyun  * and disabling specific interrupts
537*4882a593Smuzhiyun  *
538*4882a593Smuzhiyun  * Contains some infrastructure for polling and interrupt
539*4882a593Smuzhiyun  * handling, as well as handling shifts in PHY hardware state
540*4882a593Smuzhiyun  */
541*4882a593Smuzhiyun struct phy_device {
542*4882a593Smuzhiyun 	struct mdio_device mdio;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	/* Information about the PHY type */
545*4882a593Smuzhiyun 	/* And management functions */
546*4882a593Smuzhiyun 	struct phy_driver *drv;
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	u32 phy_id;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	struct phy_c45_device_ids c45_ids;
551*4882a593Smuzhiyun 	unsigned is_c45:1;
552*4882a593Smuzhiyun 	unsigned is_internal:1;
553*4882a593Smuzhiyun 	unsigned is_pseudo_fixed_link:1;
554*4882a593Smuzhiyun 	unsigned is_gigabit_capable:1;
555*4882a593Smuzhiyun 	unsigned has_fixups:1;
556*4882a593Smuzhiyun 	unsigned suspended:1;
557*4882a593Smuzhiyun 	unsigned suspended_by_mdio_bus:1;
558*4882a593Smuzhiyun 	unsigned sysfs_links:1;
559*4882a593Smuzhiyun 	unsigned loopback_enabled:1;
560*4882a593Smuzhiyun 	unsigned downshifted_rate:1;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	unsigned autoneg:1;
563*4882a593Smuzhiyun 	/* The most recently read link state */
564*4882a593Smuzhiyun 	unsigned link:1;
565*4882a593Smuzhiyun 	unsigned autoneg_complete:1;
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	/* Interrupts are enabled */
568*4882a593Smuzhiyun 	unsigned interrupts:1;
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 	enum phy_state state;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	u32 dev_flags;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	phy_interface_t interface;
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	/*
577*4882a593Smuzhiyun 	 * forced speed & duplex (no autoneg)
578*4882a593Smuzhiyun 	 * partner speed & duplex & pause (autoneg)
579*4882a593Smuzhiyun 	 */
580*4882a593Smuzhiyun 	int speed;
581*4882a593Smuzhiyun 	int duplex;
582*4882a593Smuzhiyun 	int port;
583*4882a593Smuzhiyun 	int pause;
584*4882a593Smuzhiyun 	int asym_pause;
585*4882a593Smuzhiyun 	u8 master_slave_get;
586*4882a593Smuzhiyun 	u8 master_slave_set;
587*4882a593Smuzhiyun 	u8 master_slave_state;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	/* Union of PHY and Attached devices' supported link modes */
590*4882a593Smuzhiyun 	/* See ethtool.h for more info */
591*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
592*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
593*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
594*4882a593Smuzhiyun 	/* used with phy_speed_down */
595*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	/* Energy efficient ethernet modes which should be prohibited */
598*4882a593Smuzhiyun 	u32 eee_broken_modes;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun #ifdef CONFIG_LED_TRIGGER_PHY
601*4882a593Smuzhiyun 	struct phy_led_trigger *phy_led_triggers;
602*4882a593Smuzhiyun 	unsigned int phy_num_led_triggers;
603*4882a593Smuzhiyun 	struct phy_led_trigger *last_triggered;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	struct phy_led_trigger *led_link_trigger;
606*4882a593Smuzhiyun #endif
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 	/*
609*4882a593Smuzhiyun 	 * Interrupt number for this PHY
610*4882a593Smuzhiyun 	 * -1 means no interrupt
611*4882a593Smuzhiyun 	 */
612*4882a593Smuzhiyun 	int irq;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	/* private data pointer */
615*4882a593Smuzhiyun 	/* For use by PHYs to maintain extra state */
616*4882a593Smuzhiyun 	void *priv;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	/* shared data pointer */
619*4882a593Smuzhiyun 	/* For use by PHYs inside the same package that need a shared state. */
620*4882a593Smuzhiyun 	struct phy_package_shared *shared;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	/* Reporting cable test results */
623*4882a593Smuzhiyun 	struct sk_buff *skb;
624*4882a593Smuzhiyun 	void *ehdr;
625*4882a593Smuzhiyun 	struct nlattr *nest;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	/* Interrupt and Polling infrastructure */
628*4882a593Smuzhiyun 	struct delayed_work state_queue;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	struct mutex lock;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	/* This may be modified under the rtnl lock */
633*4882a593Smuzhiyun 	bool sfp_bus_attached;
634*4882a593Smuzhiyun 	struct sfp_bus *sfp_bus;
635*4882a593Smuzhiyun 	struct phylink *phylink;
636*4882a593Smuzhiyun 	struct net_device *attached_dev;
637*4882a593Smuzhiyun 	struct mii_timestamper *mii_ts;
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	u8 mdix;
640*4882a593Smuzhiyun 	u8 mdix_ctrl;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	void (*phy_link_change)(struct phy_device *phydev, bool up);
643*4882a593Smuzhiyun 	void (*adjust_link)(struct net_device *dev);
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_MACSEC)
646*4882a593Smuzhiyun 	/* MACsec management functions */
647*4882a593Smuzhiyun 	const struct macsec_ops *macsec_ops;
648*4882a593Smuzhiyun #endif
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(1);
651*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(2);
652*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(3);
653*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(4);
654*4882a593Smuzhiyun };
655*4882a593Smuzhiyun #define to_phy_device(d) container_of(to_mdio_device(d), \
656*4882a593Smuzhiyun 				      struct phy_device, mdio)
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun /**
659*4882a593Smuzhiyun  * struct phy_tdr_config - Configuration of a TDR raw test
660*4882a593Smuzhiyun  *
661*4882a593Smuzhiyun  * @first: Distance for first data collection point
662*4882a593Smuzhiyun  * @last: Distance for last data collection point
663*4882a593Smuzhiyun  * @step: Step between data collection points
664*4882a593Smuzhiyun  * @pair: Bitmap of cable pairs to collect data for
665*4882a593Smuzhiyun  *
666*4882a593Smuzhiyun  * A structure containing possible configuration parameters
667*4882a593Smuzhiyun  * for a TDR cable test. The driver does not need to implement
668*4882a593Smuzhiyun  * all the parameters, but should report what is actually used.
669*4882a593Smuzhiyun  * All distances are in centimeters.
670*4882a593Smuzhiyun  */
671*4882a593Smuzhiyun struct phy_tdr_config {
672*4882a593Smuzhiyun 	u32 first;
673*4882a593Smuzhiyun 	u32 last;
674*4882a593Smuzhiyun 	u32 step;
675*4882a593Smuzhiyun 	s8 pair;
676*4882a593Smuzhiyun };
677*4882a593Smuzhiyun #define PHY_PAIR_ALL -1
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun /**
680*4882a593Smuzhiyun  * struct phy_driver - Driver structure for a particular PHY type
681*4882a593Smuzhiyun  *
682*4882a593Smuzhiyun  * @mdiodrv: Data common to all MDIO devices
683*4882a593Smuzhiyun  * @phy_id: The result of reading the UID registers of this PHY
684*4882a593Smuzhiyun  *   type, and ANDing them with the phy_id_mask.  This driver
685*4882a593Smuzhiyun  *   only works for PHYs with IDs which match this field
686*4882a593Smuzhiyun  * @name: The friendly name of this PHY type
687*4882a593Smuzhiyun  * @phy_id_mask: Defines the important bits of the phy_id
688*4882a593Smuzhiyun  * @features: A mandatory list of features (speed, duplex, etc)
689*4882a593Smuzhiyun  *   supported by this PHY
690*4882a593Smuzhiyun  * @flags: A bitfield defining certain other features this PHY
691*4882a593Smuzhiyun  *   supports (like interrupts)
692*4882a593Smuzhiyun  * @driver_data: Static driver data
693*4882a593Smuzhiyun  *
694*4882a593Smuzhiyun  * All functions are optional. If config_aneg or read_status
695*4882a593Smuzhiyun  * are not implemented, the phy core uses the genphy versions.
696*4882a593Smuzhiyun  * Note that none of these functions should be called from
697*4882a593Smuzhiyun  * interrupt time. The goal is for the bus read/write functions
698*4882a593Smuzhiyun  * to be able to block when the bus transaction is happening,
699*4882a593Smuzhiyun  * and be freed up by an interrupt (The MPC85xx has this ability,
700*4882a593Smuzhiyun  * though it is not currently supported in the driver).
701*4882a593Smuzhiyun  */
702*4882a593Smuzhiyun struct phy_driver {
703*4882a593Smuzhiyun 	struct mdio_driver_common mdiodrv;
704*4882a593Smuzhiyun 	u32 phy_id;
705*4882a593Smuzhiyun 	char *name;
706*4882a593Smuzhiyun 	u32 phy_id_mask;
707*4882a593Smuzhiyun 	const unsigned long * const features;
708*4882a593Smuzhiyun 	u32 flags;
709*4882a593Smuzhiyun 	const void *driver_data;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	/**
712*4882a593Smuzhiyun 	 * @soft_reset: Called to issue a PHY software reset
713*4882a593Smuzhiyun 	 */
714*4882a593Smuzhiyun 	int (*soft_reset)(struct phy_device *phydev);
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	/**
717*4882a593Smuzhiyun 	 * @config_init: Called to initialize the PHY,
718*4882a593Smuzhiyun 	 * including after a reset
719*4882a593Smuzhiyun 	 */
720*4882a593Smuzhiyun 	int (*config_init)(struct phy_device *phydev);
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	/**
723*4882a593Smuzhiyun 	 * @probe: Called during discovery.  Used to set
724*4882a593Smuzhiyun 	 * up device-specific structures, if any
725*4882a593Smuzhiyun 	 */
726*4882a593Smuzhiyun 	int (*probe)(struct phy_device *phydev);
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	/**
729*4882a593Smuzhiyun 	 * @get_features: Probe the hardware to determine what
730*4882a593Smuzhiyun 	 * abilities it has.  Should only set phydev->supported.
731*4882a593Smuzhiyun 	 */
732*4882a593Smuzhiyun 	int (*get_features)(struct phy_device *phydev);
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	/* PHY Power Management */
735*4882a593Smuzhiyun 	/** @suspend: Suspend the hardware, saving state if needed */
736*4882a593Smuzhiyun 	int (*suspend)(struct phy_device *phydev);
737*4882a593Smuzhiyun 	/** @resume: Resume the hardware, restoring state if needed */
738*4882a593Smuzhiyun 	int (*resume)(struct phy_device *phydev);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 	/**
741*4882a593Smuzhiyun 	 * @config_aneg: Configures the advertisement and resets
742*4882a593Smuzhiyun 	 * autonegotiation if phydev->autoneg is on,
743*4882a593Smuzhiyun 	 * forces the speed to the current settings in phydev
744*4882a593Smuzhiyun 	 * if phydev->autoneg is off
745*4882a593Smuzhiyun 	 */
746*4882a593Smuzhiyun 	int (*config_aneg)(struct phy_device *phydev);
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	/** @aneg_done: Determines the auto negotiation result */
749*4882a593Smuzhiyun 	int (*aneg_done)(struct phy_device *phydev);
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	/** @read_status: Determines the negotiated speed and duplex */
752*4882a593Smuzhiyun 	int (*read_status)(struct phy_device *phydev);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	/** @ack_interrupt: Clears any pending interrupts */
755*4882a593Smuzhiyun 	int (*ack_interrupt)(struct phy_device *phydev);
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun 	/** @config_intr: Enables or disables interrupts */
758*4882a593Smuzhiyun 	int (*config_intr)(struct phy_device *phydev);
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun 	/**
761*4882a593Smuzhiyun 	 * @did_interrupt: Checks if the PHY generated an interrupt.
762*4882a593Smuzhiyun 	 * For multi-PHY devices with shared PHY interrupt pin
763*4882a593Smuzhiyun 	 * Set interrupt bits have to be cleared.
764*4882a593Smuzhiyun 	 */
765*4882a593Smuzhiyun 	int (*did_interrupt)(struct phy_device *phydev);
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 	/** @handle_interrupt: Override default interrupt handling */
768*4882a593Smuzhiyun 	irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	/** @remove: Clears up any memory if needed */
771*4882a593Smuzhiyun 	void (*remove)(struct phy_device *phydev);
772*4882a593Smuzhiyun 
773*4882a593Smuzhiyun 	/**
774*4882a593Smuzhiyun 	 * @match_phy_device: Returns true if this is a suitable
775*4882a593Smuzhiyun 	 * driver for the given phydev.	 If NULL, matching is based on
776*4882a593Smuzhiyun 	 * phy_id and phy_id_mask.
777*4882a593Smuzhiyun 	 */
778*4882a593Smuzhiyun 	int (*match_phy_device)(struct phy_device *phydev);
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	/**
781*4882a593Smuzhiyun 	 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
782*4882a593Smuzhiyun 	 * register changes to enable Wake on LAN, so set_wol is
783*4882a593Smuzhiyun 	 * provided to be called in the ethernet driver's set_wol
784*4882a593Smuzhiyun 	 * function.
785*4882a593Smuzhiyun 	 */
786*4882a593Smuzhiyun 	int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	/**
789*4882a593Smuzhiyun 	 * @get_wol: See set_wol, but for checking whether Wake on LAN
790*4882a593Smuzhiyun 	 * is enabled.
791*4882a593Smuzhiyun 	 */
792*4882a593Smuzhiyun 	void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	/**
795*4882a593Smuzhiyun 	 * @link_change_notify: Called to inform a PHY device driver
796*4882a593Smuzhiyun 	 * when the core is about to change the link state. This
797*4882a593Smuzhiyun 	 * callback is supposed to be used as fixup hook for drivers
798*4882a593Smuzhiyun 	 * that need to take action when the link state
799*4882a593Smuzhiyun 	 * changes. Drivers are by no means allowed to mess with the
800*4882a593Smuzhiyun 	 * PHY device structure in their implementations.
801*4882a593Smuzhiyun 	 */
802*4882a593Smuzhiyun 	void (*link_change_notify)(struct phy_device *dev);
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	/**
805*4882a593Smuzhiyun 	 * @read_mmd: PHY specific driver override for reading a MMD
806*4882a593Smuzhiyun 	 * register.  This function is optional for PHY specific
807*4882a593Smuzhiyun 	 * drivers.  When not provided, the default MMD read function
808*4882a593Smuzhiyun 	 * will be used by phy_read_mmd(), which will use either a
809*4882a593Smuzhiyun 	 * direct read for Clause 45 PHYs or an indirect read for
810*4882a593Smuzhiyun 	 * Clause 22 PHYs.  devnum is the MMD device number within the
811*4882a593Smuzhiyun 	 * PHY device, regnum is the register within the selected MMD
812*4882a593Smuzhiyun 	 * device.
813*4882a593Smuzhiyun 	 */
814*4882a593Smuzhiyun 	int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	/**
817*4882a593Smuzhiyun 	 * @write_mmd: PHY specific driver override for writing a MMD
818*4882a593Smuzhiyun 	 * register.  This function is optional for PHY specific
819*4882a593Smuzhiyun 	 * drivers.  When not provided, the default MMD write function
820*4882a593Smuzhiyun 	 * will be used by phy_write_mmd(), which will use either a
821*4882a593Smuzhiyun 	 * direct write for Clause 45 PHYs, or an indirect write for
822*4882a593Smuzhiyun 	 * Clause 22 PHYs.  devnum is the MMD device number within the
823*4882a593Smuzhiyun 	 * PHY device, regnum is the register within the selected MMD
824*4882a593Smuzhiyun 	 * device.  val is the value to be written.
825*4882a593Smuzhiyun 	 */
826*4882a593Smuzhiyun 	int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
827*4882a593Smuzhiyun 			 u16 val);
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	/** @read_page: Return the current PHY register page number */
830*4882a593Smuzhiyun 	int (*read_page)(struct phy_device *dev);
831*4882a593Smuzhiyun 	/** @write_page: Set the current PHY register page number */
832*4882a593Smuzhiyun 	int (*write_page)(struct phy_device *dev, int page);
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	/**
835*4882a593Smuzhiyun 	 * @module_info: Get the size and type of the eeprom contained
836*4882a593Smuzhiyun 	 * within a plug-in module
837*4882a593Smuzhiyun 	 */
838*4882a593Smuzhiyun 	int (*module_info)(struct phy_device *dev,
839*4882a593Smuzhiyun 			   struct ethtool_modinfo *modinfo);
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	/**
842*4882a593Smuzhiyun 	 * @module_eeprom: Get the eeprom information from the plug-in
843*4882a593Smuzhiyun 	 * module
844*4882a593Smuzhiyun 	 */
845*4882a593Smuzhiyun 	int (*module_eeprom)(struct phy_device *dev,
846*4882a593Smuzhiyun 			     struct ethtool_eeprom *ee, u8 *data);
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun 	/** @cable_test_start: Start a cable test */
849*4882a593Smuzhiyun 	int (*cable_test_start)(struct phy_device *dev);
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	/**  @cable_test_tdr_start: Start a raw TDR cable test */
852*4882a593Smuzhiyun 	int (*cable_test_tdr_start)(struct phy_device *dev,
853*4882a593Smuzhiyun 				    const struct phy_tdr_config *config);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	/**
856*4882a593Smuzhiyun 	 * @cable_test_get_status: Once per second, or on interrupt,
857*4882a593Smuzhiyun 	 * request the status of the test.
858*4882a593Smuzhiyun 	 */
859*4882a593Smuzhiyun 	int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	/* Get statistics from the PHY using ethtool */
862*4882a593Smuzhiyun 	/** @get_sset_count: Number of statistic counters */
863*4882a593Smuzhiyun 	int (*get_sset_count)(struct phy_device *dev);
864*4882a593Smuzhiyun 	/** @get_strings: Names of the statistic counters */
865*4882a593Smuzhiyun 	void (*get_strings)(struct phy_device *dev, u8 *data);
866*4882a593Smuzhiyun 	/** @get_stats: Return the statistic counter values */
867*4882a593Smuzhiyun 	void (*get_stats)(struct phy_device *dev,
868*4882a593Smuzhiyun 			  struct ethtool_stats *stats, u64 *data);
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 	/* Get and Set PHY tunables */
871*4882a593Smuzhiyun 	/** @get_tunable: Return the value of a tunable */
872*4882a593Smuzhiyun 	int (*get_tunable)(struct phy_device *dev,
873*4882a593Smuzhiyun 			   struct ethtool_tunable *tuna, void *data);
874*4882a593Smuzhiyun 	/** @set_tunable: Set the value of a tunable */
875*4882a593Smuzhiyun 	int (*set_tunable)(struct phy_device *dev,
876*4882a593Smuzhiyun 			    struct ethtool_tunable *tuna,
877*4882a593Smuzhiyun 			    const void *data);
878*4882a593Smuzhiyun 	/** @set_loopback: Set the loopback mood of the PHY */
879*4882a593Smuzhiyun 	int (*set_loopback)(struct phy_device *dev, bool enable);
880*4882a593Smuzhiyun 	/** @get_sqi: Get the signal quality indication */
881*4882a593Smuzhiyun 	int (*get_sqi)(struct phy_device *dev);
882*4882a593Smuzhiyun 	/** @get_sqi_max: Get the maximum signal quality indication */
883*4882a593Smuzhiyun 	int (*get_sqi_max)(struct phy_device *dev);
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(1);
886*4882a593Smuzhiyun 	ANDROID_KABI_RESERVE(2);
887*4882a593Smuzhiyun };
888*4882a593Smuzhiyun #define to_phy_driver(d) container_of(to_mdio_common_driver(d),		\
889*4882a593Smuzhiyun 				      struct phy_driver, mdiodrv)
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun #define PHY_ANY_ID "MATCH ANY PHY"
892*4882a593Smuzhiyun #define PHY_ANY_UID 0xffffffff
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
895*4882a593Smuzhiyun #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
896*4882a593Smuzhiyun #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun /* A Structure for boards to register fixups with the PHY Lib */
899*4882a593Smuzhiyun struct phy_fixup {
900*4882a593Smuzhiyun 	struct list_head list;
901*4882a593Smuzhiyun 	char bus_id[MII_BUS_ID_SIZE + 3];
902*4882a593Smuzhiyun 	u32 phy_uid;
903*4882a593Smuzhiyun 	u32 phy_uid_mask;
904*4882a593Smuzhiyun 	int (*run)(struct phy_device *phydev);
905*4882a593Smuzhiyun };
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun const char *phy_speed_to_str(int speed);
908*4882a593Smuzhiyun const char *phy_duplex_to_str(unsigned int duplex);
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun /* A structure for mapping a particular speed and duplex
911*4882a593Smuzhiyun  * combination to a particular SUPPORTED and ADVERTISED value
912*4882a593Smuzhiyun  */
913*4882a593Smuzhiyun struct phy_setting {
914*4882a593Smuzhiyun 	u32 speed;
915*4882a593Smuzhiyun 	u8 duplex;
916*4882a593Smuzhiyun 	u8 bit;
917*4882a593Smuzhiyun };
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun const struct phy_setting *
920*4882a593Smuzhiyun phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
921*4882a593Smuzhiyun 		   bool exact);
922*4882a593Smuzhiyun size_t phy_speeds(unsigned int *speeds, size_t size,
923*4882a593Smuzhiyun 		  unsigned long *mask);
924*4882a593Smuzhiyun void of_set_phy_supported(struct phy_device *phydev);
925*4882a593Smuzhiyun void of_set_phy_eee_broken(struct phy_device *phydev);
926*4882a593Smuzhiyun int phy_speed_down_core(struct phy_device *phydev);
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun /**
929*4882a593Smuzhiyun  * phy_is_started - Convenience function to check whether PHY is started
930*4882a593Smuzhiyun  * @phydev: The phy_device struct
931*4882a593Smuzhiyun  */
932*4882a593Smuzhiyun static inline bool phy_is_started(struct phy_device *phydev)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun 	return phydev->state >= PHY_UP;
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun void phy_resolve_aneg_pause(struct phy_device *phydev);
938*4882a593Smuzhiyun void phy_resolve_aneg_linkmode(struct phy_device *phydev);
939*4882a593Smuzhiyun void phy_check_downshift(struct phy_device *phydev);
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun /**
942*4882a593Smuzhiyun  * phy_read - Convenience function for reading a given PHY register
943*4882a593Smuzhiyun  * @phydev: the phy_device struct
944*4882a593Smuzhiyun  * @regnum: register number to read
945*4882a593Smuzhiyun  *
946*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
947*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
948*4882a593Smuzhiyun  * to conclude the operation.
949*4882a593Smuzhiyun  */
950*4882a593Smuzhiyun static inline int phy_read(struct phy_device *phydev, u32 regnum)
951*4882a593Smuzhiyun {
952*4882a593Smuzhiyun 	return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
956*4882a593Smuzhiyun 				timeout_us, sleep_before_read) \
957*4882a593Smuzhiyun ({ \
958*4882a593Smuzhiyun 	int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
959*4882a593Smuzhiyun 		sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
960*4882a593Smuzhiyun 	if (val <  0) \
961*4882a593Smuzhiyun 		__ret = val; \
962*4882a593Smuzhiyun 	if (__ret) \
963*4882a593Smuzhiyun 		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
964*4882a593Smuzhiyun 	__ret; \
965*4882a593Smuzhiyun })
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun /**
969*4882a593Smuzhiyun  * __phy_read - convenience function for reading a given PHY register
970*4882a593Smuzhiyun  * @phydev: the phy_device struct
971*4882a593Smuzhiyun  * @regnum: register number to read
972*4882a593Smuzhiyun  *
973*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
974*4882a593Smuzhiyun  */
975*4882a593Smuzhiyun static inline int __phy_read(struct phy_device *phydev, u32 regnum)
976*4882a593Smuzhiyun {
977*4882a593Smuzhiyun 	return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
978*4882a593Smuzhiyun }
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun /**
981*4882a593Smuzhiyun  * phy_write - Convenience function for writing a given PHY register
982*4882a593Smuzhiyun  * @phydev: the phy_device struct
983*4882a593Smuzhiyun  * @regnum: register number to write
984*4882a593Smuzhiyun  * @val: value to write to @regnum
985*4882a593Smuzhiyun  *
986*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
987*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
988*4882a593Smuzhiyun  * to conclude the operation.
989*4882a593Smuzhiyun  */
990*4882a593Smuzhiyun static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun 	return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun /**
996*4882a593Smuzhiyun  * __phy_write - Convenience function for writing a given PHY register
997*4882a593Smuzhiyun  * @phydev: the phy_device struct
998*4882a593Smuzhiyun  * @regnum: register number to write
999*4882a593Smuzhiyun  * @val: value to write to @regnum
1000*4882a593Smuzhiyun  *
1001*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
1002*4882a593Smuzhiyun  */
1003*4882a593Smuzhiyun static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun 	return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1006*4882a593Smuzhiyun 			       val);
1007*4882a593Smuzhiyun }
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun /**
1010*4882a593Smuzhiyun  * __phy_modify_changed() - Convenience function for modifying a PHY register
1011*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
1012*4882a593Smuzhiyun  * @regnum: register number
1013*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
1014*4882a593Smuzhiyun  * @set: bit mask of bits to set
1015*4882a593Smuzhiyun  *
1016*4882a593Smuzhiyun  * Unlocked helper function which allows a PHY register to be modified as
1017*4882a593Smuzhiyun  * new register value = (old register value & ~mask) | set
1018*4882a593Smuzhiyun  *
1019*4882a593Smuzhiyun  * Returns negative errno, 0 if there was no change, and 1 in case of change
1020*4882a593Smuzhiyun  */
1021*4882a593Smuzhiyun static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1022*4882a593Smuzhiyun 				       u16 mask, u16 set)
1023*4882a593Smuzhiyun {
1024*4882a593Smuzhiyun 	return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1025*4882a593Smuzhiyun 					regnum, mask, set);
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun /*
1029*4882a593Smuzhiyun  * phy_read_mmd - Convenience function for reading a register
1030*4882a593Smuzhiyun  * from an MMD on a given PHY.
1031*4882a593Smuzhiyun  */
1032*4882a593Smuzhiyun int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun /**
1035*4882a593Smuzhiyun  * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1036*4882a593Smuzhiyun  *                             condition is met or a timeout occurs
1037*4882a593Smuzhiyun  *
1038*4882a593Smuzhiyun  * @phydev: The phy_device struct
1039*4882a593Smuzhiyun  * @devaddr: The MMD to read from
1040*4882a593Smuzhiyun  * @regnum: The register on the MMD to read
1041*4882a593Smuzhiyun  * @val: Variable to read the register into
1042*4882a593Smuzhiyun  * @cond: Break condition (usually involving @val)
1043*4882a593Smuzhiyun  * @sleep_us: Maximum time to sleep between reads in us (0
1044*4882a593Smuzhiyun  *            tight-loops).  Should be less than ~20ms since usleep_range
1045*4882a593Smuzhiyun  *            is used (see Documentation/timers/timers-howto.rst).
1046*4882a593Smuzhiyun  * @timeout_us: Timeout in us, 0 means never timeout
1047*4882a593Smuzhiyun  * @sleep_before_read: if it is true, sleep @sleep_us before read.
1048*4882a593Smuzhiyun  * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1049*4882a593Smuzhiyun  * case, the last read value at @args is stored in @val. Must not
1050*4882a593Smuzhiyun  * be called from atomic context if sleep_us or timeout_us are used.
1051*4882a593Smuzhiyun  */
1052*4882a593Smuzhiyun #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1053*4882a593Smuzhiyun 				  sleep_us, timeout_us, sleep_before_read) \
1054*4882a593Smuzhiyun ({ \
1055*4882a593Smuzhiyun 	int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1056*4882a593Smuzhiyun 				  sleep_us, timeout_us, sleep_before_read, \
1057*4882a593Smuzhiyun 				  phydev, devaddr, regnum); \
1058*4882a593Smuzhiyun 	if (val <  0) \
1059*4882a593Smuzhiyun 		__ret = val; \
1060*4882a593Smuzhiyun 	if (__ret) \
1061*4882a593Smuzhiyun 		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1062*4882a593Smuzhiyun 	__ret; \
1063*4882a593Smuzhiyun })
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun /*
1066*4882a593Smuzhiyun  * __phy_read_mmd - Convenience function for reading a register
1067*4882a593Smuzhiyun  * from an MMD on a given PHY.
1068*4882a593Smuzhiyun  */
1069*4882a593Smuzhiyun int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun /*
1072*4882a593Smuzhiyun  * phy_write_mmd - Convenience function for writing a register
1073*4882a593Smuzhiyun  * on an MMD on a given PHY.
1074*4882a593Smuzhiyun  */
1075*4882a593Smuzhiyun int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun /*
1078*4882a593Smuzhiyun  * __phy_write_mmd - Convenience function for writing a register
1079*4882a593Smuzhiyun  * on an MMD on a given PHY.
1080*4882a593Smuzhiyun  */
1081*4882a593Smuzhiyun int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1084*4882a593Smuzhiyun 			 u16 set);
1085*4882a593Smuzhiyun int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1086*4882a593Smuzhiyun 		       u16 set);
1087*4882a593Smuzhiyun int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1088*4882a593Smuzhiyun int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1091*4882a593Smuzhiyun 			     u16 mask, u16 set);
1092*4882a593Smuzhiyun int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1093*4882a593Smuzhiyun 			   u16 mask, u16 set);
1094*4882a593Smuzhiyun int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1095*4882a593Smuzhiyun 		     u16 mask, u16 set);
1096*4882a593Smuzhiyun int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1097*4882a593Smuzhiyun 		   u16 mask, u16 set);
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun /**
1100*4882a593Smuzhiyun  * __phy_set_bits - Convenience function for setting bits in a PHY register
1101*4882a593Smuzhiyun  * @phydev: the phy_device struct
1102*4882a593Smuzhiyun  * @regnum: register number to write
1103*4882a593Smuzhiyun  * @val: bits to set
1104*4882a593Smuzhiyun  *
1105*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
1106*4882a593Smuzhiyun  */
1107*4882a593Smuzhiyun static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun 	return __phy_modify(phydev, regnum, 0, val);
1110*4882a593Smuzhiyun }
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun /**
1113*4882a593Smuzhiyun  * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1114*4882a593Smuzhiyun  * @phydev: the phy_device struct
1115*4882a593Smuzhiyun  * @regnum: register number to write
1116*4882a593Smuzhiyun  * @val: bits to clear
1117*4882a593Smuzhiyun  *
1118*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
1119*4882a593Smuzhiyun  */
1120*4882a593Smuzhiyun static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1121*4882a593Smuzhiyun 				   u16 val)
1122*4882a593Smuzhiyun {
1123*4882a593Smuzhiyun 	return __phy_modify(phydev, regnum, val, 0);
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun /**
1127*4882a593Smuzhiyun  * phy_set_bits - Convenience function for setting bits in a PHY register
1128*4882a593Smuzhiyun  * @phydev: the phy_device struct
1129*4882a593Smuzhiyun  * @regnum: register number to write
1130*4882a593Smuzhiyun  * @val: bits to set
1131*4882a593Smuzhiyun  */
1132*4882a593Smuzhiyun static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1133*4882a593Smuzhiyun {
1134*4882a593Smuzhiyun 	return phy_modify(phydev, regnum, 0, val);
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun /**
1138*4882a593Smuzhiyun  * phy_clear_bits - Convenience function for clearing bits in a PHY register
1139*4882a593Smuzhiyun  * @phydev: the phy_device struct
1140*4882a593Smuzhiyun  * @regnum: register number to write
1141*4882a593Smuzhiyun  * @val: bits to clear
1142*4882a593Smuzhiyun  */
1143*4882a593Smuzhiyun static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1144*4882a593Smuzhiyun {
1145*4882a593Smuzhiyun 	return phy_modify(phydev, regnum, val, 0);
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun /**
1149*4882a593Smuzhiyun  * __phy_set_bits_mmd - Convenience function for setting bits in a register
1150*4882a593Smuzhiyun  * on MMD
1151*4882a593Smuzhiyun  * @phydev: the phy_device struct
1152*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
1153*4882a593Smuzhiyun  * @regnum: register number to modify
1154*4882a593Smuzhiyun  * @val: bits to set
1155*4882a593Smuzhiyun  *
1156*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
1157*4882a593Smuzhiyun  */
1158*4882a593Smuzhiyun static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1159*4882a593Smuzhiyun 		u32 regnum, u16 val)
1160*4882a593Smuzhiyun {
1161*4882a593Smuzhiyun 	return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun 
1164*4882a593Smuzhiyun /**
1165*4882a593Smuzhiyun  * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1166*4882a593Smuzhiyun  * on MMD
1167*4882a593Smuzhiyun  * @phydev: the phy_device struct
1168*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
1169*4882a593Smuzhiyun  * @regnum: register number to modify
1170*4882a593Smuzhiyun  * @val: bits to clear
1171*4882a593Smuzhiyun  *
1172*4882a593Smuzhiyun  * The caller must have taken the MDIO bus lock.
1173*4882a593Smuzhiyun  */
1174*4882a593Smuzhiyun static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1175*4882a593Smuzhiyun 		u32 regnum, u16 val)
1176*4882a593Smuzhiyun {
1177*4882a593Smuzhiyun 	return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun 
1180*4882a593Smuzhiyun /**
1181*4882a593Smuzhiyun  * phy_set_bits_mmd - Convenience function for setting bits in a register
1182*4882a593Smuzhiyun  * on MMD
1183*4882a593Smuzhiyun  * @phydev: the phy_device struct
1184*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
1185*4882a593Smuzhiyun  * @regnum: register number to modify
1186*4882a593Smuzhiyun  * @val: bits to set
1187*4882a593Smuzhiyun  */
1188*4882a593Smuzhiyun static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1189*4882a593Smuzhiyun 		u32 regnum, u16 val)
1190*4882a593Smuzhiyun {
1191*4882a593Smuzhiyun 	return phy_modify_mmd(phydev, devad, regnum, 0, val);
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun /**
1195*4882a593Smuzhiyun  * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1196*4882a593Smuzhiyun  * on MMD
1197*4882a593Smuzhiyun  * @phydev: the phy_device struct
1198*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
1199*4882a593Smuzhiyun  * @regnum: register number to modify
1200*4882a593Smuzhiyun  * @val: bits to clear
1201*4882a593Smuzhiyun  */
1202*4882a593Smuzhiyun static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1203*4882a593Smuzhiyun 		u32 regnum, u16 val)
1204*4882a593Smuzhiyun {
1205*4882a593Smuzhiyun 	return phy_modify_mmd(phydev, devad, regnum, val, 0);
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun 
1208*4882a593Smuzhiyun /**
1209*4882a593Smuzhiyun  * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1210*4882a593Smuzhiyun  * @phydev: the phy_device struct
1211*4882a593Smuzhiyun  *
1212*4882a593Smuzhiyun  * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1213*4882a593Smuzhiyun  * PHY_IGNORE_INTERRUPT
1214*4882a593Smuzhiyun  */
1215*4882a593Smuzhiyun static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1216*4882a593Smuzhiyun {
1217*4882a593Smuzhiyun 	return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
1218*4882a593Smuzhiyun }
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun /**
1221*4882a593Smuzhiyun  * phy_polling_mode - Convenience function for testing whether polling is
1222*4882a593Smuzhiyun  * used to detect PHY status changes
1223*4882a593Smuzhiyun  * @phydev: the phy_device struct
1224*4882a593Smuzhiyun  */
1225*4882a593Smuzhiyun static inline bool phy_polling_mode(struct phy_device *phydev)
1226*4882a593Smuzhiyun {
1227*4882a593Smuzhiyun 	if (phydev->state == PHY_CABLETEST)
1228*4882a593Smuzhiyun 		if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1229*4882a593Smuzhiyun 			return true;
1230*4882a593Smuzhiyun 
1231*4882a593Smuzhiyun 	return phydev->irq == PHY_POLL;
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun 
1234*4882a593Smuzhiyun /**
1235*4882a593Smuzhiyun  * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1236*4882a593Smuzhiyun  * @phydev: the phy_device struct
1237*4882a593Smuzhiyun  */
1238*4882a593Smuzhiyun static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1239*4882a593Smuzhiyun {
1240*4882a593Smuzhiyun 	return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1241*4882a593Smuzhiyun }
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun /**
1244*4882a593Smuzhiyun  * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1245*4882a593Smuzhiyun  * @phydev: the phy_device struct
1246*4882a593Smuzhiyun  */
1247*4882a593Smuzhiyun static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1248*4882a593Smuzhiyun {
1249*4882a593Smuzhiyun 	return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun 
1252*4882a593Smuzhiyun /**
1253*4882a593Smuzhiyun  * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1254*4882a593Smuzhiyun  * PTP hardware clock capabilities.
1255*4882a593Smuzhiyun  * @phydev: the phy_device struct
1256*4882a593Smuzhiyun  */
1257*4882a593Smuzhiyun static inline bool phy_has_tsinfo(struct phy_device *phydev)
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun 	return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun /**
1263*4882a593Smuzhiyun  * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1264*4882a593Smuzhiyun  * @phydev: the phy_device struct
1265*4882a593Smuzhiyun  */
1266*4882a593Smuzhiyun static inline bool phy_has_txtstamp(struct phy_device *phydev)
1267*4882a593Smuzhiyun {
1268*4882a593Smuzhiyun 	return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1272*4882a593Smuzhiyun {
1273*4882a593Smuzhiyun 	return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun 
1276*4882a593Smuzhiyun static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1277*4882a593Smuzhiyun 				int type)
1278*4882a593Smuzhiyun {
1279*4882a593Smuzhiyun 	return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun 
1282*4882a593Smuzhiyun static inline int phy_ts_info(struct phy_device *phydev,
1283*4882a593Smuzhiyun 			      struct ethtool_ts_info *tsinfo)
1284*4882a593Smuzhiyun {
1285*4882a593Smuzhiyun 	return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1289*4882a593Smuzhiyun 				int type)
1290*4882a593Smuzhiyun {
1291*4882a593Smuzhiyun 	phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1292*4882a593Smuzhiyun }
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun /**
1295*4882a593Smuzhiyun  * phy_is_internal - Convenience function for testing if a PHY is internal
1296*4882a593Smuzhiyun  * @phydev: the phy_device struct
1297*4882a593Smuzhiyun  */
1298*4882a593Smuzhiyun static inline bool phy_is_internal(struct phy_device *phydev)
1299*4882a593Smuzhiyun {
1300*4882a593Smuzhiyun 	return phydev->is_internal;
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun 
1303*4882a593Smuzhiyun /**
1304*4882a593Smuzhiyun  * phy_interface_mode_is_rgmii - Convenience function for testing if a
1305*4882a593Smuzhiyun  * PHY interface mode is RGMII (all variants)
1306*4882a593Smuzhiyun  * @mode: the &phy_interface_t enum
1307*4882a593Smuzhiyun  */
1308*4882a593Smuzhiyun static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1309*4882a593Smuzhiyun {
1310*4882a593Smuzhiyun 	return mode >= PHY_INTERFACE_MODE_RGMII &&
1311*4882a593Smuzhiyun 		mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1312*4882a593Smuzhiyun };
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun /**
1315*4882a593Smuzhiyun  * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1316*4882a593Smuzhiyun  *   negotiation
1317*4882a593Smuzhiyun  * @mode: one of &enum phy_interface_t
1318*4882a593Smuzhiyun  *
1319*4882a593Smuzhiyun  * Returns true if the PHY interface mode uses the 16-bit negotiation
1320*4882a593Smuzhiyun  * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1321*4882a593Smuzhiyun  */
1322*4882a593Smuzhiyun static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun 	return mode == PHY_INTERFACE_MODE_1000BASEX ||
1325*4882a593Smuzhiyun 	       mode == PHY_INTERFACE_MODE_2500BASEX;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun /**
1329*4882a593Smuzhiyun  * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1330*4882a593Smuzhiyun  * is RGMII (all variants)
1331*4882a593Smuzhiyun  * @phydev: the phy_device struct
1332*4882a593Smuzhiyun  */
1333*4882a593Smuzhiyun static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1334*4882a593Smuzhiyun {
1335*4882a593Smuzhiyun 	return phy_interface_mode_is_rgmii(phydev->interface);
1336*4882a593Smuzhiyun };
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun /**
1339*4882a593Smuzhiyun  * phy_is_pseudo_fixed_link - Convenience function for testing if this
1340*4882a593Smuzhiyun  * PHY is the CPU port facing side of an Ethernet switch, or similar.
1341*4882a593Smuzhiyun  * @phydev: the phy_device struct
1342*4882a593Smuzhiyun  */
1343*4882a593Smuzhiyun static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1344*4882a593Smuzhiyun {
1345*4882a593Smuzhiyun 	return phydev->is_pseudo_fixed_link;
1346*4882a593Smuzhiyun }
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun int phy_save_page(struct phy_device *phydev);
1349*4882a593Smuzhiyun int phy_select_page(struct phy_device *phydev, int page);
1350*4882a593Smuzhiyun int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1351*4882a593Smuzhiyun int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1352*4882a593Smuzhiyun int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1353*4882a593Smuzhiyun int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1354*4882a593Smuzhiyun 			     u16 mask, u16 set);
1355*4882a593Smuzhiyun int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1356*4882a593Smuzhiyun 		     u16 mask, u16 set);
1357*4882a593Smuzhiyun 
1358*4882a593Smuzhiyun struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1359*4882a593Smuzhiyun 				     bool is_c45,
1360*4882a593Smuzhiyun 				     struct phy_c45_device_ids *c45_ids);
1361*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_PHYLIB)
1362*4882a593Smuzhiyun struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1363*4882a593Smuzhiyun int phy_device_register(struct phy_device *phy);
1364*4882a593Smuzhiyun void phy_device_free(struct phy_device *phydev);
1365*4882a593Smuzhiyun #else
1366*4882a593Smuzhiyun static inline
1367*4882a593Smuzhiyun struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1368*4882a593Smuzhiyun {
1369*4882a593Smuzhiyun 	return NULL;
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun static inline int phy_device_register(struct phy_device *phy)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun 	return 0;
1375*4882a593Smuzhiyun }
1376*4882a593Smuzhiyun 
1377*4882a593Smuzhiyun static inline void phy_device_free(struct phy_device *phydev) { }
1378*4882a593Smuzhiyun #endif /* CONFIG_PHYLIB */
1379*4882a593Smuzhiyun void phy_device_remove(struct phy_device *phydev);
1380*4882a593Smuzhiyun int phy_init_hw(struct phy_device *phydev);
1381*4882a593Smuzhiyun int phy_suspend(struct phy_device *phydev);
1382*4882a593Smuzhiyun int phy_resume(struct phy_device *phydev);
1383*4882a593Smuzhiyun int __phy_resume(struct phy_device *phydev);
1384*4882a593Smuzhiyun int phy_loopback(struct phy_device *phydev, bool enable);
1385*4882a593Smuzhiyun void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1386*4882a593Smuzhiyun void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1387*4882a593Smuzhiyun int phy_sfp_probe(struct phy_device *phydev,
1388*4882a593Smuzhiyun 	          const struct sfp_upstream_ops *ops);
1389*4882a593Smuzhiyun struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1390*4882a593Smuzhiyun 			      phy_interface_t interface);
1391*4882a593Smuzhiyun struct phy_device *phy_find_first(struct mii_bus *bus);
1392*4882a593Smuzhiyun int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1393*4882a593Smuzhiyun 		      u32 flags, phy_interface_t interface);
1394*4882a593Smuzhiyun int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1395*4882a593Smuzhiyun 		       void (*handler)(struct net_device *),
1396*4882a593Smuzhiyun 		       phy_interface_t interface);
1397*4882a593Smuzhiyun struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1398*4882a593Smuzhiyun 			       void (*handler)(struct net_device *),
1399*4882a593Smuzhiyun 			       phy_interface_t interface);
1400*4882a593Smuzhiyun void phy_disconnect(struct phy_device *phydev);
1401*4882a593Smuzhiyun void phy_detach(struct phy_device *phydev);
1402*4882a593Smuzhiyun void phy_start(struct phy_device *phydev);
1403*4882a593Smuzhiyun void phy_stop(struct phy_device *phydev);
1404*4882a593Smuzhiyun int phy_start_aneg(struct phy_device *phydev);
1405*4882a593Smuzhiyun int phy_aneg_done(struct phy_device *phydev);
1406*4882a593Smuzhiyun int phy_speed_down(struct phy_device *phydev, bool sync);
1407*4882a593Smuzhiyun int phy_speed_up(struct phy_device *phydev);
1408*4882a593Smuzhiyun 
1409*4882a593Smuzhiyun int phy_restart_aneg(struct phy_device *phydev);
1410*4882a593Smuzhiyun int phy_reset_after_clk_enable(struct phy_device *phydev);
1411*4882a593Smuzhiyun 
1412*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_PHYLIB)
1413*4882a593Smuzhiyun int phy_start_cable_test(struct phy_device *phydev,
1414*4882a593Smuzhiyun 			 struct netlink_ext_ack *extack);
1415*4882a593Smuzhiyun int phy_start_cable_test_tdr(struct phy_device *phydev,
1416*4882a593Smuzhiyun 			     struct netlink_ext_ack *extack,
1417*4882a593Smuzhiyun 			     const struct phy_tdr_config *config);
1418*4882a593Smuzhiyun #else
1419*4882a593Smuzhiyun static inline
1420*4882a593Smuzhiyun int phy_start_cable_test(struct phy_device *phydev,
1421*4882a593Smuzhiyun 			 struct netlink_ext_ack *extack)
1422*4882a593Smuzhiyun {
1423*4882a593Smuzhiyun 	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1424*4882a593Smuzhiyun 	return -EOPNOTSUPP;
1425*4882a593Smuzhiyun }
1426*4882a593Smuzhiyun static inline
1427*4882a593Smuzhiyun int phy_start_cable_test_tdr(struct phy_device *phydev,
1428*4882a593Smuzhiyun 			     struct netlink_ext_ack *extack,
1429*4882a593Smuzhiyun 			     const struct phy_tdr_config *config)
1430*4882a593Smuzhiyun {
1431*4882a593Smuzhiyun 	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1432*4882a593Smuzhiyun 	return -EOPNOTSUPP;
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun #endif
1435*4882a593Smuzhiyun 
1436*4882a593Smuzhiyun int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1437*4882a593Smuzhiyun int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1438*4882a593Smuzhiyun 				u16 cm);
1439*4882a593Smuzhiyun 
1440*4882a593Smuzhiyun static inline void phy_device_reset(struct phy_device *phydev, int value)
1441*4882a593Smuzhiyun {
1442*4882a593Smuzhiyun 	mdio_device_reset(&phydev->mdio, value);
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun 
1445*4882a593Smuzhiyun #define phydev_err(_phydev, format, args...)	\
1446*4882a593Smuzhiyun 	dev_err(&_phydev->mdio.dev, format, ##args)
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun #define phydev_info(_phydev, format, args...)	\
1449*4882a593Smuzhiyun 	dev_info(&_phydev->mdio.dev, format, ##args)
1450*4882a593Smuzhiyun 
1451*4882a593Smuzhiyun #define phydev_warn(_phydev, format, args...)	\
1452*4882a593Smuzhiyun 	dev_warn(&_phydev->mdio.dev, format, ##args)
1453*4882a593Smuzhiyun 
1454*4882a593Smuzhiyun #define phydev_dbg(_phydev, format, args...)	\
1455*4882a593Smuzhiyun 	dev_dbg(&_phydev->mdio.dev, format, ##args)
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun static inline const char *phydev_name(const struct phy_device *phydev)
1458*4882a593Smuzhiyun {
1459*4882a593Smuzhiyun 	return dev_name(&phydev->mdio.dev);
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1463*4882a593Smuzhiyun {
1464*4882a593Smuzhiyun 	mutex_lock(&phydev->mdio.bus->mdio_lock);
1465*4882a593Smuzhiyun }
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1468*4882a593Smuzhiyun {
1469*4882a593Smuzhiyun 	mutex_unlock(&phydev->mdio.bus->mdio_lock);
1470*4882a593Smuzhiyun }
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1473*4882a593Smuzhiyun 	__printf(2, 3);
1474*4882a593Smuzhiyun char *phy_attached_info_irq(struct phy_device *phydev)
1475*4882a593Smuzhiyun 	__malloc;
1476*4882a593Smuzhiyun void phy_attached_info(struct phy_device *phydev);
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun /* Clause 22 PHY */
1479*4882a593Smuzhiyun int genphy_read_abilities(struct phy_device *phydev);
1480*4882a593Smuzhiyun int genphy_setup_forced(struct phy_device *phydev);
1481*4882a593Smuzhiyun int genphy_restart_aneg(struct phy_device *phydev);
1482*4882a593Smuzhiyun int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1483*4882a593Smuzhiyun int genphy_config_eee_advert(struct phy_device *phydev);
1484*4882a593Smuzhiyun int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1485*4882a593Smuzhiyun int genphy_aneg_done(struct phy_device *phydev);
1486*4882a593Smuzhiyun int genphy_update_link(struct phy_device *phydev);
1487*4882a593Smuzhiyun int genphy_read_lpa(struct phy_device *phydev);
1488*4882a593Smuzhiyun int genphy_read_status_fixed(struct phy_device *phydev);
1489*4882a593Smuzhiyun int genphy_read_status(struct phy_device *phydev);
1490*4882a593Smuzhiyun int genphy_suspend(struct phy_device *phydev);
1491*4882a593Smuzhiyun int genphy_resume(struct phy_device *phydev);
1492*4882a593Smuzhiyun int genphy_loopback(struct phy_device *phydev, bool enable);
1493*4882a593Smuzhiyun int genphy_soft_reset(struct phy_device *phydev);
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun static inline int genphy_config_aneg(struct phy_device *phydev)
1496*4882a593Smuzhiyun {
1497*4882a593Smuzhiyun 	return __genphy_config_aneg(phydev, false);
1498*4882a593Smuzhiyun }
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1501*4882a593Smuzhiyun {
1502*4882a593Smuzhiyun 	return 0;
1503*4882a593Smuzhiyun }
1504*4882a593Smuzhiyun static inline int genphy_no_config_intr(struct phy_device *phydev)
1505*4882a593Smuzhiyun {
1506*4882a593Smuzhiyun 	return 0;
1507*4882a593Smuzhiyun }
1508*4882a593Smuzhiyun int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1509*4882a593Smuzhiyun 				u16 regnum);
1510*4882a593Smuzhiyun int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1511*4882a593Smuzhiyun 				 u16 regnum, u16 val);
1512*4882a593Smuzhiyun 
1513*4882a593Smuzhiyun /* Clause 37 */
1514*4882a593Smuzhiyun int genphy_c37_config_aneg(struct phy_device *phydev);
1515*4882a593Smuzhiyun int genphy_c37_read_status(struct phy_device *phydev);
1516*4882a593Smuzhiyun 
1517*4882a593Smuzhiyun /* Clause 45 PHY */
1518*4882a593Smuzhiyun int genphy_c45_restart_aneg(struct phy_device *phydev);
1519*4882a593Smuzhiyun int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1520*4882a593Smuzhiyun int genphy_c45_aneg_done(struct phy_device *phydev);
1521*4882a593Smuzhiyun int genphy_c45_read_link(struct phy_device *phydev);
1522*4882a593Smuzhiyun int genphy_c45_read_lpa(struct phy_device *phydev);
1523*4882a593Smuzhiyun int genphy_c45_read_pma(struct phy_device *phydev);
1524*4882a593Smuzhiyun int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1525*4882a593Smuzhiyun int genphy_c45_an_config_aneg(struct phy_device *phydev);
1526*4882a593Smuzhiyun int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1527*4882a593Smuzhiyun int genphy_c45_read_mdix(struct phy_device *phydev);
1528*4882a593Smuzhiyun int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1529*4882a593Smuzhiyun int genphy_c45_read_status(struct phy_device *phydev);
1530*4882a593Smuzhiyun int genphy_c45_config_aneg(struct phy_device *phydev);
1531*4882a593Smuzhiyun 
1532*4882a593Smuzhiyun /* Generic C45 PHY driver */
1533*4882a593Smuzhiyun extern struct phy_driver genphy_c45_driver;
1534*4882a593Smuzhiyun 
1535*4882a593Smuzhiyun /* The gen10g_* functions are the old Clause 45 stub */
1536*4882a593Smuzhiyun int gen10g_config_aneg(struct phy_device *phydev);
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun static inline int phy_read_status(struct phy_device *phydev)
1539*4882a593Smuzhiyun {
1540*4882a593Smuzhiyun 	if (!phydev->drv)
1541*4882a593Smuzhiyun 		return -EIO;
1542*4882a593Smuzhiyun 
1543*4882a593Smuzhiyun 	if (phydev->drv->read_status)
1544*4882a593Smuzhiyun 		return phydev->drv->read_status(phydev);
1545*4882a593Smuzhiyun 	else
1546*4882a593Smuzhiyun 		return genphy_read_status(phydev);
1547*4882a593Smuzhiyun }
1548*4882a593Smuzhiyun 
1549*4882a593Smuzhiyun void phy_driver_unregister(struct phy_driver *drv);
1550*4882a593Smuzhiyun void phy_drivers_unregister(struct phy_driver *drv, int n);
1551*4882a593Smuzhiyun int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1552*4882a593Smuzhiyun int phy_drivers_register(struct phy_driver *new_driver, int n,
1553*4882a593Smuzhiyun 			 struct module *owner);
1554*4882a593Smuzhiyun void phy_state_machine(struct work_struct *work);
1555*4882a593Smuzhiyun void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1556*4882a593Smuzhiyun void phy_mac_interrupt(struct phy_device *phydev);
1557*4882a593Smuzhiyun void phy_start_machine(struct phy_device *phydev);
1558*4882a593Smuzhiyun void phy_stop_machine(struct phy_device *phydev);
1559*4882a593Smuzhiyun void phy_ethtool_ksettings_get(struct phy_device *phydev,
1560*4882a593Smuzhiyun 			       struct ethtool_link_ksettings *cmd);
1561*4882a593Smuzhiyun int phy_ethtool_ksettings_set(struct phy_device *phydev,
1562*4882a593Smuzhiyun 			      const struct ethtool_link_ksettings *cmd);
1563*4882a593Smuzhiyun int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1564*4882a593Smuzhiyun int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1565*4882a593Smuzhiyun int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1566*4882a593Smuzhiyun int phy_disable_interrupts(struct phy_device *phydev);
1567*4882a593Smuzhiyun void phy_request_interrupt(struct phy_device *phydev);
1568*4882a593Smuzhiyun void phy_free_interrupt(struct phy_device *phydev);
1569*4882a593Smuzhiyun void phy_print_status(struct phy_device *phydev);
1570*4882a593Smuzhiyun int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1571*4882a593Smuzhiyun void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1572*4882a593Smuzhiyun void phy_advertise_supported(struct phy_device *phydev);
1573*4882a593Smuzhiyun void phy_support_sym_pause(struct phy_device *phydev);
1574*4882a593Smuzhiyun void phy_support_asym_pause(struct phy_device *phydev);
1575*4882a593Smuzhiyun void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1576*4882a593Smuzhiyun 		       bool autoneg);
1577*4882a593Smuzhiyun void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1578*4882a593Smuzhiyun bool phy_validate_pause(struct phy_device *phydev,
1579*4882a593Smuzhiyun 			struct ethtool_pauseparam *pp);
1580*4882a593Smuzhiyun void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1583*4882a593Smuzhiyun 			   const int *delay_values, int size, bool is_rx);
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1586*4882a593Smuzhiyun 		       bool *tx_pause, bool *rx_pause);
1587*4882a593Smuzhiyun 
1588*4882a593Smuzhiyun int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1589*4882a593Smuzhiyun 		       int (*run)(struct phy_device *));
1590*4882a593Smuzhiyun int phy_register_fixup_for_id(const char *bus_id,
1591*4882a593Smuzhiyun 			      int (*run)(struct phy_device *));
1592*4882a593Smuzhiyun int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1593*4882a593Smuzhiyun 			       int (*run)(struct phy_device *));
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1596*4882a593Smuzhiyun int phy_unregister_fixup_for_id(const char *bus_id);
1597*4882a593Smuzhiyun int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1598*4882a593Smuzhiyun 
1599*4882a593Smuzhiyun int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1600*4882a593Smuzhiyun int phy_get_eee_err(struct phy_device *phydev);
1601*4882a593Smuzhiyun int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1602*4882a593Smuzhiyun int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1603*4882a593Smuzhiyun int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1604*4882a593Smuzhiyun void phy_ethtool_get_wol(struct phy_device *phydev,
1605*4882a593Smuzhiyun 			 struct ethtool_wolinfo *wol);
1606*4882a593Smuzhiyun int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1607*4882a593Smuzhiyun 				   struct ethtool_link_ksettings *cmd);
1608*4882a593Smuzhiyun int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1609*4882a593Smuzhiyun 				   const struct ethtool_link_ksettings *cmd);
1610*4882a593Smuzhiyun int phy_ethtool_nway_reset(struct net_device *ndev);
1611*4882a593Smuzhiyun int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1612*4882a593Smuzhiyun void phy_package_leave(struct phy_device *phydev);
1613*4882a593Smuzhiyun int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1614*4882a593Smuzhiyun 			  int addr, size_t priv_size);
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_PHYLIB)
1617*4882a593Smuzhiyun int __init mdio_bus_init(void);
1618*4882a593Smuzhiyun void mdio_bus_exit(void);
1619*4882a593Smuzhiyun #endif
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1622*4882a593Smuzhiyun int phy_ethtool_get_sset_count(struct phy_device *phydev);
1623*4882a593Smuzhiyun int phy_ethtool_get_stats(struct phy_device *phydev,
1624*4882a593Smuzhiyun 			  struct ethtool_stats *stats, u64 *data);
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1627*4882a593Smuzhiyun {
1628*4882a593Smuzhiyun 	struct phy_package_shared *shared = phydev->shared;
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun 	if (!shared)
1631*4882a593Smuzhiyun 		return -EIO;
1632*4882a593Smuzhiyun 
1633*4882a593Smuzhiyun 	return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1634*4882a593Smuzhiyun }
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1637*4882a593Smuzhiyun {
1638*4882a593Smuzhiyun 	struct phy_package_shared *shared = phydev->shared;
1639*4882a593Smuzhiyun 
1640*4882a593Smuzhiyun 	if (!shared)
1641*4882a593Smuzhiyun 		return -EIO;
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 	return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1644*4882a593Smuzhiyun }
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun static inline int phy_package_write(struct phy_device *phydev,
1647*4882a593Smuzhiyun 				    u32 regnum, u16 val)
1648*4882a593Smuzhiyun {
1649*4882a593Smuzhiyun 	struct phy_package_shared *shared = phydev->shared;
1650*4882a593Smuzhiyun 
1651*4882a593Smuzhiyun 	if (!shared)
1652*4882a593Smuzhiyun 		return -EIO;
1653*4882a593Smuzhiyun 
1654*4882a593Smuzhiyun 	return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1655*4882a593Smuzhiyun }
1656*4882a593Smuzhiyun 
1657*4882a593Smuzhiyun static inline int __phy_package_write(struct phy_device *phydev,
1658*4882a593Smuzhiyun 				      u32 regnum, u16 val)
1659*4882a593Smuzhiyun {
1660*4882a593Smuzhiyun 	struct phy_package_shared *shared = phydev->shared;
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	if (!shared)
1663*4882a593Smuzhiyun 		return -EIO;
1664*4882a593Smuzhiyun 
1665*4882a593Smuzhiyun 	return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1666*4882a593Smuzhiyun }
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun static inline bool __phy_package_set_once(struct phy_device *phydev,
1669*4882a593Smuzhiyun 					  unsigned int b)
1670*4882a593Smuzhiyun {
1671*4882a593Smuzhiyun 	struct phy_package_shared *shared = phydev->shared;
1672*4882a593Smuzhiyun 
1673*4882a593Smuzhiyun 	if (!shared)
1674*4882a593Smuzhiyun 		return false;
1675*4882a593Smuzhiyun 
1676*4882a593Smuzhiyun 	return !test_and_set_bit(b, &shared->flags);
1677*4882a593Smuzhiyun }
1678*4882a593Smuzhiyun 
1679*4882a593Smuzhiyun static inline bool phy_package_init_once(struct phy_device *phydev)
1680*4882a593Smuzhiyun {
1681*4882a593Smuzhiyun 	return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun static inline bool phy_package_probe_once(struct phy_device *phydev)
1685*4882a593Smuzhiyun {
1686*4882a593Smuzhiyun 	return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1687*4882a593Smuzhiyun }
1688*4882a593Smuzhiyun 
1689*4882a593Smuzhiyun extern struct bus_type mdio_bus_type;
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun struct mdio_board_info {
1692*4882a593Smuzhiyun 	const char	*bus_id;
1693*4882a593Smuzhiyun 	char		modalias[MDIO_NAME_SIZE];
1694*4882a593Smuzhiyun 	int		mdio_addr;
1695*4882a593Smuzhiyun 	const void	*platform_data;
1696*4882a593Smuzhiyun };
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1699*4882a593Smuzhiyun int mdiobus_register_board_info(const struct mdio_board_info *info,
1700*4882a593Smuzhiyun 				unsigned int n);
1701*4882a593Smuzhiyun #else
1702*4882a593Smuzhiyun static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1703*4882a593Smuzhiyun 					      unsigned int n)
1704*4882a593Smuzhiyun {
1705*4882a593Smuzhiyun 	return 0;
1706*4882a593Smuzhiyun }
1707*4882a593Smuzhiyun #endif
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun 
1710*4882a593Smuzhiyun /**
1711*4882a593Smuzhiyun  * phy_module_driver() - Helper macro for registering PHY drivers
1712*4882a593Smuzhiyun  * @__phy_drivers: array of PHY drivers to register
1713*4882a593Smuzhiyun  * @__count: Numbers of members in array
1714*4882a593Smuzhiyun  *
1715*4882a593Smuzhiyun  * Helper macro for PHY drivers which do not do anything special in module
1716*4882a593Smuzhiyun  * init/exit. Each module may only use this macro once, and calling it
1717*4882a593Smuzhiyun  * replaces module_init() and module_exit().
1718*4882a593Smuzhiyun  */
1719*4882a593Smuzhiyun #define phy_module_driver(__phy_drivers, __count)			\
1720*4882a593Smuzhiyun static int __init phy_module_init(void)					\
1721*4882a593Smuzhiyun {									\
1722*4882a593Smuzhiyun 	return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1723*4882a593Smuzhiyun }									\
1724*4882a593Smuzhiyun module_init(phy_module_init);						\
1725*4882a593Smuzhiyun static void __exit phy_module_exit(void)				\
1726*4882a593Smuzhiyun {									\
1727*4882a593Smuzhiyun 	phy_drivers_unregister(__phy_drivers, __count);			\
1728*4882a593Smuzhiyun }									\
1729*4882a593Smuzhiyun module_exit(phy_module_exit)
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun #define module_phy_driver(__phy_drivers)				\
1732*4882a593Smuzhiyun 	phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun bool phy_driver_is_genphy(struct phy_device *phydev);
1735*4882a593Smuzhiyun bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun #endif /* __PHY_H */
1738