1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2010 Intel Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef PCH_DMA_H 7*4882a593Smuzhiyun #define PCH_DMA_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/dmaengine.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum pch_dma_width { 12*4882a593Smuzhiyun PCH_DMA_WIDTH_1_BYTE, 13*4882a593Smuzhiyun PCH_DMA_WIDTH_2_BYTES, 14*4882a593Smuzhiyun PCH_DMA_WIDTH_4_BYTES, 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct pch_dma_slave { 18*4882a593Smuzhiyun struct device *dma_dev; 19*4882a593Smuzhiyun unsigned int chan_id; 20*4882a593Smuzhiyun dma_addr_t tx_reg; 21*4882a593Smuzhiyun dma_addr_t rx_reg; 22*4882a593Smuzhiyun enum pch_dma_width width; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif 26