xref: /OK3568_Linux_fs/kernel/include/linux/mux/driver.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * mux/driver.h - definitions for the multiplexer driver interface
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2017 Axentia Technologies AB
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Peter Rosin <peda@axentia.se>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef _LINUX_MUX_DRIVER_H
11*4882a593Smuzhiyun #define _LINUX_MUX_DRIVER_H
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <dt-bindings/mux/mux.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/semaphore.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct mux_chip;
18*4882a593Smuzhiyun struct mux_control;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /**
21*4882a593Smuzhiyun  * struct mux_control_ops -	Mux controller operations for a mux chip.
22*4882a593Smuzhiyun  * @set:			Set the state of the given mux controller.
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun struct mux_control_ops {
25*4882a593Smuzhiyun 	int (*set)(struct mux_control *mux, int state);
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /**
29*4882a593Smuzhiyun  * struct mux_control -	Represents a mux controller.
30*4882a593Smuzhiyun  * @lock:		Protects the mux controller state.
31*4882a593Smuzhiyun  * @chip:		The mux chip that is handling this mux controller.
32*4882a593Smuzhiyun  * @cached_state:	The current mux controller state, or -1 if none.
33*4882a593Smuzhiyun  * @states:		The number of mux controller states.
34*4882a593Smuzhiyun  * @idle_state:		The mux controller state to use when inactive, or one
35*4882a593Smuzhiyun  *			of MUX_IDLE_AS_IS and MUX_IDLE_DISCONNECT.
36*4882a593Smuzhiyun  *
37*4882a593Smuzhiyun  * Mux drivers may only change @states and @idle_state, and may only do so
38*4882a593Smuzhiyun  * between allocation and registration of the mux controller. Specifically,
39*4882a593Smuzhiyun  * @cached_state is internal to the mux core and should never be written by
40*4882a593Smuzhiyun  * mux drivers.
41*4882a593Smuzhiyun  */
42*4882a593Smuzhiyun struct mux_control {
43*4882a593Smuzhiyun 	struct semaphore lock; /* protects the state of the mux */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	struct mux_chip *chip;
46*4882a593Smuzhiyun 	int cached_state;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	unsigned int states;
49*4882a593Smuzhiyun 	int idle_state;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun /**
53*4882a593Smuzhiyun  * struct mux_chip -	Represents a chip holding mux controllers.
54*4882a593Smuzhiyun  * @controllers:	Number of mux controllers handled by the chip.
55*4882a593Smuzhiyun  * @mux:		Array of mux controllers that are handled.
56*4882a593Smuzhiyun  * @dev:		Device structure.
57*4882a593Smuzhiyun  * @id:			Used to identify the device internally.
58*4882a593Smuzhiyun  * @ops:		Mux controller operations.
59*4882a593Smuzhiyun  */
60*4882a593Smuzhiyun struct mux_chip {
61*4882a593Smuzhiyun 	unsigned int controllers;
62*4882a593Smuzhiyun 	struct mux_control *mux;
63*4882a593Smuzhiyun 	struct device dev;
64*4882a593Smuzhiyun 	int id;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	const struct mux_control_ops *ops;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define to_mux_chip(x) container_of((x), struct mux_chip, dev)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /**
72*4882a593Smuzhiyun  * mux_chip_priv() - Get the extra memory reserved by mux_chip_alloc().
73*4882a593Smuzhiyun  * @mux_chip: The mux-chip to get the private memory from.
74*4882a593Smuzhiyun  *
75*4882a593Smuzhiyun  * Return: Pointer to the private memory reserved by the allocator.
76*4882a593Smuzhiyun  */
mux_chip_priv(struct mux_chip * mux_chip)77*4882a593Smuzhiyun static inline void *mux_chip_priv(struct mux_chip *mux_chip)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	return &mux_chip->mux[mux_chip->controllers];
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun struct mux_chip *mux_chip_alloc(struct device *dev,
83*4882a593Smuzhiyun 				unsigned int controllers, size_t sizeof_priv);
84*4882a593Smuzhiyun int mux_chip_register(struct mux_chip *mux_chip);
85*4882a593Smuzhiyun void mux_chip_unregister(struct mux_chip *mux_chip);
86*4882a593Smuzhiyun void mux_chip_free(struct mux_chip *mux_chip);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun struct mux_chip *devm_mux_chip_alloc(struct device *dev,
89*4882a593Smuzhiyun 				     unsigned int controllers,
90*4882a593Smuzhiyun 				     size_t sizeof_priv);
91*4882a593Smuzhiyun int devm_mux_chip_register(struct device *dev, struct mux_chip *mux_chip);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /**
94*4882a593Smuzhiyun  * mux_control_get_index() - Get the index of the given mux controller
95*4882a593Smuzhiyun  * @mux: The mux-control to get the index for.
96*4882a593Smuzhiyun  *
97*4882a593Smuzhiyun  * Return: The index of the mux controller within the mux chip the mux
98*4882a593Smuzhiyun  * controller is a part of.
99*4882a593Smuzhiyun  */
mux_control_get_index(struct mux_control * mux)100*4882a593Smuzhiyun static inline unsigned int mux_control_get_index(struct mux_control *mux)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	return mux - mux->chip->mux;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #endif /* _LINUX_MUX_DRIVER_H */
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