1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _LINUX_MMU_CONTEXT_H 3*4882a593Smuzhiyun #define _LINUX_MMU_CONTEXT_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <asm/mmu_context.h> 6*4882a593Smuzhiyun #include <asm/mmu.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* Architectures that care about IRQ state in switch_mm can override this. */ 9*4882a593Smuzhiyun #ifndef switch_mm_irqs_off 10*4882a593Smuzhiyun # define switch_mm_irqs_off switch_mm 11*4882a593Smuzhiyun #endif 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef leave_mm leave_mm(int cpu)14*4882a593Smuzhiyunstatic inline void leave_mm(int cpu) { } 15*4882a593Smuzhiyun #endif 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* 18*4882a593Smuzhiyun * CPUs that are capable of running task @p. By default, we assume a sane, 19*4882a593Smuzhiyun * homogeneous system. Must contain at least one active CPU. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun #ifndef task_cpu_possible_mask 22*4882a593Smuzhiyun # define task_cpu_possible_mask(p) cpu_possible_mask 23*4882a593Smuzhiyun #endif 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #endif 26