xref: /OK3568_Linux_fs/kernel/include/linux/mmc/core.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  linux/include/linux/mmc/core.h
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #ifndef LINUX_MMC_CORE_H
6*4882a593Smuzhiyun #define LINUX_MMC_CORE_H
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/completion.h>
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun struct mmc_data;
12*4882a593Smuzhiyun struct mmc_request;
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun enum mmc_blk_status {
15*4882a593Smuzhiyun 	MMC_BLK_SUCCESS = 0,
16*4882a593Smuzhiyun 	MMC_BLK_PARTIAL,
17*4882a593Smuzhiyun 	MMC_BLK_CMD_ERR,
18*4882a593Smuzhiyun 	MMC_BLK_RETRY,
19*4882a593Smuzhiyun 	MMC_BLK_ABORT,
20*4882a593Smuzhiyun 	MMC_BLK_DATA_ERR,
21*4882a593Smuzhiyun 	MMC_BLK_ECC_ERR,
22*4882a593Smuzhiyun 	MMC_BLK_NOMEDIUM,
23*4882a593Smuzhiyun 	MMC_BLK_NEW_REQUEST,
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun struct mmc_command {
27*4882a593Smuzhiyun 	u32			opcode;
28*4882a593Smuzhiyun 	u32			arg;
29*4882a593Smuzhiyun #define MMC_CMD23_ARG_REL_WR	(1 << 31)
30*4882a593Smuzhiyun #define MMC_CMD23_ARG_PACKED	((0 << 31) | (1 << 30))
31*4882a593Smuzhiyun #define MMC_CMD23_ARG_TAG_REQ	(1 << 29)
32*4882a593Smuzhiyun 	u32			resp[4];
33*4882a593Smuzhiyun 	unsigned int		flags;		/* expected response type */
34*4882a593Smuzhiyun #define MMC_RSP_PRESENT	(1 << 0)
35*4882a593Smuzhiyun #define MMC_RSP_136	(1 << 1)		/* 136 bit response */
36*4882a593Smuzhiyun #define MMC_RSP_CRC	(1 << 2)		/* expect valid crc */
37*4882a593Smuzhiyun #define MMC_RSP_BUSY	(1 << 3)		/* card may send busy */
38*4882a593Smuzhiyun #define MMC_RSP_OPCODE	(1 << 4)		/* response contains opcode */
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MMC_CMD_MASK	(3 << 5)		/* non-SPI command type */
41*4882a593Smuzhiyun #define MMC_CMD_AC	(0 << 5)
42*4882a593Smuzhiyun #define MMC_CMD_ADTC	(1 << 5)
43*4882a593Smuzhiyun #define MMC_CMD_BC	(2 << 5)
44*4882a593Smuzhiyun #define MMC_CMD_BCR	(3 << 5)
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define MMC_RSP_SPI_S1	(1 << 7)		/* one status byte */
47*4882a593Smuzhiyun #define MMC_RSP_SPI_S2	(1 << 8)		/* second byte */
48*4882a593Smuzhiyun #define MMC_RSP_SPI_B4	(1 << 9)		/* four data bytes */
49*4882a593Smuzhiyun #define MMC_RSP_SPI_BUSY (1 << 10)		/* card may send busy */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /*
52*4882a593Smuzhiyun  * These are the native response types, and correspond to valid bit
53*4882a593Smuzhiyun  * patterns of the above flags.  One additional valid pattern
54*4882a593Smuzhiyun  * is all zeros, which means we don't expect a response.
55*4882a593Smuzhiyun  */
56*4882a593Smuzhiyun #define MMC_RSP_NONE	(0)
57*4882a593Smuzhiyun #define MMC_RSP_R1	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
58*4882a593Smuzhiyun #define MMC_RSP_R1B	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
59*4882a593Smuzhiyun #define MMC_RSP_R2	(MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
60*4882a593Smuzhiyun #define MMC_RSP_R3	(MMC_RSP_PRESENT)
61*4882a593Smuzhiyun #define MMC_RSP_R4	(MMC_RSP_PRESENT)
62*4882a593Smuzhiyun #define MMC_RSP_R5	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
63*4882a593Smuzhiyun #define MMC_RSP_R6	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
64*4882a593Smuzhiyun #define MMC_RSP_R7	(MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* Can be used by core to poll after switch to MMC HS mode */
67*4882a593Smuzhiyun #define MMC_RSP_R1_NO_CRC	(MMC_RSP_PRESENT|MMC_RSP_OPCODE)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define mmc_resp_type(cmd)	((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun  * These are the SPI response types for MMC, SD, and SDIO cards.
73*4882a593Smuzhiyun  * Commands return R1, with maybe more info.  Zero is an error type;
74*4882a593Smuzhiyun  * callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
75*4882a593Smuzhiyun  */
76*4882a593Smuzhiyun #define MMC_RSP_SPI_R1	(MMC_RSP_SPI_S1)
77*4882a593Smuzhiyun #define MMC_RSP_SPI_R1B	(MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
78*4882a593Smuzhiyun #define MMC_RSP_SPI_R2	(MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
79*4882a593Smuzhiyun #define MMC_RSP_SPI_R3	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
80*4882a593Smuzhiyun #define MMC_RSP_SPI_R4	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
81*4882a593Smuzhiyun #define MMC_RSP_SPI_R5	(MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
82*4882a593Smuzhiyun #define MMC_RSP_SPI_R7	(MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define mmc_spi_resp_type(cmd)	((cmd)->flags & \
85*4882a593Smuzhiyun 		(MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4))
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun  * These are the command types.
89*4882a593Smuzhiyun  */
90*4882a593Smuzhiyun #define mmc_cmd_type(cmd)	((cmd)->flags & MMC_CMD_MASK)
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	unsigned int		retries;	/* max number of retries */
93*4882a593Smuzhiyun 	int			error;		/* command error */
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun  * Standard errno values are used for errors, but some have specific
97*4882a593Smuzhiyun  * meaning in the MMC layer:
98*4882a593Smuzhiyun  *
99*4882a593Smuzhiyun  * ETIMEDOUT    Card took too long to respond
100*4882a593Smuzhiyun  * EILSEQ       Basic format problem with the received or sent data
101*4882a593Smuzhiyun  *              (e.g. CRC check failed, incorrect opcode in response
102*4882a593Smuzhiyun  *              or bad end bit)
103*4882a593Smuzhiyun  * EINVAL       Request cannot be performed because of restrictions
104*4882a593Smuzhiyun  *              in hardware and/or the driver
105*4882a593Smuzhiyun  * ENOMEDIUM    Host can determine that the slot is empty and is
106*4882a593Smuzhiyun  *              actively failing requests
107*4882a593Smuzhiyun  */
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	unsigned int		busy_timeout;	/* busy detect timeout in ms */
110*4882a593Smuzhiyun 	struct mmc_data		*data;		/* data segment associated with cmd */
111*4882a593Smuzhiyun 	struct mmc_request	*mrq;		/* associated request */
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun struct mmc_data {
115*4882a593Smuzhiyun 	unsigned int		timeout_ns;	/* data timeout (in ns, max 80ms) */
116*4882a593Smuzhiyun 	unsigned int		timeout_clks;	/* data timeout (in clocks) */
117*4882a593Smuzhiyun 	unsigned int		blksz;		/* data block size */
118*4882a593Smuzhiyun 	unsigned int		blocks;		/* number of blocks */
119*4882a593Smuzhiyun 	unsigned int		blk_addr;	/* block address */
120*4882a593Smuzhiyun 	int			error;		/* data error */
121*4882a593Smuzhiyun 	unsigned int		flags;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun #define MMC_DATA_WRITE		BIT(8)
124*4882a593Smuzhiyun #define MMC_DATA_READ		BIT(9)
125*4882a593Smuzhiyun /* Extra flags used by CQE */
126*4882a593Smuzhiyun #define MMC_DATA_QBR		BIT(10)		/* CQE queue barrier*/
127*4882a593Smuzhiyun #define MMC_DATA_PRIO		BIT(11)		/* CQE high priority */
128*4882a593Smuzhiyun #define MMC_DATA_REL_WR		BIT(12)		/* Reliable write */
129*4882a593Smuzhiyun #define MMC_DATA_DAT_TAG	BIT(13)		/* Tag request */
130*4882a593Smuzhiyun #define MMC_DATA_FORCED_PRG	BIT(14)		/* Forced programming */
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	unsigned int		bytes_xfered;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	struct mmc_command	*stop;		/* stop command */
135*4882a593Smuzhiyun 	struct mmc_request	*mrq;		/* associated request */
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	unsigned int		sg_len;		/* size of scatter list */
138*4882a593Smuzhiyun 	int			sg_count;	/* mapped sg entries */
139*4882a593Smuzhiyun 	struct scatterlist	*sg;		/* I/O scatter list */
140*4882a593Smuzhiyun 	s32			host_cookie;	/* host private data */
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun struct mmc_host;
144*4882a593Smuzhiyun struct mmc_request {
145*4882a593Smuzhiyun 	struct mmc_command	*sbc;		/* SET_BLOCK_COUNT for multiblock */
146*4882a593Smuzhiyun 	struct mmc_command	*cmd;
147*4882a593Smuzhiyun 	struct mmc_data		*data;
148*4882a593Smuzhiyun 	struct mmc_command	*stop;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	struct completion	completion;
151*4882a593Smuzhiyun 	struct completion	cmd_completion;
152*4882a593Smuzhiyun 	void			(*done)(struct mmc_request *);/* completion function */
153*4882a593Smuzhiyun 	/*
154*4882a593Smuzhiyun 	 * Notify uppers layers (e.g. mmc block driver) that recovery is needed
155*4882a593Smuzhiyun 	 * due to an error associated with the mmc_request. Currently used only
156*4882a593Smuzhiyun 	 * by CQE.
157*4882a593Smuzhiyun 	 */
158*4882a593Smuzhiyun 	void			(*recovery_notifier)(struct mmc_request *);
159*4882a593Smuzhiyun 	struct mmc_host		*host;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	/* Allow other commands during this ongoing data transfer or busy wait */
162*4882a593Smuzhiyun 	bool			cap_cmd_during_tfr;
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	int			tag;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun #ifdef CONFIG_MMC_CRYPTO
167*4882a593Smuzhiyun 	const struct bio_crypt_ctx *crypto_ctx;
168*4882a593Smuzhiyun 	int			crypto_key_slot;
169*4882a593Smuzhiyun #endif
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun struct mmc_card;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq);
175*4882a593Smuzhiyun int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd,
176*4882a593Smuzhiyun 		int retries);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun int mmc_hw_reset(struct mmc_host *host);
179*4882a593Smuzhiyun int mmc_sw_reset(struct mmc_host *host);
180*4882a593Smuzhiyun void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun #endif /* LINUX_MMC_CORE_H */
183