1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This software is available to you under a choice of one of two
5*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
6*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
7*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
8*4882a593Smuzhiyun * OpenIB.org BSD license below:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
11*4882a593Smuzhiyun * without modification, are permitted provided that the following
12*4882a593Smuzhiyun * conditions are met:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * - Redistributions of source code must retain the above
15*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
16*4882a593Smuzhiyun * disclaimer.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
19*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
20*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
21*4882a593Smuzhiyun * provided with the distribution.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30*4882a593Smuzhiyun * SOFTWARE.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #ifndef MLX5_DOORBELL_H
34*4882a593Smuzhiyun #define MLX5_DOORBELL_H
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define MLX5_BF_OFFSET 0x800
37*4882a593Smuzhiyun #define MLX5_CQ_DOORBELL 0x20
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Assume that we can just write a 64-bit doorbell atomically. s390
40*4882a593Smuzhiyun * actually doesn't have writeq() but S/390 systems don't even have
41*4882a593Smuzhiyun * PCI so we won't worry about it.
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * Note that the write is not atomic on 32-bit systems! In contrast to 64-bit
44*4882a593Smuzhiyun * ones, it requires proper locking. mlx5_write64 doesn't do any locking, so use
45*4882a593Smuzhiyun * it at your own discretion, protected by some kind of lock on 32 bits.
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun * TODO: use write{q,l}_relaxed()
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun
mlx5_write64(__be32 val[2],void __iomem * dest)50*4882a593Smuzhiyun static inline void mlx5_write64(__be32 val[2], void __iomem *dest)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun #if BITS_PER_LONG == 64
53*4882a593Smuzhiyun __raw_writeq(*(u64 *)val, dest);
54*4882a593Smuzhiyun #else
55*4882a593Smuzhiyun __raw_writel((__force u32) val[0], dest);
56*4882a593Smuzhiyun __raw_writel((__force u32) val[1], dest + 4);
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #endif /* MLX5_DOORBELL_H */
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