1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/linux/mfd/wm8994/gpio.h - GPIO configuration for WM8994 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2009 Wolfson Microelectronics PLC. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __MFD_WM8994_GPIO_H__ 11*4882a593Smuzhiyun #define __MFD_WM8994_GPIO_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define WM8994_GPIO_MAX 11 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define WM8994_GP_FN_PIN_SPECIFIC 0 16*4882a593Smuzhiyun #define WM8994_GP_FN_GPIO 1 17*4882a593Smuzhiyun #define WM8994_GP_FN_SDOUT 2 18*4882a593Smuzhiyun #define WM8994_GP_FN_IRQ 3 19*4882a593Smuzhiyun #define WM8994_GP_FN_TEMPERATURE 4 20*4882a593Smuzhiyun #define WM8994_GP_FN_MICBIAS1_DET 5 21*4882a593Smuzhiyun #define WM8994_GP_FN_MICBIAS1_SHORT 6 22*4882a593Smuzhiyun #define WM8994_GP_FN_MICBIAS2_DET 7 23*4882a593Smuzhiyun #define WM8994_GP_FN_MICBIAS2_SHORT 8 24*4882a593Smuzhiyun #define WM8994_GP_FN_FLL1_LOCK 9 25*4882a593Smuzhiyun #define WM8994_GP_FN_FLL2_LOCK 10 26*4882a593Smuzhiyun #define WM8994_GP_FN_SRC1_LOCK 11 27*4882a593Smuzhiyun #define WM8994_GP_FN_SRC2_LOCK 12 28*4882a593Smuzhiyun #define WM8994_GP_FN_DRC1_ACT 13 29*4882a593Smuzhiyun #define WM8994_GP_FN_DRC2_ACT 14 30*4882a593Smuzhiyun #define WM8994_GP_FN_DRC3_ACT 15 31*4882a593Smuzhiyun #define WM8994_GP_FN_WSEQ_STATUS 16 32*4882a593Smuzhiyun #define WM8994_GP_FN_FIFO_ERROR 17 33*4882a593Smuzhiyun #define WM8994_GP_FN_OPCLK 18 34*4882a593Smuzhiyun #define WM8994_GP_FN_THW 19 35*4882a593Smuzhiyun #define WM8994_GP_FN_DCS_DONE 20 36*4882a593Smuzhiyun #define WM8994_GP_FN_FLL1_OUT 21 37*4882a593Smuzhiyun #define WM8994_GP_FN_FLL2_OUT 22 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define WM8994_GPN_DIR 0x8000 /* GPN_DIR */ 40*4882a593Smuzhiyun #define WM8994_GPN_DIR_MASK 0x8000 /* GPN_DIR */ 41*4882a593Smuzhiyun #define WM8994_GPN_DIR_SHIFT 15 /* GPN_DIR */ 42*4882a593Smuzhiyun #define WM8994_GPN_DIR_WIDTH 1 /* GPN_DIR */ 43*4882a593Smuzhiyun #define WM8994_GPN_PU 0x4000 /* GPN_PU */ 44*4882a593Smuzhiyun #define WM8994_GPN_PU_MASK 0x4000 /* GPN_PU */ 45*4882a593Smuzhiyun #define WM8994_GPN_PU_SHIFT 14 /* GPN_PU */ 46*4882a593Smuzhiyun #define WM8994_GPN_PU_WIDTH 1 /* GPN_PU */ 47*4882a593Smuzhiyun #define WM8994_GPN_PD 0x2000 /* GPN_PD */ 48*4882a593Smuzhiyun #define WM8994_GPN_PD_MASK 0x2000 /* GPN_PD */ 49*4882a593Smuzhiyun #define WM8994_GPN_PD_SHIFT 13 /* GPN_PD */ 50*4882a593Smuzhiyun #define WM8994_GPN_PD_WIDTH 1 /* GPN_PD */ 51*4882a593Smuzhiyun #define WM8994_GPN_POL 0x0400 /* GPN_POL */ 52*4882a593Smuzhiyun #define WM8994_GPN_POL_MASK 0x0400 /* GPN_POL */ 53*4882a593Smuzhiyun #define WM8994_GPN_POL_SHIFT 10 /* GPN_POL */ 54*4882a593Smuzhiyun #define WM8994_GPN_POL_WIDTH 1 /* GPN_POL */ 55*4882a593Smuzhiyun #define WM8994_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ 56*4882a593Smuzhiyun #define WM8994_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ 57*4882a593Smuzhiyun #define WM8994_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ 58*4882a593Smuzhiyun #define WM8994_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ 59*4882a593Smuzhiyun #define WM8994_GPN_DB 0x0100 /* GPN_DB */ 60*4882a593Smuzhiyun #define WM8994_GPN_DB_MASK 0x0100 /* GPN_DB */ 61*4882a593Smuzhiyun #define WM8994_GPN_DB_SHIFT 8 /* GPN_DB */ 62*4882a593Smuzhiyun #define WM8994_GPN_DB_WIDTH 1 /* GPN_DB */ 63*4882a593Smuzhiyun #define WM8994_GPN_LVL 0x0040 /* GPN_LVL */ 64*4882a593Smuzhiyun #define WM8994_GPN_LVL_MASK 0x0040 /* GPN_LVL */ 65*4882a593Smuzhiyun #define WM8994_GPN_LVL_SHIFT 6 /* GPN_LVL */ 66*4882a593Smuzhiyun #define WM8994_GPN_LVL_WIDTH 1 /* GPN_LVL */ 67*4882a593Smuzhiyun #define WM8994_GPN_FN_MASK 0x001F /* GPN_FN - [4:0] */ 68*4882a593Smuzhiyun #define WM8994_GPN_FN_SHIFT 0 /* GPN_FN - [4:0] */ 69*4882a593Smuzhiyun #define WM8994_GPN_FN_WIDTH 5 /* GPN_FN - [4:0] */ 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #endif 72