1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * comparator.h -- Comparator Aux ADC for Wolfson WM8350 PMIC 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2007 Wolfson Microelectronics PLC 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __LINUX_MFD_WM8350_COMPARATOR_H_ 9*4882a593Smuzhiyun #define __LINUX_MFD_WM8350_COMPARATOR_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Registers 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define WM8350_DIGITISER_CONTROL_1 0x90 16*4882a593Smuzhiyun #define WM8350_DIGITISER_CONTROL_2 0x91 17*4882a593Smuzhiyun #define WM8350_AUX1_READBACK 0x98 18*4882a593Smuzhiyun #define WM8350_AUX2_READBACK 0x99 19*4882a593Smuzhiyun #define WM8350_AUX3_READBACK 0x9A 20*4882a593Smuzhiyun #define WM8350_AUX4_READBACK 0x9B 21*4882a593Smuzhiyun #define WM8350_CHIP_TEMP_READBACK 0x9F 22*4882a593Smuzhiyun #define WM8350_GENERIC_COMPARATOR_CONTROL 0xA3 23*4882a593Smuzhiyun #define WM8350_GENERIC_COMPARATOR_1 0xA4 24*4882a593Smuzhiyun #define WM8350_GENERIC_COMPARATOR_2 0xA5 25*4882a593Smuzhiyun #define WM8350_GENERIC_COMPARATOR_3 0xA6 26*4882a593Smuzhiyun #define WM8350_GENERIC_COMPARATOR_4 0xA7 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * R144 (0x90) - Digitiser Control (1) 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun #define WM8350_AUXADC_CTC 0x4000 32*4882a593Smuzhiyun #define WM8350_AUXADC_POLL 0x2000 33*4882a593Smuzhiyun #define WM8350_AUXADC_HIB_MODE 0x1000 34*4882a593Smuzhiyun #define WM8350_AUXADC_SEL8 0x0080 35*4882a593Smuzhiyun #define WM8350_AUXADC_SEL7 0x0040 36*4882a593Smuzhiyun #define WM8350_AUXADC_SEL6 0x0020 37*4882a593Smuzhiyun #define WM8350_AUXADC_SEL5 0x0010 38*4882a593Smuzhiyun #define WM8350_AUXADC_SEL4 0x0008 39*4882a593Smuzhiyun #define WM8350_AUXADC_SEL3 0x0004 40*4882a593Smuzhiyun #define WM8350_AUXADC_SEL2 0x0002 41*4882a593Smuzhiyun #define WM8350_AUXADC_SEL1 0x0001 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* 44*4882a593Smuzhiyun * R145 (0x91) - Digitiser Control (2) 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun #define WM8350_AUXADC_MASKMODE_MASK 0x3000 47*4882a593Smuzhiyun #define WM8350_AUXADC_CRATE_MASK 0x0700 48*4882a593Smuzhiyun #define WM8350_AUXADC_CAL 0x0004 49*4882a593Smuzhiyun #define WM8350_AUX_RBMODE 0x0002 50*4882a593Smuzhiyun #define WM8350_AUXADC_WAIT 0x0001 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * R152 (0x98) - AUX1 Readback 54*4882a593Smuzhiyun */ 55*4882a593Smuzhiyun #define WM8350_AUXADC_SCALE1_MASK 0x6000 56*4882a593Smuzhiyun #define WM8350_AUXADC_REF1 0x1000 57*4882a593Smuzhiyun #define WM8350_AUXADC_DATA1_MASK 0x0FFF 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* 60*4882a593Smuzhiyun * R153 (0x99) - AUX2 Readback 61*4882a593Smuzhiyun */ 62*4882a593Smuzhiyun #define WM8350_AUXADC_SCALE2_MASK 0x6000 63*4882a593Smuzhiyun #define WM8350_AUXADC_REF2 0x1000 64*4882a593Smuzhiyun #define WM8350_AUXADC_DATA2_MASK 0x0FFF 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 67*4882a593Smuzhiyun * R154 (0x9A) - AUX3 Readback 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun #define WM8350_AUXADC_SCALE3_MASK 0x6000 70*4882a593Smuzhiyun #define WM8350_AUXADC_REF3 0x1000 71*4882a593Smuzhiyun #define WM8350_AUXADC_DATA3_MASK 0x0FFF 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* 74*4882a593Smuzhiyun * R155 (0x9B) - AUX4 Readback 75*4882a593Smuzhiyun */ 76*4882a593Smuzhiyun #define WM8350_AUXADC_SCALE4_MASK 0x6000 77*4882a593Smuzhiyun #define WM8350_AUXADC_REF4 0x1000 78*4882a593Smuzhiyun #define WM8350_AUXADC_DATA4_MASK 0x0FFF 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* 81*4882a593Smuzhiyun * R156 (0x9C) - USB Voltage Readback 82*4882a593Smuzhiyun */ 83*4882a593Smuzhiyun #define WM8350_AUXADC_DATA_USB_MASK 0x0FFF 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* 86*4882a593Smuzhiyun * R157 (0x9D) - LINE Voltage Readback 87*4882a593Smuzhiyun */ 88*4882a593Smuzhiyun #define WM8350_AUXADC_DATA_LINE_MASK 0x0FFF 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* 91*4882a593Smuzhiyun * R158 (0x9E) - BATT Voltage Readback 92*4882a593Smuzhiyun */ 93*4882a593Smuzhiyun #define WM8350_AUXADC_DATA_BATT_MASK 0x0FFF 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* 96*4882a593Smuzhiyun * R159 (0x9F) - Chip Temp Readback 97*4882a593Smuzhiyun */ 98*4882a593Smuzhiyun #define WM8350_AUXADC_DATA_CHIPTEMP_MASK 0x0FFF 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* 101*4882a593Smuzhiyun * R163 (0xA3) - Generic Comparator Control 102*4882a593Smuzhiyun */ 103*4882a593Smuzhiyun #define WM8350_DCMP4_ENA 0x0008 104*4882a593Smuzhiyun #define WM8350_DCMP3_ENA 0x0004 105*4882a593Smuzhiyun #define WM8350_DCMP2_ENA 0x0002 106*4882a593Smuzhiyun #define WM8350_DCMP1_ENA 0x0001 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* 109*4882a593Smuzhiyun * R164 (0xA4) - Generic comparator 1 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun #define WM8350_DCMP1_SRCSEL_MASK 0xE000 112*4882a593Smuzhiyun #define WM8350_DCMP1_GT 0x1000 113*4882a593Smuzhiyun #define WM8350_DCMP1_THR_MASK 0x0FFF 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* 116*4882a593Smuzhiyun * R165 (0xA5) - Generic comparator 2 117*4882a593Smuzhiyun */ 118*4882a593Smuzhiyun #define WM8350_DCMP2_SRCSEL_MASK 0xE000 119*4882a593Smuzhiyun #define WM8350_DCMP2_GT 0x1000 120*4882a593Smuzhiyun #define WM8350_DCMP2_THR_MASK 0x0FFF 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* 123*4882a593Smuzhiyun * R166 (0xA6) - Generic comparator 3 124*4882a593Smuzhiyun */ 125*4882a593Smuzhiyun #define WM8350_DCMP3_SRCSEL_MASK 0xE000 126*4882a593Smuzhiyun #define WM8350_DCMP3_GT 0x1000 127*4882a593Smuzhiyun #define WM8350_DCMP3_THR_MASK 0x0FFF 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* 130*4882a593Smuzhiyun * R167 (0xA7) - Generic comparator 4 131*4882a593Smuzhiyun */ 132*4882a593Smuzhiyun #define WM8350_DCMP4_SRCSEL_MASK 0xE000 133*4882a593Smuzhiyun #define WM8350_DCMP4_GT 0x1000 134*4882a593Smuzhiyun #define WM8350_DCMP4_THR_MASK 0x0FFF 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* 137*4882a593Smuzhiyun * Interrupts. 138*4882a593Smuzhiyun */ 139*4882a593Smuzhiyun #define WM8350_IRQ_AUXADC_DATARDY 16 140*4882a593Smuzhiyun #define WM8350_IRQ_AUXADC_DCOMP4 17 141*4882a593Smuzhiyun #define WM8350_IRQ_AUXADC_DCOMP3 18 142*4882a593Smuzhiyun #define WM8350_IRQ_AUXADC_DCOMP2 19 143*4882a593Smuzhiyun #define WM8350_IRQ_AUXADC_DCOMP1 20 144*4882a593Smuzhiyun #define WM8350_IRQ_SYS_HYST_COMP_FAIL 21 145*4882a593Smuzhiyun #define WM8350_IRQ_SYS_CHIP_GT115 22 146*4882a593Smuzhiyun #define WM8350_IRQ_SYS_CHIP_GT140 23 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* 149*4882a593Smuzhiyun * USB/2, LINE & BATT = ((VRTC * 2) / 4095)) * 10e6 uV 150*4882a593Smuzhiyun * Where VRTC = 2.7 V 151*4882a593Smuzhiyun */ 152*4882a593Smuzhiyun #define WM8350_AUX_COEFF 1319 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun #define WM8350_AUXADC_AUX1 0 155*4882a593Smuzhiyun #define WM8350_AUXADC_AUX2 1 156*4882a593Smuzhiyun #define WM8350_AUXADC_AUX3 2 157*4882a593Smuzhiyun #define WM8350_AUXADC_AUX4 3 158*4882a593Smuzhiyun #define WM8350_AUXADC_USB 4 159*4882a593Smuzhiyun #define WM8350_AUXADC_LINE 5 160*4882a593Smuzhiyun #define WM8350_AUXADC_BATT 6 161*4882a593Smuzhiyun #define WM8350_AUXADC_TEMP 7 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun struct wm8350; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* 166*4882a593Smuzhiyun * AUX ADC Readback 167*4882a593Smuzhiyun */ 168*4882a593Smuzhiyun int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, 169*4882a593Smuzhiyun int vref); 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun #endif 172