1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) ST-Ericsson SA 2010 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __LINUX_MFD_TC3589x_H 7*4882a593Smuzhiyun #define __LINUX_MFD_TC3589x_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct device; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum tx3589x_block { 12*4882a593Smuzhiyun TC3589x_BLOCK_GPIO = 1 << 0, 13*4882a593Smuzhiyun TC3589x_BLOCK_KEYPAD = 1 << 1, 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define TC3589x_RSTCTRL_IRQRST (1 << 4) 17*4882a593Smuzhiyun #define TC3589x_RSTCTRL_TIMRST (1 << 3) 18*4882a593Smuzhiyun #define TC3589x_RSTCTRL_ROTRST (1 << 2) 19*4882a593Smuzhiyun #define TC3589x_RSTCTRL_KBDRST (1 << 1) 20*4882a593Smuzhiyun #define TC3589x_RSTCTRL_GPIRST (1 << 0) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define TC3589x_DKBDMSK_ELINT (1 << 1) 23*4882a593Smuzhiyun #define TC3589x_DKBDMSK_EINT (1 << 0) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Keyboard Configuration Registers */ 26*4882a593Smuzhiyun #define TC3589x_KBDSETTLE_REG 0x01 27*4882a593Smuzhiyun #define TC3589x_KBDBOUNCE 0x02 28*4882a593Smuzhiyun #define TC3589x_KBDSIZE 0x03 29*4882a593Smuzhiyun #define TC3589x_KBCFG_LSB 0x04 30*4882a593Smuzhiyun #define TC3589x_KBCFG_MSB 0x05 31*4882a593Smuzhiyun #define TC3589x_KBDIC 0x08 32*4882a593Smuzhiyun #define TC3589x_KBDMSK 0x09 33*4882a593Smuzhiyun #define TC3589x_EVTCODE_FIFO 0x10 34*4882a593Smuzhiyun #define TC3589x_KBDMFS 0x8F 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define TC3589x_IRQST 0x91 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define TC3589x_MANFCODE_MAGIC 0x03 39*4882a593Smuzhiyun #define TC3589x_MANFCODE 0x80 40*4882a593Smuzhiyun #define TC3589x_VERSION 0x81 41*4882a593Smuzhiyun #define TC3589x_IOCFG 0xA7 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define TC3589x_CLKMODE 0x88 44*4882a593Smuzhiyun #define TC3589x_CLKCFG 0x89 45*4882a593Smuzhiyun #define TC3589x_CLKEN 0x8A 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define TC3589x_RSTCTRL 0x82 48*4882a593Smuzhiyun #define TC3589x_EXTRSTN 0x83 49*4882a593Smuzhiyun #define TC3589x_RSTINTCLR 0x84 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Pull up/down configuration registers */ 52*4882a593Smuzhiyun #define TC3589x_IOCFG 0xA7 53*4882a593Smuzhiyun #define TC3589x_IOPULLCFG0_LSB 0xAA 54*4882a593Smuzhiyun #define TC3589x_IOPULLCFG0_MSB 0xAB 55*4882a593Smuzhiyun #define TC3589x_IOPULLCFG1_LSB 0xAC 56*4882a593Smuzhiyun #define TC3589x_IOPULLCFG1_MSB 0xAD 57*4882a593Smuzhiyun #define TC3589x_IOPULLCFG2_LSB 0xAE 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define TC3589x_GPIOIS0 0xC9 60*4882a593Smuzhiyun #define TC3589x_GPIOIS1 0xCA 61*4882a593Smuzhiyun #define TC3589x_GPIOIS2 0xCB 62*4882a593Smuzhiyun #define TC3589x_GPIOIBE0 0xCC 63*4882a593Smuzhiyun #define TC3589x_GPIOIBE1 0xCD 64*4882a593Smuzhiyun #define TC3589x_GPIOIBE2 0xCE 65*4882a593Smuzhiyun #define TC3589x_GPIOIEV0 0xCF 66*4882a593Smuzhiyun #define TC3589x_GPIOIEV1 0xD0 67*4882a593Smuzhiyun #define TC3589x_GPIOIEV2 0xD1 68*4882a593Smuzhiyun #define TC3589x_GPIOIE0 0xD2 69*4882a593Smuzhiyun #define TC3589x_GPIOIE1 0xD3 70*4882a593Smuzhiyun #define TC3589x_GPIOIE2 0xD4 71*4882a593Smuzhiyun #define TC3589x_GPIORIS0 0xD6 72*4882a593Smuzhiyun #define TC3589x_GPIORIS1 0xD7 73*4882a593Smuzhiyun #define TC3589x_GPIORIS2 0xD8 74*4882a593Smuzhiyun #define TC3589x_GPIOMIS0 0xD9 75*4882a593Smuzhiyun #define TC3589x_GPIOMIS1 0xDA 76*4882a593Smuzhiyun #define TC3589x_GPIOMIS2 0xDB 77*4882a593Smuzhiyun #define TC3589x_GPIOIC0 0xDC 78*4882a593Smuzhiyun #define TC3589x_GPIOIC1 0xDD 79*4882a593Smuzhiyun #define TC3589x_GPIOIC2 0xDE 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define TC3589x_GPIODATA0 0xC0 82*4882a593Smuzhiyun #define TC3589x_GPIOMASK0 0xc1 83*4882a593Smuzhiyun #define TC3589x_GPIODATA1 0xC2 84*4882a593Smuzhiyun #define TC3589x_GPIOMASK1 0xc3 85*4882a593Smuzhiyun #define TC3589x_GPIODATA2 0xC4 86*4882a593Smuzhiyun #define TC3589x_GPIOMASK2 0xC5 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define TC3589x_GPIODIR0 0xC6 89*4882a593Smuzhiyun #define TC3589x_GPIODIR1 0xC7 90*4882a593Smuzhiyun #define TC3589x_GPIODIR2 0xC8 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define TC3589x_GPIOSYNC0 0xE6 93*4882a593Smuzhiyun #define TC3589x_GPIOSYNC1 0xE7 94*4882a593Smuzhiyun #define TC3589x_GPIOSYNC2 0xE8 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define TC3589x_GPIOWAKE0 0xE9 97*4882a593Smuzhiyun #define TC3589x_GPIOWAKE1 0xEA 98*4882a593Smuzhiyun #define TC3589x_GPIOWAKE2 0xEB 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define TC3589x_GPIOODM0 0xE0 101*4882a593Smuzhiyun #define TC3589x_GPIOODE0 0xE1 102*4882a593Smuzhiyun #define TC3589x_GPIOODM1 0xE2 103*4882a593Smuzhiyun #define TC3589x_GPIOODE1 0xE3 104*4882a593Smuzhiyun #define TC3589x_GPIOODM2 0xE4 105*4882a593Smuzhiyun #define TC3589x_GPIOODE2 0xE5 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define TC3589x_DIRECT0 0xEC 108*4882a593Smuzhiyun #define TC3589x_DKBDMSK 0xF3 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun #define TC3589x_INT_GPIIRQ 0 111*4882a593Smuzhiyun #define TC3589x_INT_TI0IRQ 1 112*4882a593Smuzhiyun #define TC3589x_INT_TI1IRQ 2 113*4882a593Smuzhiyun #define TC3589x_INT_TI2IRQ 3 114*4882a593Smuzhiyun #define TC3589x_INT_ROTIRQ 5 115*4882a593Smuzhiyun #define TC3589x_INT_KBDIRQ 6 116*4882a593Smuzhiyun #define TC3589x_INT_PORIRQ 7 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #define TC3589x_NR_INTERNAL_IRQS 8 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun struct tc3589x { 121*4882a593Smuzhiyun struct mutex lock; 122*4882a593Smuzhiyun struct device *dev; 123*4882a593Smuzhiyun struct i2c_client *i2c; 124*4882a593Smuzhiyun struct irq_domain *domain; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun int irq_base; 127*4882a593Smuzhiyun int num_gpio; 128*4882a593Smuzhiyun struct tc3589x_platform_data *pdata; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data); 132*4882a593Smuzhiyun extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg); 133*4882a593Smuzhiyun extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length, 134*4882a593Smuzhiyun u8 *values); 135*4882a593Smuzhiyun extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length, 136*4882a593Smuzhiyun const u8 *values); 137*4882a593Smuzhiyun extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val); 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun /* 140*4882a593Smuzhiyun * Keypad related platform specific constants 141*4882a593Smuzhiyun * These values may be modified for fine tuning 142*4882a593Smuzhiyun */ 143*4882a593Smuzhiyun #define TC_KPD_ROWS 0x8 144*4882a593Smuzhiyun #define TC_KPD_COLUMNS 0x8 145*4882a593Smuzhiyun #define TC_KPD_DEBOUNCE_PERIOD 0xA3 146*4882a593Smuzhiyun #define TC_KPD_SETTLE_TIME 0xA3 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /** 150*4882a593Smuzhiyun * struct tc3589x_platform_data - TC3589x platform data 151*4882a593Smuzhiyun * @block: bitmask of blocks to enable (use TC3589x_BLOCK_*) 152*4882a593Smuzhiyun */ 153*4882a593Smuzhiyun struct tc3589x_platform_data { 154*4882a593Smuzhiyun unsigned int block; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #endif 158