1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2014 MediaTek Inc. 4*4882a593Smuzhiyun * Author: Flora Fu, MediaTek 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __MFD_MT6397_REGISTERS_H__ 8*4882a593Smuzhiyun #define __MFD_MT6397_REGISTERS_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* PMIC Registers */ 11*4882a593Smuzhiyun #define MT6397_CID 0x0100 12*4882a593Smuzhiyun #define MT6397_TOP_CKPDN 0x0102 13*4882a593Smuzhiyun #define MT6397_TOP_CKPDN_SET 0x0104 14*4882a593Smuzhiyun #define MT6397_TOP_CKPDN_CLR 0x0106 15*4882a593Smuzhiyun #define MT6397_TOP_CKPDN2 0x0108 16*4882a593Smuzhiyun #define MT6397_TOP_CKPDN2_SET 0x010A 17*4882a593Smuzhiyun #define MT6397_TOP_CKPDN2_CLR 0x010C 18*4882a593Smuzhiyun #define MT6397_TOP_GPIO_CKPDN 0x010E 19*4882a593Smuzhiyun #define MT6397_TOP_RST_CON 0x0114 20*4882a593Smuzhiyun #define MT6397_WRP_CKPDN 0x011A 21*4882a593Smuzhiyun #define MT6397_WRP_RST_CON 0x0120 22*4882a593Smuzhiyun #define MT6397_TOP_RST_MISC 0x0126 23*4882a593Smuzhiyun #define MT6397_TOP_CKCON1 0x0128 24*4882a593Smuzhiyun #define MT6397_TOP_CKCON2 0x012A 25*4882a593Smuzhiyun #define MT6397_TOP_CKTST1 0x012C 26*4882a593Smuzhiyun #define MT6397_TOP_CKTST2 0x012E 27*4882a593Smuzhiyun #define MT6397_OC_DEG_EN 0x0130 28*4882a593Smuzhiyun #define MT6397_OC_CTL0 0x0132 29*4882a593Smuzhiyun #define MT6397_OC_CTL1 0x0134 30*4882a593Smuzhiyun #define MT6397_OC_CTL2 0x0136 31*4882a593Smuzhiyun #define MT6397_INT_RSV 0x0138 32*4882a593Smuzhiyun #define MT6397_TEST_CON0 0x013A 33*4882a593Smuzhiyun #define MT6397_TEST_CON1 0x013C 34*4882a593Smuzhiyun #define MT6397_STATUS0 0x013E 35*4882a593Smuzhiyun #define MT6397_STATUS1 0x0140 36*4882a593Smuzhiyun #define MT6397_PGSTATUS 0x0142 37*4882a593Smuzhiyun #define MT6397_CHRSTATUS 0x0144 38*4882a593Smuzhiyun #define MT6397_OCSTATUS0 0x0146 39*4882a593Smuzhiyun #define MT6397_OCSTATUS1 0x0148 40*4882a593Smuzhiyun #define MT6397_OCSTATUS2 0x014A 41*4882a593Smuzhiyun #define MT6397_HDMI_PAD_IE 0x014C 42*4882a593Smuzhiyun #define MT6397_TEST_OUT_L 0x014E 43*4882a593Smuzhiyun #define MT6397_TEST_OUT_H 0x0150 44*4882a593Smuzhiyun #define MT6397_TDSEL_CON 0x0152 45*4882a593Smuzhiyun #define MT6397_RDSEL_CON 0x0154 46*4882a593Smuzhiyun #define MT6397_GPIO_SMT_CON0 0x0156 47*4882a593Smuzhiyun #define MT6397_GPIO_SMT_CON1 0x0158 48*4882a593Smuzhiyun #define MT6397_GPIO_SMT_CON2 0x015A 49*4882a593Smuzhiyun #define MT6397_GPIO_SMT_CON3 0x015C 50*4882a593Smuzhiyun #define MT6397_DRV_CON0 0x015E 51*4882a593Smuzhiyun #define MT6397_DRV_CON1 0x0160 52*4882a593Smuzhiyun #define MT6397_DRV_CON2 0x0162 53*4882a593Smuzhiyun #define MT6397_DRV_CON3 0x0164 54*4882a593Smuzhiyun #define MT6397_DRV_CON4 0x0166 55*4882a593Smuzhiyun #define MT6397_DRV_CON5 0x0168 56*4882a593Smuzhiyun #define MT6397_DRV_CON6 0x016A 57*4882a593Smuzhiyun #define MT6397_DRV_CON7 0x016C 58*4882a593Smuzhiyun #define MT6397_DRV_CON8 0x016E 59*4882a593Smuzhiyun #define MT6397_DRV_CON9 0x0170 60*4882a593Smuzhiyun #define MT6397_DRV_CON10 0x0172 61*4882a593Smuzhiyun #define MT6397_DRV_CON11 0x0174 62*4882a593Smuzhiyun #define MT6397_DRV_CON12 0x0176 63*4882a593Smuzhiyun #define MT6397_INT_CON0 0x0178 64*4882a593Smuzhiyun #define MT6397_INT_CON1 0x017E 65*4882a593Smuzhiyun #define MT6397_INT_STATUS0 0x0184 66*4882a593Smuzhiyun #define MT6397_INT_STATUS1 0x0186 67*4882a593Smuzhiyun #define MT6397_FQMTR_CON0 0x0188 68*4882a593Smuzhiyun #define MT6397_FQMTR_CON1 0x018A 69*4882a593Smuzhiyun #define MT6397_FQMTR_CON2 0x018C 70*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_0_15 0x01C4 71*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_16_31 0x01C6 72*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_32_47 0x01C8 73*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_48_63 0x01CA 74*4882a593Smuzhiyun #define MT6397_SPI_CON 0x01CC 75*4882a593Smuzhiyun #define MT6397_TOP_CKPDN3 0x01CE 76*4882a593Smuzhiyun #define MT6397_TOP_CKCON3 0x01D4 77*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_64_79 0x01D6 78*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_80_95 0x01D8 79*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_96_111 0x01DA 80*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_112_127 0x01DC 81*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_128_143 0x01DE 82*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_144_159 0x01E0 83*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_160_175 0x01E2 84*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_176_191 0x01E4 85*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_192_207 0x01E6 86*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_208_223 0x01E8 87*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_224_239 0x01EA 88*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_240_255 0x01EC 89*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_256_271 0x01EE 90*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_272_287 0x01F0 91*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_288_300 0x01F2 92*4882a593Smuzhiyun #define MT6397_EFUSE_DOUT_304_319 0x01F4 93*4882a593Smuzhiyun #define MT6397_BUCK_CON0 0x0200 94*4882a593Smuzhiyun #define MT6397_BUCK_CON1 0x0202 95*4882a593Smuzhiyun #define MT6397_BUCK_CON2 0x0204 96*4882a593Smuzhiyun #define MT6397_BUCK_CON3 0x0206 97*4882a593Smuzhiyun #define MT6397_BUCK_CON4 0x0208 98*4882a593Smuzhiyun #define MT6397_BUCK_CON5 0x020A 99*4882a593Smuzhiyun #define MT6397_BUCK_CON6 0x020C 100*4882a593Smuzhiyun #define MT6397_BUCK_CON7 0x020E 101*4882a593Smuzhiyun #define MT6397_BUCK_CON8 0x0210 102*4882a593Smuzhiyun #define MT6397_BUCK_CON9 0x0212 103*4882a593Smuzhiyun #define MT6397_VCA15_CON0 0x0214 104*4882a593Smuzhiyun #define MT6397_VCA15_CON1 0x0216 105*4882a593Smuzhiyun #define MT6397_VCA15_CON2 0x0218 106*4882a593Smuzhiyun #define MT6397_VCA15_CON3 0x021A 107*4882a593Smuzhiyun #define MT6397_VCA15_CON4 0x021C 108*4882a593Smuzhiyun #define MT6397_VCA15_CON5 0x021E 109*4882a593Smuzhiyun #define MT6397_VCA15_CON6 0x0220 110*4882a593Smuzhiyun #define MT6397_VCA15_CON7 0x0222 111*4882a593Smuzhiyun #define MT6397_VCA15_CON8 0x0224 112*4882a593Smuzhiyun #define MT6397_VCA15_CON9 0x0226 113*4882a593Smuzhiyun #define MT6397_VCA15_CON10 0x0228 114*4882a593Smuzhiyun #define MT6397_VCA15_CON11 0x022A 115*4882a593Smuzhiyun #define MT6397_VCA15_CON12 0x022C 116*4882a593Smuzhiyun #define MT6397_VCA15_CON13 0x022E 117*4882a593Smuzhiyun #define MT6397_VCA15_CON14 0x0230 118*4882a593Smuzhiyun #define MT6397_VCA15_CON15 0x0232 119*4882a593Smuzhiyun #define MT6397_VCA15_CON16 0x0234 120*4882a593Smuzhiyun #define MT6397_VCA15_CON17 0x0236 121*4882a593Smuzhiyun #define MT6397_VCA15_CON18 0x0238 122*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON0 0x023A 123*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON1 0x023C 124*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON2 0x023E 125*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON3 0x0240 126*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON4 0x0242 127*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON5 0x0244 128*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON6 0x0246 129*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON7 0x0248 130*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON8 0x024A 131*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON9 0x024C 132*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON10 0x024E 133*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON11 0x0250 134*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON12 0x0252 135*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON13 0x0254 136*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON14 0x0256 137*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON15 0x0258 138*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON16 0x025A 139*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON17 0x025C 140*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON18 0x025E 141*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON19 0x0260 142*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON20 0x0262 143*4882a593Smuzhiyun #define MT6397_VSRMCA15_CON21 0x0264 144*4882a593Smuzhiyun #define MT6397_VCORE_CON0 0x0266 145*4882a593Smuzhiyun #define MT6397_VCORE_CON1 0x0268 146*4882a593Smuzhiyun #define MT6397_VCORE_CON2 0x026A 147*4882a593Smuzhiyun #define MT6397_VCORE_CON3 0x026C 148*4882a593Smuzhiyun #define MT6397_VCORE_CON4 0x026E 149*4882a593Smuzhiyun #define MT6397_VCORE_CON5 0x0270 150*4882a593Smuzhiyun #define MT6397_VCORE_CON6 0x0272 151*4882a593Smuzhiyun #define MT6397_VCORE_CON7 0x0274 152*4882a593Smuzhiyun #define MT6397_VCORE_CON8 0x0276 153*4882a593Smuzhiyun #define MT6397_VCORE_CON9 0x0278 154*4882a593Smuzhiyun #define MT6397_VCORE_CON10 0x027A 155*4882a593Smuzhiyun #define MT6397_VCORE_CON11 0x027C 156*4882a593Smuzhiyun #define MT6397_VCORE_CON12 0x027E 157*4882a593Smuzhiyun #define MT6397_VCORE_CON13 0x0280 158*4882a593Smuzhiyun #define MT6397_VCORE_CON14 0x0282 159*4882a593Smuzhiyun #define MT6397_VCORE_CON15 0x0284 160*4882a593Smuzhiyun #define MT6397_VCORE_CON16 0x0286 161*4882a593Smuzhiyun #define MT6397_VCORE_CON17 0x0288 162*4882a593Smuzhiyun #define MT6397_VCORE_CON18 0x028A 163*4882a593Smuzhiyun #define MT6397_VGPU_CON0 0x028C 164*4882a593Smuzhiyun #define MT6397_VGPU_CON1 0x028E 165*4882a593Smuzhiyun #define MT6397_VGPU_CON2 0x0290 166*4882a593Smuzhiyun #define MT6397_VGPU_CON3 0x0292 167*4882a593Smuzhiyun #define MT6397_VGPU_CON4 0x0294 168*4882a593Smuzhiyun #define MT6397_VGPU_CON5 0x0296 169*4882a593Smuzhiyun #define MT6397_VGPU_CON6 0x0298 170*4882a593Smuzhiyun #define MT6397_VGPU_CON7 0x029A 171*4882a593Smuzhiyun #define MT6397_VGPU_CON8 0x029C 172*4882a593Smuzhiyun #define MT6397_VGPU_CON9 0x029E 173*4882a593Smuzhiyun #define MT6397_VGPU_CON10 0x02A0 174*4882a593Smuzhiyun #define MT6397_VGPU_CON11 0x02A2 175*4882a593Smuzhiyun #define MT6397_VGPU_CON12 0x02A4 176*4882a593Smuzhiyun #define MT6397_VGPU_CON13 0x02A6 177*4882a593Smuzhiyun #define MT6397_VGPU_CON14 0x02A8 178*4882a593Smuzhiyun #define MT6397_VGPU_CON15 0x02AA 179*4882a593Smuzhiyun #define MT6397_VGPU_CON16 0x02AC 180*4882a593Smuzhiyun #define MT6397_VGPU_CON17 0x02AE 181*4882a593Smuzhiyun #define MT6397_VGPU_CON18 0x02B0 182*4882a593Smuzhiyun #define MT6397_VIO18_CON0 0x0300 183*4882a593Smuzhiyun #define MT6397_VIO18_CON1 0x0302 184*4882a593Smuzhiyun #define MT6397_VIO18_CON2 0x0304 185*4882a593Smuzhiyun #define MT6397_VIO18_CON3 0x0306 186*4882a593Smuzhiyun #define MT6397_VIO18_CON4 0x0308 187*4882a593Smuzhiyun #define MT6397_VIO18_CON5 0x030A 188*4882a593Smuzhiyun #define MT6397_VIO18_CON6 0x030C 189*4882a593Smuzhiyun #define MT6397_VIO18_CON7 0x030E 190*4882a593Smuzhiyun #define MT6397_VIO18_CON8 0x0310 191*4882a593Smuzhiyun #define MT6397_VIO18_CON9 0x0312 192*4882a593Smuzhiyun #define MT6397_VIO18_CON10 0x0314 193*4882a593Smuzhiyun #define MT6397_VIO18_CON11 0x0316 194*4882a593Smuzhiyun #define MT6397_VIO18_CON12 0x0318 195*4882a593Smuzhiyun #define MT6397_VIO18_CON13 0x031A 196*4882a593Smuzhiyun #define MT6397_VIO18_CON14 0x031C 197*4882a593Smuzhiyun #define MT6397_VIO18_CON15 0x031E 198*4882a593Smuzhiyun #define MT6397_VIO18_CON16 0x0320 199*4882a593Smuzhiyun #define MT6397_VIO18_CON17 0x0322 200*4882a593Smuzhiyun #define MT6397_VIO18_CON18 0x0324 201*4882a593Smuzhiyun #define MT6397_VPCA7_CON0 0x0326 202*4882a593Smuzhiyun #define MT6397_VPCA7_CON1 0x0328 203*4882a593Smuzhiyun #define MT6397_VPCA7_CON2 0x032A 204*4882a593Smuzhiyun #define MT6397_VPCA7_CON3 0x032C 205*4882a593Smuzhiyun #define MT6397_VPCA7_CON4 0x032E 206*4882a593Smuzhiyun #define MT6397_VPCA7_CON5 0x0330 207*4882a593Smuzhiyun #define MT6397_VPCA7_CON6 0x0332 208*4882a593Smuzhiyun #define MT6397_VPCA7_CON7 0x0334 209*4882a593Smuzhiyun #define MT6397_VPCA7_CON8 0x0336 210*4882a593Smuzhiyun #define MT6397_VPCA7_CON9 0x0338 211*4882a593Smuzhiyun #define MT6397_VPCA7_CON10 0x033A 212*4882a593Smuzhiyun #define MT6397_VPCA7_CON11 0x033C 213*4882a593Smuzhiyun #define MT6397_VPCA7_CON12 0x033E 214*4882a593Smuzhiyun #define MT6397_VPCA7_CON13 0x0340 215*4882a593Smuzhiyun #define MT6397_VPCA7_CON14 0x0342 216*4882a593Smuzhiyun #define MT6397_VPCA7_CON15 0x0344 217*4882a593Smuzhiyun #define MT6397_VPCA7_CON16 0x0346 218*4882a593Smuzhiyun #define MT6397_VPCA7_CON17 0x0348 219*4882a593Smuzhiyun #define MT6397_VPCA7_CON18 0x034A 220*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON0 0x034C 221*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON1 0x034E 222*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON2 0x0350 223*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON3 0x0352 224*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON4 0x0354 225*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON5 0x0356 226*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON6 0x0358 227*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON7 0x035A 228*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON8 0x035C 229*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON9 0x035E 230*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON10 0x0360 231*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON11 0x0362 232*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON12 0x0364 233*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON13 0x0366 234*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON14 0x0368 235*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON15 0x036A 236*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON16 0x036C 237*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON17 0x036E 238*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON18 0x0370 239*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON19 0x0372 240*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON20 0x0374 241*4882a593Smuzhiyun #define MT6397_VSRMCA7_CON21 0x0376 242*4882a593Smuzhiyun #define MT6397_VDRM_CON0 0x0378 243*4882a593Smuzhiyun #define MT6397_VDRM_CON1 0x037A 244*4882a593Smuzhiyun #define MT6397_VDRM_CON2 0x037C 245*4882a593Smuzhiyun #define MT6397_VDRM_CON3 0x037E 246*4882a593Smuzhiyun #define MT6397_VDRM_CON4 0x0380 247*4882a593Smuzhiyun #define MT6397_VDRM_CON5 0x0382 248*4882a593Smuzhiyun #define MT6397_VDRM_CON6 0x0384 249*4882a593Smuzhiyun #define MT6397_VDRM_CON7 0x0386 250*4882a593Smuzhiyun #define MT6397_VDRM_CON8 0x0388 251*4882a593Smuzhiyun #define MT6397_VDRM_CON9 0x038A 252*4882a593Smuzhiyun #define MT6397_VDRM_CON10 0x038C 253*4882a593Smuzhiyun #define MT6397_VDRM_CON11 0x038E 254*4882a593Smuzhiyun #define MT6397_VDRM_CON12 0x0390 255*4882a593Smuzhiyun #define MT6397_VDRM_CON13 0x0392 256*4882a593Smuzhiyun #define MT6397_VDRM_CON14 0x0394 257*4882a593Smuzhiyun #define MT6397_VDRM_CON15 0x0396 258*4882a593Smuzhiyun #define MT6397_VDRM_CON16 0x0398 259*4882a593Smuzhiyun #define MT6397_VDRM_CON17 0x039A 260*4882a593Smuzhiyun #define MT6397_VDRM_CON18 0x039C 261*4882a593Smuzhiyun #define MT6397_BUCK_K_CON0 0x039E 262*4882a593Smuzhiyun #define MT6397_BUCK_K_CON1 0x03A0 263*4882a593Smuzhiyun #define MT6397_ANALDO_CON0 0x0400 264*4882a593Smuzhiyun #define MT6397_ANALDO_CON1 0x0402 265*4882a593Smuzhiyun #define MT6397_ANALDO_CON2 0x0404 266*4882a593Smuzhiyun #define MT6397_ANALDO_CON3 0x0406 267*4882a593Smuzhiyun #define MT6397_ANALDO_CON4 0x0408 268*4882a593Smuzhiyun #define MT6397_ANALDO_CON5 0x040A 269*4882a593Smuzhiyun #define MT6397_ANALDO_CON6 0x040C 270*4882a593Smuzhiyun #define MT6397_ANALDO_CON7 0x040E 271*4882a593Smuzhiyun #define MT6397_DIGLDO_CON0 0x0410 272*4882a593Smuzhiyun #define MT6397_DIGLDO_CON1 0x0412 273*4882a593Smuzhiyun #define MT6397_DIGLDO_CON2 0x0414 274*4882a593Smuzhiyun #define MT6397_DIGLDO_CON3 0x0416 275*4882a593Smuzhiyun #define MT6397_DIGLDO_CON4 0x0418 276*4882a593Smuzhiyun #define MT6397_DIGLDO_CON5 0x041A 277*4882a593Smuzhiyun #define MT6397_DIGLDO_CON6 0x041C 278*4882a593Smuzhiyun #define MT6397_DIGLDO_CON7 0x041E 279*4882a593Smuzhiyun #define MT6397_DIGLDO_CON8 0x0420 280*4882a593Smuzhiyun #define MT6397_DIGLDO_CON9 0x0422 281*4882a593Smuzhiyun #define MT6397_DIGLDO_CON10 0x0424 282*4882a593Smuzhiyun #define MT6397_DIGLDO_CON11 0x0426 283*4882a593Smuzhiyun #define MT6397_DIGLDO_CON12 0x0428 284*4882a593Smuzhiyun #define MT6397_DIGLDO_CON13 0x042A 285*4882a593Smuzhiyun #define MT6397_DIGLDO_CON14 0x042C 286*4882a593Smuzhiyun #define MT6397_DIGLDO_CON15 0x042E 287*4882a593Smuzhiyun #define MT6397_DIGLDO_CON16 0x0430 288*4882a593Smuzhiyun #define MT6397_DIGLDO_CON17 0x0432 289*4882a593Smuzhiyun #define MT6397_DIGLDO_CON18 0x0434 290*4882a593Smuzhiyun #define MT6397_DIGLDO_CON19 0x0436 291*4882a593Smuzhiyun #define MT6397_DIGLDO_CON20 0x0438 292*4882a593Smuzhiyun #define MT6397_DIGLDO_CON21 0x043A 293*4882a593Smuzhiyun #define MT6397_DIGLDO_CON22 0x043C 294*4882a593Smuzhiyun #define MT6397_DIGLDO_CON23 0x043E 295*4882a593Smuzhiyun #define MT6397_DIGLDO_CON24 0x0440 296*4882a593Smuzhiyun #define MT6397_DIGLDO_CON25 0x0442 297*4882a593Smuzhiyun #define MT6397_DIGLDO_CON26 0x0444 298*4882a593Smuzhiyun #define MT6397_DIGLDO_CON27 0x0446 299*4882a593Smuzhiyun #define MT6397_DIGLDO_CON28 0x0448 300*4882a593Smuzhiyun #define MT6397_DIGLDO_CON29 0x044A 301*4882a593Smuzhiyun #define MT6397_DIGLDO_CON30 0x044C 302*4882a593Smuzhiyun #define MT6397_DIGLDO_CON31 0x044E 303*4882a593Smuzhiyun #define MT6397_DIGLDO_CON32 0x0450 304*4882a593Smuzhiyun #define MT6397_DIGLDO_CON33 0x045A 305*4882a593Smuzhiyun #define MT6397_SPK_CON0 0x0600 306*4882a593Smuzhiyun #define MT6397_SPK_CON1 0x0602 307*4882a593Smuzhiyun #define MT6397_SPK_CON2 0x0604 308*4882a593Smuzhiyun #define MT6397_SPK_CON3 0x0606 309*4882a593Smuzhiyun #define MT6397_SPK_CON4 0x0608 310*4882a593Smuzhiyun #define MT6397_SPK_CON5 0x060A 311*4882a593Smuzhiyun #define MT6397_SPK_CON6 0x060C 312*4882a593Smuzhiyun #define MT6397_SPK_CON7 0x060E 313*4882a593Smuzhiyun #define MT6397_SPK_CON8 0x0610 314*4882a593Smuzhiyun #define MT6397_SPK_CON9 0x0612 315*4882a593Smuzhiyun #define MT6397_SPK_CON10 0x0614 316*4882a593Smuzhiyun #define MT6397_SPK_CON11 0x0616 317*4882a593Smuzhiyun #define MT6397_AUDDAC_CON0 0x0700 318*4882a593Smuzhiyun #define MT6397_AUDBUF_CFG0 0x0702 319*4882a593Smuzhiyun #define MT6397_AUDBUF_CFG1 0x0704 320*4882a593Smuzhiyun #define MT6397_AUDBUF_CFG2 0x0706 321*4882a593Smuzhiyun #define MT6397_AUDBUF_CFG3 0x0708 322*4882a593Smuzhiyun #define MT6397_AUDBUF_CFG4 0x070A 323*4882a593Smuzhiyun #define MT6397_IBIASDIST_CFG0 0x070C 324*4882a593Smuzhiyun #define MT6397_AUDACCDEPOP_CFG0 0x070E 325*4882a593Smuzhiyun #define MT6397_AUD_IV_CFG0 0x0710 326*4882a593Smuzhiyun #define MT6397_AUDCLKGEN_CFG0 0x0712 327*4882a593Smuzhiyun #define MT6397_AUDLDO_CFG0 0x0714 328*4882a593Smuzhiyun #define MT6397_AUDLDO_CFG1 0x0716 329*4882a593Smuzhiyun #define MT6397_AUDNVREGGLB_CFG0 0x0718 330*4882a593Smuzhiyun #define MT6397_AUD_NCP0 0x071A 331*4882a593Smuzhiyun #define MT6397_AUDPREAMP_CON0 0x071C 332*4882a593Smuzhiyun #define MT6397_AUDADC_CON0 0x071E 333*4882a593Smuzhiyun #define MT6397_AUDADC_CON1 0x0720 334*4882a593Smuzhiyun #define MT6397_AUDADC_CON2 0x0722 335*4882a593Smuzhiyun #define MT6397_AUDADC_CON3 0x0724 336*4882a593Smuzhiyun #define MT6397_AUDADC_CON4 0x0726 337*4882a593Smuzhiyun #define MT6397_AUDADC_CON5 0x0728 338*4882a593Smuzhiyun #define MT6397_AUDADC_CON6 0x072A 339*4882a593Smuzhiyun #define MT6397_AUDDIGMI_CON0 0x072C 340*4882a593Smuzhiyun #define MT6397_AUDLSBUF_CON0 0x072E 341*4882a593Smuzhiyun #define MT6397_AUDLSBUF_CON1 0x0730 342*4882a593Smuzhiyun #define MT6397_AUDENCSPARE_CON0 0x0732 343*4882a593Smuzhiyun #define MT6397_AUDENCCLKSQ_CON0 0x0734 344*4882a593Smuzhiyun #define MT6397_AUDPREAMPGAIN_CON0 0x0736 345*4882a593Smuzhiyun #define MT6397_ZCD_CON0 0x0738 346*4882a593Smuzhiyun #define MT6397_ZCD_CON1 0x073A 347*4882a593Smuzhiyun #define MT6397_ZCD_CON2 0x073C 348*4882a593Smuzhiyun #define MT6397_ZCD_CON3 0x073E 349*4882a593Smuzhiyun #define MT6397_ZCD_CON4 0x0740 350*4882a593Smuzhiyun #define MT6397_ZCD_CON5 0x0742 351*4882a593Smuzhiyun #define MT6397_NCP_CLKDIV_CON0 0x0744 352*4882a593Smuzhiyun #define MT6397_NCP_CLKDIV_CON1 0x0746 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun #endif /* __MFD_MT6397_REGISTERS_H__ */ 355