1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2018 BayLibre SAS 4*4882a593Smuzhiyun * Author: Bartosz Golaszewski <bgolaszewski@baylibre.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Common definitions for MAXIM 77650/77651 charger/power-supply. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef MAX77650_H 10*4882a593Smuzhiyun #define MAX77650_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/bits.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define MAX77650_REG_INT_GLBL 0x00 15*4882a593Smuzhiyun #define MAX77650_REG_INT_CHG 0x01 16*4882a593Smuzhiyun #define MAX77650_REG_STAT_CHG_A 0x02 17*4882a593Smuzhiyun #define MAX77650_REG_STAT_CHG_B 0x03 18*4882a593Smuzhiyun #define MAX77650_REG_ERCFLAG 0x04 19*4882a593Smuzhiyun #define MAX77650_REG_STAT_GLBL 0x05 20*4882a593Smuzhiyun #define MAX77650_REG_INTM_GLBL 0x06 21*4882a593Smuzhiyun #define MAX77650_REG_INTM_CHG 0x07 22*4882a593Smuzhiyun #define MAX77650_REG_CNFG_GLBL 0x10 23*4882a593Smuzhiyun #define MAX77650_REG_CID 0x11 24*4882a593Smuzhiyun #define MAX77650_REG_CNFG_GPIO 0x12 25*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_A 0x18 26*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_B 0x19 27*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_C 0x1a 28*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_D 0x1b 29*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_E 0x1c 30*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_F 0x1d 31*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_G 0x1e 32*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_H 0x1f 33*4882a593Smuzhiyun #define MAX77650_REG_CNFG_CHG_I 0x20 34*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB_TOP 0x28 35*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB0_A 0x29 36*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB0_B 0x2a 37*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB1_A 0x2b 38*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB1_B 0x2c 39*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB2_A 0x2d 40*4882a593Smuzhiyun #define MAX77650_REG_CNFG_SBB2_B 0x2e 41*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LDO_A 0x38 42*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LDO_B 0x39 43*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED0_A 0x40 44*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED1_A 0x41 45*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED2_A 0x42 46*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED0_B 0x43 47*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED1_B 0x44 48*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED2_B 0x45 49*4882a593Smuzhiyun #define MAX77650_REG_CNFG_LED_TOP 0x46 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define MAX77650_CID_MASK GENMASK(3, 0) 52*4882a593Smuzhiyun #define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK) 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define MAX77650_CID_77650A 0x03 55*4882a593Smuzhiyun #define MAX77650_CID_77650C 0x0a 56*4882a593Smuzhiyun #define MAX77650_CID_77651A 0x06 57*4882a593Smuzhiyun #define MAX77650_CID_77651B 0x08 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #endif /* MAX77650_H */ 60