1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Common Definitions for Janz MODULbus devices 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef JANZ_H 9*4882a593Smuzhiyun #define JANZ_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct janz_platform_data { 12*4882a593Smuzhiyun /* MODULbus Module Number */ 13*4882a593Smuzhiyun unsigned int modno; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* PLX bridge chip onboard registers */ 17*4882a593Smuzhiyun struct janz_cmodio_onboard_regs { 18*4882a593Smuzhiyun u8 unused1; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * Read access: interrupt status 22*4882a593Smuzhiyun * Write access: interrupt disable 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun u8 int_disable; 25*4882a593Smuzhiyun u8 unused2; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * Read access: MODULbus number (hex switch) 29*4882a593Smuzhiyun * Write access: interrupt enable 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun u8 int_enable; 32*4882a593Smuzhiyun u8 unused3; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* write-only */ 35*4882a593Smuzhiyun u8 reset_assert; 36*4882a593Smuzhiyun u8 unused4; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* write-only */ 39*4882a593Smuzhiyun u8 reset_deassert; 40*4882a593Smuzhiyun u8 unused5; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* read-write access to serial EEPROM */ 43*4882a593Smuzhiyun u8 eep; 44*4882a593Smuzhiyun u8 unused6; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* write-only access to EEPROM chip select */ 47*4882a593Smuzhiyun u8 enid; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif /* JANZ_H */ 51