xref: /OK3568_Linux_fs/kernel/include/linux/mfd/intel_soc_pmic.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Intel SoC PMIC Driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2012-2014 Intel Corporation. All rights reserved.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Yang, Bin <bin.yang@intel.com>
8*4882a593Smuzhiyun  * Author: Zhu, Lejun <lejun.zhu@linux.intel.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __INTEL_SOC_PMIC_H__
12*4882a593Smuzhiyun #define __INTEL_SOC_PMIC_H__
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /**
17*4882a593Smuzhiyun  * struct intel_soc_pmic - Intel SoC PMIC data
18*4882a593Smuzhiyun  * @irq: Master interrupt number of the parent PMIC device
19*4882a593Smuzhiyun  * @regmap: Pointer to the parent PMIC device regmap structure
20*4882a593Smuzhiyun  * @irq_chip_data: IRQ chip data for the PMIC itself
21*4882a593Smuzhiyun  * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button
22*4882a593Smuzhiyun  * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit
23*4882a593Smuzhiyun  * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit
24*4882a593Smuzhiyun  * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC
25*4882a593Smuzhiyun  * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger
26*4882a593Smuzhiyun  * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler
27*4882a593Smuzhiyun  * @dev: Pointer to the parent PMIC device
28*4882a593Smuzhiyun  * @scu: Pointer to the SCU IPC device data structure
29*4882a593Smuzhiyun  */
30*4882a593Smuzhiyun struct intel_soc_pmic {
31*4882a593Smuzhiyun 	int irq;
32*4882a593Smuzhiyun 	struct regmap *regmap;
33*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data;
34*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
35*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_tmu;
36*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_bcu;
37*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_adc;
38*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_chgr;
39*4882a593Smuzhiyun 	struct regmap_irq_chip_data *irq_chip_data_crit;
40*4882a593Smuzhiyun 	struct device *dev;
41*4882a593Smuzhiyun 	struct intel_scu_ipc_dev *scu;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,
45*4882a593Smuzhiyun 					      u32 value, u32 mask);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #endif	/* __INTEL_SOC_PMIC_H__ */
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