1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Header file for device driver Hi6421 PMIC 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 Linaro Ltd. 6*4882a593Smuzhiyun * Copyright (C) 2011 Hisilicon. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Guodong Xu <guodong.xu@linaro.org> 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __HISI_PMIC_H 12*4882a593Smuzhiyun #define __HISI_PMIC_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <linux/irqdomain.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define HISI_REGS_ENA_PROTECT_TIME (0) /* in microseconds */ 17*4882a593Smuzhiyun #define HISI_ECO_MODE_ENABLE (1) 18*4882a593Smuzhiyun #define HISI_ECO_MODE_DISABLE (0) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun struct hi6421_spmi_pmic { 21*4882a593Smuzhiyun struct resource *res; 22*4882a593Smuzhiyun struct device *dev; 23*4882a593Smuzhiyun void __iomem *regs; 24*4882a593Smuzhiyun spinlock_t lock; 25*4882a593Smuzhiyun struct irq_domain *domain; 26*4882a593Smuzhiyun int irq; 27*4882a593Smuzhiyun int gpio; 28*4882a593Smuzhiyun unsigned int *irqs; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg); 32*4882a593Smuzhiyun int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val); 33*4882a593Smuzhiyun int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg, 34*4882a593Smuzhiyun u32 mask, u32 bits); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun enum hi6421_spmi_pmic_irq_list { 37*4882a593Smuzhiyun OTMP = 0, 38*4882a593Smuzhiyun VBUS_CONNECT, 39*4882a593Smuzhiyun VBUS_DISCONNECT, 40*4882a593Smuzhiyun ALARMON_R, 41*4882a593Smuzhiyun HOLD_6S, 42*4882a593Smuzhiyun HOLD_1S, 43*4882a593Smuzhiyun POWERKEY_UP, 44*4882a593Smuzhiyun POWERKEY_DOWN, 45*4882a593Smuzhiyun OCP_SCP_R, 46*4882a593Smuzhiyun COUL_R, 47*4882a593Smuzhiyun SIM0_HPD_R, 48*4882a593Smuzhiyun SIM0_HPD_F, 49*4882a593Smuzhiyun SIM1_HPD_R, 50*4882a593Smuzhiyun SIM1_HPD_F, 51*4882a593Smuzhiyun PMIC_IRQ_LIST_MAX, 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun #endif /* __HISI_PMIC_H */ 54