1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Registers definition for DA9063 modules 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2012 Dialog Semiconductor Ltd. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Michal Hajduk, Dialog Semiconductor 8*4882a593Smuzhiyun * Author: Krystian Garbaciak, Dialog Semiconductor 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef _DA9063_REG_H 12*4882a593Smuzhiyun #define _DA9063_REG_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define DA9063_I2C_PAGE_SEL_SHIFT 1 15*4882a593Smuzhiyun #define DA9063_EVENT_REG_NUM 4 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* Page selection I2C or SPI always in the begining of any page. */ 18*4882a593Smuzhiyun /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ 19*4882a593Smuzhiyun /* Page 1 : SPI access 0x080 - 0x0FF */ 20*4882a593Smuzhiyun /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */ 21*4882a593Smuzhiyun /* Page 3 : SPI access 0x180 - 0x1FF */ 22*4882a593Smuzhiyun #define DA9063_REG_PAGE_CON 0x00 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* System Control and Event Registers */ 25*4882a593Smuzhiyun #define DA9063_REG_STATUS_A 0x01 26*4882a593Smuzhiyun #define DA9063_REG_STATUS_B 0x02 27*4882a593Smuzhiyun #define DA9063_REG_STATUS_C 0x03 28*4882a593Smuzhiyun #define DA9063_REG_STATUS_D 0x04 29*4882a593Smuzhiyun #define DA9063_REG_FAULT_LOG 0x05 30*4882a593Smuzhiyun #define DA9063_REG_EVENT_A 0x06 31*4882a593Smuzhiyun #define DA9063_REG_EVENT_B 0x07 32*4882a593Smuzhiyun #define DA9063_REG_EVENT_C 0x08 33*4882a593Smuzhiyun #define DA9063_REG_EVENT_D 0x09 34*4882a593Smuzhiyun #define DA9063_REG_IRQ_MASK_A 0x0A 35*4882a593Smuzhiyun #define DA9063_REG_IRQ_MASK_B 0x0B 36*4882a593Smuzhiyun #define DA9063_REG_IRQ_MASK_C 0x0C 37*4882a593Smuzhiyun #define DA9063_REG_IRQ_MASK_D 0x0D 38*4882a593Smuzhiyun #define DA9063_REG_CONTROL_A 0x0E 39*4882a593Smuzhiyun #define DA9063_REG_CONTROL_B 0x0F 40*4882a593Smuzhiyun #define DA9063_REG_CONTROL_C 0x10 41*4882a593Smuzhiyun #define DA9063_REG_CONTROL_D 0x11 42*4882a593Smuzhiyun #define DA9063_REG_CONTROL_E 0x12 43*4882a593Smuzhiyun #define DA9063_REG_CONTROL_F 0x13 44*4882a593Smuzhiyun #define DA9063_REG_PD_DIS 0x14 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* GPIO Control Registers */ 47*4882a593Smuzhiyun #define DA9063_REG_GPIO_0_1 0x15 48*4882a593Smuzhiyun #define DA9063_REG_GPIO_2_3 0x16 49*4882a593Smuzhiyun #define DA9063_REG_GPIO_4_5 0x17 50*4882a593Smuzhiyun #define DA9063_REG_GPIO_6_7 0x18 51*4882a593Smuzhiyun #define DA9063_REG_GPIO_8_9 0x19 52*4882a593Smuzhiyun #define DA9063_REG_GPIO_10_11 0x1A 53*4882a593Smuzhiyun #define DA9063_REG_GPIO_12_13 0x1B 54*4882a593Smuzhiyun #define DA9063_REG_GPIO_14_15 0x1C 55*4882a593Smuzhiyun #define DA9063_REG_GPIO_MODE0_7 0x1D 56*4882a593Smuzhiyun #define DA9063_REG_GPIO_MODE8_15 0x1E 57*4882a593Smuzhiyun #define DA9063_REG_SWITCH_CONT 0x1F 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Regulator Control Registers */ 60*4882a593Smuzhiyun #define DA9063_REG_BCORE2_CONT 0x20 61*4882a593Smuzhiyun #define DA9063_REG_BCORE1_CONT 0x21 62*4882a593Smuzhiyun #define DA9063_REG_BPRO_CONT 0x22 63*4882a593Smuzhiyun #define DA9063_REG_BMEM_CONT 0x23 64*4882a593Smuzhiyun #define DA9063_REG_BIO_CONT 0x24 65*4882a593Smuzhiyun #define DA9063_REG_BPERI_CONT 0x25 66*4882a593Smuzhiyun #define DA9063_REG_LDO1_CONT 0x26 67*4882a593Smuzhiyun #define DA9063_REG_LDO2_CONT 0x27 68*4882a593Smuzhiyun #define DA9063_REG_LDO3_CONT 0x28 69*4882a593Smuzhiyun #define DA9063_REG_LDO4_CONT 0x29 70*4882a593Smuzhiyun #define DA9063_REG_LDO5_CONT 0x2A 71*4882a593Smuzhiyun #define DA9063_REG_LDO6_CONT 0x2B 72*4882a593Smuzhiyun #define DA9063_REG_LDO7_CONT 0x2C 73*4882a593Smuzhiyun #define DA9063_REG_LDO8_CONT 0x2D 74*4882a593Smuzhiyun #define DA9063_REG_LDO9_CONT 0x2E 75*4882a593Smuzhiyun #define DA9063_REG_LDO10_CONT 0x2F 76*4882a593Smuzhiyun #define DA9063_REG_LDO11_CONT 0x30 77*4882a593Smuzhiyun #define DA9063_REG_SUPPLIES 0x31 78*4882a593Smuzhiyun #define DA9063_REG_DVC_1 0x32 79*4882a593Smuzhiyun #define DA9063_REG_DVC_2 0x33 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* GP-ADC Control Registers */ 82*4882a593Smuzhiyun #define DA9063_REG_ADC_MAN 0x34 83*4882a593Smuzhiyun #define DA9063_REG_ADC_CONT 0x35 84*4882a593Smuzhiyun #define DA9063_REG_VSYS_MON 0x36 85*4882a593Smuzhiyun #define DA9063_REG_ADC_RES_L 0x37 86*4882a593Smuzhiyun #define DA9063_REG_ADC_RES_H 0x38 87*4882a593Smuzhiyun #define DA9063_REG_VSYS_RES 0x39 88*4882a593Smuzhiyun #define DA9063_REG_ADCIN1_RES 0x3A 89*4882a593Smuzhiyun #define DA9063_REG_ADCIN2_RES 0x3B 90*4882a593Smuzhiyun #define DA9063_REG_ADCIN3_RES 0x3C 91*4882a593Smuzhiyun #define DA9063_REG_MON_A8_RES 0x3D 92*4882a593Smuzhiyun #define DA9063_REG_MON_A9_RES 0x3E 93*4882a593Smuzhiyun #define DA9063_REG_MON_A10_RES 0x3F 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* RTC Calendar and Alarm Registers */ 96*4882a593Smuzhiyun #define DA9063_REG_COUNT_S 0x40 97*4882a593Smuzhiyun #define DA9063_REG_COUNT_MI 0x41 98*4882a593Smuzhiyun #define DA9063_REG_COUNT_H 0x42 99*4882a593Smuzhiyun #define DA9063_REG_COUNT_D 0x43 100*4882a593Smuzhiyun #define DA9063_REG_COUNT_MO 0x44 101*4882a593Smuzhiyun #define DA9063_REG_COUNT_Y 0x45 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define DA9063_AD_REG_ALARM_MI 0x46 104*4882a593Smuzhiyun #define DA9063_AD_REG_ALARM_H 0x47 105*4882a593Smuzhiyun #define DA9063_AD_REG_ALARM_D 0x48 106*4882a593Smuzhiyun #define DA9063_AD_REG_ALARM_MO 0x49 107*4882a593Smuzhiyun #define DA9063_AD_REG_ALARM_Y 0x4A 108*4882a593Smuzhiyun #define DA9063_AD_REG_SECOND_A 0x4B 109*4882a593Smuzhiyun #define DA9063_AD_REG_SECOND_B 0x4C 110*4882a593Smuzhiyun #define DA9063_AD_REG_SECOND_C 0x4D 111*4882a593Smuzhiyun #define DA9063_AD_REG_SECOND_D 0x4E 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_S 0x46 114*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_MI 0x47 115*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_H 0x48 116*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_D 0x49 117*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_MO 0x4A 118*4882a593Smuzhiyun #define DA9063_BB_REG_ALARM_Y 0x4B 119*4882a593Smuzhiyun #define DA9063_BB_REG_SECOND_A 0x4C 120*4882a593Smuzhiyun #define DA9063_BB_REG_SECOND_B 0x4D 121*4882a593Smuzhiyun #define DA9063_BB_REG_SECOND_C 0x4E 122*4882a593Smuzhiyun #define DA9063_BB_REG_SECOND_D 0x4F 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun /* Sequencer Control Registers */ 125*4882a593Smuzhiyun #define DA9063_REG_SEQ 0x81 126*4882a593Smuzhiyun #define DA9063_REG_SEQ_TIMER 0x82 127*4882a593Smuzhiyun #define DA9063_REG_ID_2_1 0x83 128*4882a593Smuzhiyun #define DA9063_REG_ID_4_3 0x84 129*4882a593Smuzhiyun #define DA9063_REG_ID_6_5 0x85 130*4882a593Smuzhiyun #define DA9063_REG_ID_8_7 0x86 131*4882a593Smuzhiyun #define DA9063_REG_ID_10_9 0x87 132*4882a593Smuzhiyun #define DA9063_REG_ID_12_11 0x88 133*4882a593Smuzhiyun #define DA9063_REG_ID_14_13 0x89 134*4882a593Smuzhiyun #define DA9063_REG_ID_16_15 0x8A 135*4882a593Smuzhiyun #define DA9063_REG_ID_18_17 0x8B 136*4882a593Smuzhiyun #define DA9063_REG_ID_20_19 0x8C 137*4882a593Smuzhiyun #define DA9063_REG_ID_22_21 0x8D 138*4882a593Smuzhiyun #define DA9063_REG_ID_24_23 0x8E 139*4882a593Smuzhiyun #define DA9063_REG_ID_26_25 0x8F 140*4882a593Smuzhiyun #define DA9063_REG_ID_28_27 0x90 141*4882a593Smuzhiyun #define DA9063_REG_ID_30_29 0x91 142*4882a593Smuzhiyun #define DA9063_REG_ID_32_31 0x92 143*4882a593Smuzhiyun #define DA9063_REG_SEQ_A 0x95 144*4882a593Smuzhiyun #define DA9063_REG_SEQ_B 0x96 145*4882a593Smuzhiyun #define DA9063_REG_WAIT 0x97 146*4882a593Smuzhiyun #define DA9063_REG_EN_32K 0x98 147*4882a593Smuzhiyun #define DA9063_REG_RESET 0x99 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /* Regulator Setting Registers */ 150*4882a593Smuzhiyun #define DA9063_REG_BUCK_ILIM_A 0x9A 151*4882a593Smuzhiyun #define DA9063_REG_BUCK_ILIM_B 0x9B 152*4882a593Smuzhiyun #define DA9063_REG_BUCK_ILIM_C 0x9C 153*4882a593Smuzhiyun #define DA9063_REG_BCORE2_CFG 0x9D 154*4882a593Smuzhiyun #define DA9063_REG_BCORE1_CFG 0x9E 155*4882a593Smuzhiyun #define DA9063_REG_BPRO_CFG 0x9F 156*4882a593Smuzhiyun #define DA9063_REG_BIO_CFG 0xA0 157*4882a593Smuzhiyun #define DA9063_REG_BMEM_CFG 0xA1 158*4882a593Smuzhiyun #define DA9063_REG_BPERI_CFG 0xA2 159*4882a593Smuzhiyun #define DA9063_REG_VBCORE2_A 0xA3 160*4882a593Smuzhiyun #define DA9063_REG_VBCORE1_A 0xA4 161*4882a593Smuzhiyun #define DA9063_REG_VBPRO_A 0xA5 162*4882a593Smuzhiyun #define DA9063_REG_VBMEM_A 0xA6 163*4882a593Smuzhiyun #define DA9063_REG_VBIO_A 0xA7 164*4882a593Smuzhiyun #define DA9063_REG_VBPERI_A 0xA8 165*4882a593Smuzhiyun #define DA9063_REG_VLDO1_A 0xA9 166*4882a593Smuzhiyun #define DA9063_REG_VLDO2_A 0xAA 167*4882a593Smuzhiyun #define DA9063_REG_VLDO3_A 0xAB 168*4882a593Smuzhiyun #define DA9063_REG_VLDO4_A 0xAC 169*4882a593Smuzhiyun #define DA9063_REG_VLDO5_A 0xAD 170*4882a593Smuzhiyun #define DA9063_REG_VLDO6_A 0xAE 171*4882a593Smuzhiyun #define DA9063_REG_VLDO7_A 0xAF 172*4882a593Smuzhiyun #define DA9063_REG_VLDO8_A 0xB0 173*4882a593Smuzhiyun #define DA9063_REG_VLDO9_A 0xB1 174*4882a593Smuzhiyun #define DA9063_REG_VLDO10_A 0xB2 175*4882a593Smuzhiyun #define DA9063_REG_VLDO11_A 0xB3 176*4882a593Smuzhiyun #define DA9063_REG_VBCORE2_B 0xB4 177*4882a593Smuzhiyun #define DA9063_REG_VBCORE1_B 0xB5 178*4882a593Smuzhiyun #define DA9063_REG_VBPRO_B 0xB6 179*4882a593Smuzhiyun #define DA9063_REG_VBMEM_B 0xB7 180*4882a593Smuzhiyun #define DA9063_REG_VBIO_B 0xB8 181*4882a593Smuzhiyun #define DA9063_REG_VBPERI_B 0xB9 182*4882a593Smuzhiyun #define DA9063_REG_VLDO1_B 0xBA 183*4882a593Smuzhiyun #define DA9063_REG_VLDO2_B 0xBB 184*4882a593Smuzhiyun #define DA9063_REG_VLDO3_B 0xBC 185*4882a593Smuzhiyun #define DA9063_REG_VLDO4_B 0xBD 186*4882a593Smuzhiyun #define DA9063_REG_VLDO5_B 0xBE 187*4882a593Smuzhiyun #define DA9063_REG_VLDO6_B 0xBF 188*4882a593Smuzhiyun #define DA9063_REG_VLDO7_B 0xC0 189*4882a593Smuzhiyun #define DA9063_REG_VLDO8_B 0xC1 190*4882a593Smuzhiyun #define DA9063_REG_VLDO9_B 0xC2 191*4882a593Smuzhiyun #define DA9063_REG_VLDO10_B 0xC3 192*4882a593Smuzhiyun #define DA9063_REG_VLDO11_B 0xC4 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun /* Backup Battery Charger Control Register */ 195*4882a593Smuzhiyun #define DA9063_REG_BBAT_CONT 0xC5 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun /* GPIO PWM (LED) */ 198*4882a593Smuzhiyun #define DA9063_REG_GPO11_LED 0xC6 199*4882a593Smuzhiyun #define DA9063_REG_GPO14_LED 0xC7 200*4882a593Smuzhiyun #define DA9063_REG_GPO15_LED 0xC8 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* GP-ADC Threshold Registers */ 203*4882a593Smuzhiyun #define DA9063_REG_ADC_CFG 0xC9 204*4882a593Smuzhiyun #define DA9063_REG_AUTO1_HIGH 0xCA 205*4882a593Smuzhiyun #define DA9063_REG_AUTO1_LOW 0xCB 206*4882a593Smuzhiyun #define DA9063_REG_AUTO2_HIGH 0xCC 207*4882a593Smuzhiyun #define DA9063_REG_AUTO2_LOW 0xCD 208*4882a593Smuzhiyun #define DA9063_REG_AUTO3_HIGH 0xCE 209*4882a593Smuzhiyun #define DA9063_REG_AUTO3_LOW 0xCF 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* DA9063 Configuration registers */ 212*4882a593Smuzhiyun /* OTP */ 213*4882a593Smuzhiyun #define DA9063_REG_OTP_CONT 0x101 214*4882a593Smuzhiyun #define DA9063_REG_OTP_ADDR 0x102 215*4882a593Smuzhiyun #define DA9063_REG_OTP_DATA 0x103 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun /* Customer Trim and Configuration */ 218*4882a593Smuzhiyun #define DA9063_REG_T_OFFSET 0x104 219*4882a593Smuzhiyun #define DA9063_REG_INTERFACE 0x105 220*4882a593Smuzhiyun #define DA9063_REG_CONFIG_A 0x106 221*4882a593Smuzhiyun #define DA9063_REG_CONFIG_B 0x107 222*4882a593Smuzhiyun #define DA9063_REG_CONFIG_C 0x108 223*4882a593Smuzhiyun #define DA9063_REG_CONFIG_D 0x109 224*4882a593Smuzhiyun #define DA9063_REG_CONFIG_E 0x10A 225*4882a593Smuzhiyun #define DA9063_REG_CONFIG_F 0x10B 226*4882a593Smuzhiyun #define DA9063_REG_CONFIG_G 0x10C 227*4882a593Smuzhiyun #define DA9063_REG_CONFIG_H 0x10D 228*4882a593Smuzhiyun #define DA9063_REG_CONFIG_I 0x10E 229*4882a593Smuzhiyun #define DA9063_REG_CONFIG_J 0x10F 230*4882a593Smuzhiyun #define DA9063_REG_CONFIG_K 0x110 231*4882a593Smuzhiyun #define DA9063_REG_CONFIG_L 0x111 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_1 0x112 234*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_2 0x113 235*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_3 0x114 236*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_4 0x115 237*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_5 0x116 238*4882a593Smuzhiyun #define DA9063_AD_REG_MON_REG_6 0x117 239*4882a593Smuzhiyun #define DA9063_AD_REG_TRIM_CLDR 0x118 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_0 0x119 242*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_1 0x11A 243*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_2 0x11B 244*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_3 0x11C 245*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_4 0x11D 246*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_5 0x11E 247*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_6 0x11F 248*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_7 0x120 249*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_8 0x121 250*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_9 0x122 251*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_10 0x123 252*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_11 0x124 253*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_12 0x125 254*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_13 0x126 255*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_14 0x127 256*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_15 0x128 257*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_16 0x129 258*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_17 0x12A 259*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_18 0x12B 260*4882a593Smuzhiyun #define DA9063_AD_REG_GP_ID_19 0x12C 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun #define DA9063_BB_REG_CONFIG_M 0x112 263*4882a593Smuzhiyun #define DA9063_BB_REG_CONFIG_N 0x113 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_1 0x114 266*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_2 0x115 267*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_3 0x116 268*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_4 0x117 269*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_5 0x11E 270*4882a593Smuzhiyun #define DA9063_BB_REG_MON_REG_6 0x11F 271*4882a593Smuzhiyun #define DA9063_BB_REG_TRIM_CLDR 0x120 272*4882a593Smuzhiyun /* General Purpose Registers */ 273*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_0 0x121 274*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_1 0x122 275*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_2 0x123 276*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_3 0x124 277*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_4 0x125 278*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_5 0x126 279*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_6 0x127 280*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_7 0x128 281*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_8 0x129 282*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_9 0x12A 283*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_10 0x12B 284*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_11 0x12C 285*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_12 0x12D 286*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_13 0x12E 287*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_14 0x12F 288*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_15 0x130 289*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_16 0x131 290*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_17 0x132 291*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_18 0x133 292*4882a593Smuzhiyun #define DA9063_BB_REG_GP_ID_19 0x134 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun /* Chip ID and variant */ 295*4882a593Smuzhiyun #define DA9063_REG_DEVICE_ID 0x181 296*4882a593Smuzhiyun #define DA9063_REG_VARIANT_ID 0x182 297*4882a593Smuzhiyun #define DA9063_REG_CUSTOMER_ID 0x183 298*4882a593Smuzhiyun #define DA9063_REG_CONFIG_ID 0x184 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun /* 301*4882a593Smuzhiyun * PMIC registers bits 302*4882a593Smuzhiyun */ 303*4882a593Smuzhiyun /* DA9063_REG_PAGE_CON (addr=0x00) */ 304*4882a593Smuzhiyun #define DA9063_PEG_PAGE_SHIFT 0 305*4882a593Smuzhiyun #define DA9063_REG_PAGE_MASK 0x07 306*4882a593Smuzhiyun #define DA9063_REG_PAGE0 0x00 307*4882a593Smuzhiyun #define DA9063_REG_PAGE2 0x02 308*4882a593Smuzhiyun #define DA9063_PAGE_WRITE_MODE 0x00 309*4882a593Smuzhiyun #define DA9063_REPEAT_WRITE_MODE 0x40 310*4882a593Smuzhiyun #define DA9063_PAGE_REVERT 0x80 311*4882a593Smuzhiyun 312*4882a593Smuzhiyun /* DA9063_REG_STATUS_A (addr=0x01) */ 313*4882a593Smuzhiyun #define DA9063_NONKEY 0x01 314*4882a593Smuzhiyun #define DA9063_WAKE 0x02 315*4882a593Smuzhiyun #define DA9063_DVC_BUSY 0x04 316*4882a593Smuzhiyun #define DA9063_COMP_1V2 0x08 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun /* DA9063_REG_STATUS_B (addr=0x02) */ 319*4882a593Smuzhiyun #define DA9063_GPI0 0x01 320*4882a593Smuzhiyun #define DA9063_GPI1 0x02 321*4882a593Smuzhiyun #define DA9063_GPI2 0x04 322*4882a593Smuzhiyun #define DA9063_GPI3 0x08 323*4882a593Smuzhiyun #define DA9063_GPI4 0x10 324*4882a593Smuzhiyun #define DA9063_GPI5 0x20 325*4882a593Smuzhiyun #define DA9063_GPI6 0x40 326*4882a593Smuzhiyun #define DA9063_GPI7 0x80 327*4882a593Smuzhiyun 328*4882a593Smuzhiyun /* DA9063_REG_STATUS_C (addr=0x03) */ 329*4882a593Smuzhiyun #define DA9063_GPI8 0x01 330*4882a593Smuzhiyun #define DA9063_GPI9 0x02 331*4882a593Smuzhiyun #define DA9063_GPI10 0x04 332*4882a593Smuzhiyun #define DA9063_GPI11 0x08 333*4882a593Smuzhiyun #define DA9063_GPI12 0x10 334*4882a593Smuzhiyun #define DA9063_GPI13 0x20 335*4882a593Smuzhiyun #define DA9063_GPI14 0x40 336*4882a593Smuzhiyun #define DA9063_GPI15 0x80 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun /* DA9063_REG_STATUS_D (addr=0x04) */ 339*4882a593Smuzhiyun #define DA9063_LDO3_LIM 0x08 340*4882a593Smuzhiyun #define DA9063_LDO4_LIM 0x10 341*4882a593Smuzhiyun #define DA9063_LDO7_LIM 0x20 342*4882a593Smuzhiyun #define DA9063_LDO8_LIM 0x40 343*4882a593Smuzhiyun #define DA9063_LDO11_LIM 0x80 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun /* DA9063_REG_FAULT_LOG (addr=0x05) */ 346*4882a593Smuzhiyun #define DA9063_TWD_ERROR 0x01 347*4882a593Smuzhiyun #define DA9063_POR 0x02 348*4882a593Smuzhiyun #define DA9063_VDD_FAULT 0x04 349*4882a593Smuzhiyun #define DA9063_VDD_START 0x08 350*4882a593Smuzhiyun #define DA9063_TEMP_CRIT 0x10 351*4882a593Smuzhiyun #define DA9063_KEY_RESET 0x20 352*4882a593Smuzhiyun #define DA9063_NSHUTDOWN 0x40 353*4882a593Smuzhiyun #define DA9063_WAIT_SHUT 0x80 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun /* DA9063_REG_EVENT_A (addr=0x06) */ 356*4882a593Smuzhiyun #define DA9063_E_NONKEY 0x01 357*4882a593Smuzhiyun #define DA9063_E_ALARM 0x02 358*4882a593Smuzhiyun #define DA9063_E_TICK 0x04 359*4882a593Smuzhiyun #define DA9063_E_ADC_RDY 0x08 360*4882a593Smuzhiyun #define DA9063_E_SEQ_RDY 0x10 361*4882a593Smuzhiyun #define DA9063_EVENTS_B 0x20 362*4882a593Smuzhiyun #define DA9063_EVENTS_C 0x40 363*4882a593Smuzhiyun #define DA9063_EVENTS_D 0x80 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun /* DA9063_REG_EVENT_B (addr=0x07) */ 366*4882a593Smuzhiyun #define DA9063_E_WAKE 0x01 367*4882a593Smuzhiyun #define DA9063_E_TEMP 0x02 368*4882a593Smuzhiyun #define DA9063_E_COMP_1V2 0x04 369*4882a593Smuzhiyun #define DA9063_E_LDO_LIM 0x08 370*4882a593Smuzhiyun #define DA9063_E_REG_UVOV 0x10 371*4882a593Smuzhiyun #define DA9063_E_DVC_RDY 0x20 372*4882a593Smuzhiyun #define DA9063_E_VDD_MON 0x40 373*4882a593Smuzhiyun #define DA9063_E_VDD_WARN 0x80 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun /* DA9063_REG_EVENT_C (addr=0x08) */ 376*4882a593Smuzhiyun #define DA9063_E_GPI0 0x01 377*4882a593Smuzhiyun #define DA9063_E_GPI1 0x02 378*4882a593Smuzhiyun #define DA9063_E_GPI2 0x04 379*4882a593Smuzhiyun #define DA9063_E_GPI3 0x08 380*4882a593Smuzhiyun #define DA9063_E_GPI4 0x10 381*4882a593Smuzhiyun #define DA9063_E_GPI5 0x20 382*4882a593Smuzhiyun #define DA9063_E_GPI6 0x40 383*4882a593Smuzhiyun #define DA9063_E_GPI7 0x80 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* DA9063_REG_EVENT_D (addr=0x09) */ 386*4882a593Smuzhiyun #define DA9063_E_GPI8 0x01 387*4882a593Smuzhiyun #define DA9063_E_GPI9 0x02 388*4882a593Smuzhiyun #define DA9063_E_GPI10 0x04 389*4882a593Smuzhiyun #define DA9063_E_GPI11 0x08 390*4882a593Smuzhiyun #define DA9063_E_GPI12 0x10 391*4882a593Smuzhiyun #define DA9063_E_GPI13 0x20 392*4882a593Smuzhiyun #define DA9063_E_GPI14 0x40 393*4882a593Smuzhiyun #define DA9063_E_GPI15 0x80 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun /* DA9063_REG_IRQ_MASK_A (addr=0x0A) */ 396*4882a593Smuzhiyun #define DA9063_M_ONKEY 0x01 397*4882a593Smuzhiyun #define DA9063_M_ALARM 0x02 398*4882a593Smuzhiyun #define DA9063_M_TICK 0x04 399*4882a593Smuzhiyun #define DA9063_M_ADC_RDY 0x08 400*4882a593Smuzhiyun #define DA9063_M_SEQ_RDY 0x10 401*4882a593Smuzhiyun 402*4882a593Smuzhiyun /* DA9063_REG_IRQ_MASK_B (addr=0x0B) */ 403*4882a593Smuzhiyun #define DA9063_M_WAKE 0x01 404*4882a593Smuzhiyun #define DA9063_M_TEMP 0x02 405*4882a593Smuzhiyun #define DA9063_M_COMP_1V2 0x04 406*4882a593Smuzhiyun #define DA9063_M_LDO_LIM 0x08 407*4882a593Smuzhiyun #define DA9063_M_UVOV 0x10 408*4882a593Smuzhiyun #define DA9063_M_DVC_RDY 0x20 409*4882a593Smuzhiyun #define DA9063_M_VDD_MON 0x40 410*4882a593Smuzhiyun #define DA9063_M_VDD_WARN 0x80 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun /* DA9063_REG_IRQ_MASK_C (addr=0x0C) */ 413*4882a593Smuzhiyun #define DA9063_M_GPI0 0x01 414*4882a593Smuzhiyun #define DA9063_M_GPI1 0x02 415*4882a593Smuzhiyun #define DA9063_M_GPI2 0x04 416*4882a593Smuzhiyun #define DA9063_M_GPI3 0x08 417*4882a593Smuzhiyun #define DA9063_M_GPI4 0x10 418*4882a593Smuzhiyun #define DA9063_M_GPI5 0x20 419*4882a593Smuzhiyun #define DA9063_M_GPI6 0x40 420*4882a593Smuzhiyun #define DA9063_M_GPI7 0x80 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun /* DA9063_REG_IRQ_MASK_D (addr=0x0D) */ 423*4882a593Smuzhiyun #define DA9063_M_GPI8 0x01 424*4882a593Smuzhiyun #define DA9063_M_GPI9 0x02 425*4882a593Smuzhiyun #define DA9063_M_GPI10 0x04 426*4882a593Smuzhiyun #define DA9063_M_GPI11 0x08 427*4882a593Smuzhiyun #define DA9063_M_GPI12 0x10 428*4882a593Smuzhiyun #define DA9063_M_GPI13 0x20 429*4882a593Smuzhiyun #define DA9063_M_GPI14 0x40 430*4882a593Smuzhiyun #define DA9063_M_GPI15 0x80 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun /* DA9063_REG_CONTROL_A (addr=0x0E) */ 433*4882a593Smuzhiyun #define DA9063_SYSTEM_EN 0x01 434*4882a593Smuzhiyun #define DA9063_POWER_EN 0x02 435*4882a593Smuzhiyun #define DA9063_POWER1_EN 0x04 436*4882a593Smuzhiyun #define DA9063_STANDBY 0x08 437*4882a593Smuzhiyun #define DA9063_M_SYSTEM_EN 0x10 438*4882a593Smuzhiyun #define DA9063_M_POWER_EN 0x20 439*4882a593Smuzhiyun #define DA9063_M_POWER1_EN 0x40 440*4882a593Smuzhiyun #define DA9063_CP_EN 0x80 441*4882a593Smuzhiyun 442*4882a593Smuzhiyun /* DA9063_REG_CONTROL_B (addr=0x0F) */ 443*4882a593Smuzhiyun #define DA9063_CHG_SEL 0x01 444*4882a593Smuzhiyun #define DA9063_WATCHDOG_PD 0x02 445*4882a593Smuzhiyun #define DA9063_BB_RESET_BLINKING 0x04 446*4882a593Smuzhiyun #define DA9063_NRES_MODE 0x08 447*4882a593Smuzhiyun #define DA9063_NONKEY_LOCK 0x10 448*4882a593Smuzhiyun #define DA9063_BB_BUCK_SLOWSTART 0x80 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun /* DA9063_REG_CONTROL_C (addr=0x10) */ 451*4882a593Smuzhiyun #define DA9063_DEBOUNCING_MASK 0x07 452*4882a593Smuzhiyun #define DA9063_DEBOUNCING_OFF 0x0 453*4882a593Smuzhiyun #define DA9063_DEBOUNCING_0MS1 0x1 454*4882a593Smuzhiyun #define DA9063_DEBOUNCING_1MS 0x2 455*4882a593Smuzhiyun #define DA9063_DEBOUNCING_10MS24 0x3 456*4882a593Smuzhiyun #define DA9063_DEBOUNCING_51MS2 0x4 457*4882a593Smuzhiyun #define DA9063_DEBOUNCING_256MS 0x5 458*4882a593Smuzhiyun #define DA9063_DEBOUNCING_512MS 0x6 459*4882a593Smuzhiyun #define DA9063_DEBOUNCING_1024MS 0x7 460*4882a593Smuzhiyun 461*4882a593Smuzhiyun #define DA9063_AUTO_BOOT 0x08 462*4882a593Smuzhiyun #define DA9063_OTPREAD_EN 0x10 463*4882a593Smuzhiyun #define DA9063_SLEW_RATE_MASK 0x60 464*4882a593Smuzhiyun #define DA9063_SLEW_RATE_4US 0x00 465*4882a593Smuzhiyun #define DA9063_SLEW_RATE_3US 0x20 466*4882a593Smuzhiyun #define DA9063_SLEW_RATE_1US 0x40 467*4882a593Smuzhiyun #define DA9063_SLEW_RATE_0US5 0x60 468*4882a593Smuzhiyun #define DA9063_DEF_SUPPLY 0x80 469*4882a593Smuzhiyun 470*4882a593Smuzhiyun /* DA9063_REG_CONTROL_D (addr=0x11) */ 471*4882a593Smuzhiyun #define DA9063_TWDSCALE_MASK 0x07 472*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_MASK 0x38 473*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_OFF 0x00 474*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_1S0 0x08 475*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_2S0 0x10 476*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_4S0 0x18 477*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_0S18 0x20 478*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_2S0_VDD 0x28 479*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_4S0_VDD 0x30 480*4882a593Smuzhiyun #define DA9063_BLINK_FRQ_0S18_VDD 0x38 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun #define DA9063_BLINK_DUR_MASK 0xC0 483*4882a593Smuzhiyun #define DA9063_BLINK_DUR_10MS 0x00 484*4882a593Smuzhiyun #define DA9063_BLINK_DUR_20MS 0x40 485*4882a593Smuzhiyun #define DA9063_BLINK_DUR_40MS 0x80 486*4882a593Smuzhiyun #define DA9063_BLINK_DUR_20MSDBL 0xC0 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun /* DA9063_REG_CONTROL_E (addr=0x12) */ 489*4882a593Smuzhiyun #define DA9063_RTC_MODE_PD 0x01 490*4882a593Smuzhiyun #define DA9063_RTC_MODE_SD 0x02 491*4882a593Smuzhiyun #define DA9063_RTC_EN 0x04 492*4882a593Smuzhiyun #define DA9063_ECO_MODE 0x08 493*4882a593Smuzhiyun #define DA9063_PM_FB1_PIN 0x10 494*4882a593Smuzhiyun #define DA9063_PM_FB2_PIN 0x20 495*4882a593Smuzhiyun #define DA9063_PM_FB3_PIN 0x40 496*4882a593Smuzhiyun #define DA9063_V_LOCK 0x80 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun /* DA9063_REG_CONTROL_F (addr=0x13) */ 499*4882a593Smuzhiyun #define DA9063_WATCHDOG 0x01 500*4882a593Smuzhiyun #define DA9063_SHUTDOWN 0x02 501*4882a593Smuzhiyun #define DA9063_WAKE_UP 0x04 502*4882a593Smuzhiyun 503*4882a593Smuzhiyun /* DA9063_REG_PD_DIS (addr=0x14) */ 504*4882a593Smuzhiyun #define DA9063_GPI_DIS 0x01 505*4882a593Smuzhiyun #define DA9063_GPADC_PAUSE 0x02 506*4882a593Smuzhiyun #define DA9063_PMIF_DIS 0x04 507*4882a593Smuzhiyun #define DA9063_HS2WIRE_DIS 0x08 508*4882a593Smuzhiyun #define DA9063_BB_CLDR_PAUSE 0x10 509*4882a593Smuzhiyun #define DA9063_BBAT_DIS 0x20 510*4882a593Smuzhiyun #define DA9063_OUT_32K_PAUSE 0x40 511*4882a593Smuzhiyun #define DA9063_PMCONT_DIS 0x80 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun /* DA9063_REG_GPIO_0_1 (addr=0x15) */ 514*4882a593Smuzhiyun #define DA9063_GPIO0_PIN_MASK 0x03 515*4882a593Smuzhiyun #define DA9063_GPIO0_PIN_ADCIN1 0x00 516*4882a593Smuzhiyun #define DA9063_GPIO0_PIN_GPI 0x01 517*4882a593Smuzhiyun #define DA9063_GPIO0_PIN_GPO_OD 0x02 518*4882a593Smuzhiyun #define DA9063_GPIO0_PIN_GPO 0x03 519*4882a593Smuzhiyun #define DA9063_GPIO0_TYPE 0x04 520*4882a593Smuzhiyun #define DA9063_GPIO0_TYPE_GPI_ACT_LOW 0x00 521*4882a593Smuzhiyun #define DA9063_GPIO0_TYPE_GPO_VDD_IO1 0x00 522*4882a593Smuzhiyun #define DA9063_GPIO0_TYPE_GPI_ACT_HIGH 0x04 523*4882a593Smuzhiyun #define DA9063_GPIO0_TYPE_GPO_VDD_IO2 0x04 524*4882a593Smuzhiyun #define DA9063_GPIO0_NO_WAKEUP 0x08 525*4882a593Smuzhiyun #define DA9063_GPIO1_PIN_MASK 0x30 526*4882a593Smuzhiyun #define DA9063_GPIO1_PIN_ADCIN2_COMP 0x00 527*4882a593Smuzhiyun #define DA9063_GPIO1_PIN_GPI 0x10 528*4882a593Smuzhiyun #define DA9063_GPIO1_PIN_GPO_OD 0x20 529*4882a593Smuzhiyun #define DA9063_GPIO1_PIN_GPO 0x30 530*4882a593Smuzhiyun #define DA9063_GPIO1_TYPE 0x40 531*4882a593Smuzhiyun #define DA9063_GPIO1_TYPE_GPI_ACT_LOW 0x00 532*4882a593Smuzhiyun #define DA9063_GPIO1_TYPE_GPO_VDD_IO1 0x00 533*4882a593Smuzhiyun #define DA9063_GPIO1_TYPE_GPI_ACT_HIGH 0x04 534*4882a593Smuzhiyun #define DA9063_GPIO1_TYPE_GPO_VDD_IO2 0x04 535*4882a593Smuzhiyun #define DA9063_GPIO1_NO_WAKEUP 0x80 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun /* DA9063_REG_GPIO_2_3 (addr=0x16) */ 538*4882a593Smuzhiyun #define DA9063_GPIO2_PIN_MASK 0x03 539*4882a593Smuzhiyun #define DA9063_GPIO2_PIN_ADCIN3 0x00 540*4882a593Smuzhiyun #define DA9063_GPIO2_PIN_GPI 0x01 541*4882a593Smuzhiyun #define DA9063_GPIO2_PIN_GPO_PSS 0x02 542*4882a593Smuzhiyun #define DA9063_GPIO2_PIN_GPO 0x03 543*4882a593Smuzhiyun #define DA9063_GPIO2_TYPE 0x04 544*4882a593Smuzhiyun #define DA9063_GPIO2_TYPE_GPI_ACT_LOW 0x00 545*4882a593Smuzhiyun #define DA9063_GPIO2_TYPE_GPO_VDD_IO1 0x00 546*4882a593Smuzhiyun #define DA9063_GPIO2_TYPE_GPI_ACT_HIGH 0x04 547*4882a593Smuzhiyun #define DA9063_GPIO2_TYPE_GPO_VDD_IO2 0x04 548*4882a593Smuzhiyun #define DA9063_GPIO2_NO_WAKEUP 0x08 549*4882a593Smuzhiyun #define DA9063_GPIO3_PIN_MASK 0x30 550*4882a593Smuzhiyun #define DA9063_GPIO3_PIN_CORE_SW_G 0x00 551*4882a593Smuzhiyun #define DA9063_GPIO3_PIN_GPI 0x10 552*4882a593Smuzhiyun #define DA9063_GPIO3_PIN_GPO_OD 0x20 553*4882a593Smuzhiyun #define DA9063_GPIO3_PIN_GPO 0x30 554*4882a593Smuzhiyun #define DA9063_GPIO3_TYPE 0x40 555*4882a593Smuzhiyun #define DA9063_GPIO3_TYPE_GPI_ACT_LOW 0x00 556*4882a593Smuzhiyun #define DA9063_GPIO3_TYPE_GPO_VDD_IO1 0x00 557*4882a593Smuzhiyun #define DA9063_GPIO3_TYPE_GPI_ACT_HIGH 0x04 558*4882a593Smuzhiyun #define DA9063_GPIO3_TYPE_GPO_VDD_IO2 0x04 559*4882a593Smuzhiyun #define DA9063_GPIO3_NO_WAKEUP 0x80 560*4882a593Smuzhiyun 561*4882a593Smuzhiyun /* DA9063_REG_GPIO_4_5 (addr=0x17) */ 562*4882a593Smuzhiyun #define DA9063_GPIO4_PIN_MASK 0x03 563*4882a593Smuzhiyun #define DA9063_GPIO4_PIN_CORE_SW_S 0x00 564*4882a593Smuzhiyun #define DA9063_GPIO4_PIN_GPI 0x01 565*4882a593Smuzhiyun #define DA9063_GPIO4_PIN_GPO_OD 0x02 566*4882a593Smuzhiyun #define DA9063_GPIO4_PIN_GPO 0x03 567*4882a593Smuzhiyun #define DA9063_GPIO4_TYPE 0x04 568*4882a593Smuzhiyun #define DA9063_GPIO4_TYPE_GPI_ACT_LOW 0x00 569*4882a593Smuzhiyun #define DA9063_GPIO4_TYPE_GPO_VDD_IO1 0x00 570*4882a593Smuzhiyun #define DA9063_GPIO4_TYPE_GPI_ACT_HIGH 0x04 571*4882a593Smuzhiyun #define DA9063_GPIO4_TYPE_GPO_VDD_IO2 0x04 572*4882a593Smuzhiyun #define DA9063_GPIO4_NO_WAKEUP 0x08 573*4882a593Smuzhiyun #define DA9063_GPIO5_PIN_MASK 0x30 574*4882a593Smuzhiyun #define DA9063_GPIO5_PIN_PERI_SW_G 0x00 575*4882a593Smuzhiyun #define DA9063_GPIO5_PIN_GPI 0x10 576*4882a593Smuzhiyun #define DA9063_GPIO5_PIN_GPO_OD 0x20 577*4882a593Smuzhiyun #define DA9063_GPIO5_PIN_GPO 0x30 578*4882a593Smuzhiyun #define DA9063_GPIO5_TYPE 0x40 579*4882a593Smuzhiyun #define DA9063_GPIO5_TYPE_GPI_ACT_LOW 0x00 580*4882a593Smuzhiyun #define DA9063_GPIO5_TYPE_GPO_VDD_IO1 0x00 581*4882a593Smuzhiyun #define DA9063_GPIO5_TYPE_GPI_ACT_HIGH 0x04 582*4882a593Smuzhiyun #define DA9063_GPIO5_TYPE_GPO_VDD_IO2 0x04 583*4882a593Smuzhiyun #define DA9063_GPIO5_NO_WAKEUP 0x80 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun /* DA9063_REG_GPIO_6_7 (addr=0x18) */ 586*4882a593Smuzhiyun #define DA9063_GPIO6_PIN_MASK 0x03 587*4882a593Smuzhiyun #define DA9063_GPIO6_PIN_PERI_SW_S 0x00 588*4882a593Smuzhiyun #define DA9063_GPIO6_PIN_GPI 0x01 589*4882a593Smuzhiyun #define DA9063_GPIO6_PIN_GPO_OD 0x02 590*4882a593Smuzhiyun #define DA9063_GPIO6_PIN_GPO 0x03 591*4882a593Smuzhiyun #define DA9063_GPIO6_TYPE 0x04 592*4882a593Smuzhiyun #define DA9063_GPIO6_TYPE_GPI_ACT_LOW 0x00 593*4882a593Smuzhiyun #define DA9063_GPIO6_TYPE_GPO_VDD_IO1 0x00 594*4882a593Smuzhiyun #define DA9063_GPIO6_TYPE_GPI_ACT_HIGH 0x04 595*4882a593Smuzhiyun #define DA9063_GPIO6_TYPE_GPO_VDD_IO2 0x04 596*4882a593Smuzhiyun #define DA9063_GPIO6_NO_WAKEUP 0x08 597*4882a593Smuzhiyun #define DA9063_GPIO7_PIN_MASK 0x30 598*4882a593Smuzhiyun #define DA9063_GPIO7_PIN_GPI 0x10 599*4882a593Smuzhiyun #define DA9063_GPIO7_PIN_GPO_PSS 0x20 600*4882a593Smuzhiyun #define DA9063_GPIO7_PIN_GPO 0x30 601*4882a593Smuzhiyun #define DA9063_GPIO7_TYPE 0x40 602*4882a593Smuzhiyun #define DA9063_GPIO7_TYPE_GPI_ACT_LOW 0x00 603*4882a593Smuzhiyun #define DA9063_GPIO7_TYPE_GPO_VDD_IO1 0x00 604*4882a593Smuzhiyun #define DA9063_GPIO7_TYPE_GPI_ACT_HIGH 0x04 605*4882a593Smuzhiyun #define DA9063_GPIO7_TYPE_GPO_VDD_IO2 0x04 606*4882a593Smuzhiyun #define DA9063_GPIO7_NO_WAKEUP 0x80 607*4882a593Smuzhiyun 608*4882a593Smuzhiyun /* DA9063_REG_GPIO_8_9 (addr=0x19) */ 609*4882a593Smuzhiyun #define DA9063_GPIO8_PIN_MASK 0x03 610*4882a593Smuzhiyun #define DA9063_GPIO8_PIN_GPI_SYS_EN 0x00 611*4882a593Smuzhiyun #define DA9063_GPIO8_PIN_GPI 0x01 612*4882a593Smuzhiyun #define DA9063_GPIO8_PIN_GPO_PSS 0x02 613*4882a593Smuzhiyun #define DA9063_GPIO8_PIN_GPO 0x03 614*4882a593Smuzhiyun #define DA9063_GPIO8_TYPE 0x04 615*4882a593Smuzhiyun #define DA9063_GPIO8_TYPE_GPI_ACT_LOW 0x00 616*4882a593Smuzhiyun #define DA9063_GPIO8_TYPE_GPO_VDD_IO1 0x00 617*4882a593Smuzhiyun #define DA9063_GPIO8_TYPE_GPI_ACT_HIGH 0x04 618*4882a593Smuzhiyun #define DA9063_GPIO8_TYPE_GPO_VDD_IO2 0x04 619*4882a593Smuzhiyun #define DA9063_GPIO8_NO_WAKEUP 0x08 620*4882a593Smuzhiyun #define DA9063_GPIO9_PIN_MASK 0x30 621*4882a593Smuzhiyun #define DA9063_GPIO9_PIN_GPI_PWR_EN 0x00 622*4882a593Smuzhiyun #define DA9063_GPIO9_PIN_GPI 0x10 623*4882a593Smuzhiyun #define DA9063_GPIO9_PIN_GPO_PSS 0x20 624*4882a593Smuzhiyun #define DA9063_GPIO9_PIN_GPO 0x30 625*4882a593Smuzhiyun #define DA9063_GPIO9_TYPE 0x40 626*4882a593Smuzhiyun #define DA9063_GPIO9_TYPE_GPI_ACT_LOW 0x00 627*4882a593Smuzhiyun #define DA9063_GPIO9_TYPE_GPO_VDD_IO1 0x00 628*4882a593Smuzhiyun #define DA9063_GPIO9_TYPE_GPI_ACT_HIGH 0x04 629*4882a593Smuzhiyun #define DA9063_GPIO9_TYPE_GPO_VDD_IO2 0x04 630*4882a593Smuzhiyun #define DA9063_GPIO9_NO_WAKEUP 0x80 631*4882a593Smuzhiyun 632*4882a593Smuzhiyun /* DA9063_REG_GPIO_10_11 (addr=0x1A) */ 633*4882a593Smuzhiyun #define DA9063_GPIO10_PIN_MASK 0x03 634*4882a593Smuzhiyun #define DA9063_GPIO10_PIN_GPI_PWR1_EN 0x00 635*4882a593Smuzhiyun #define DA9063_GPIO10_PIN_GPI 0x01 636*4882a593Smuzhiyun #define DA9063_GPIO10_PIN_GPO_OD 0x02 637*4882a593Smuzhiyun #define DA9063_GPIO10_PIN_GPO 0x03 638*4882a593Smuzhiyun #define DA9063_GPIO10_TYPE 0x04 639*4882a593Smuzhiyun #define DA9063_GPIO10_TYPE_GPI_ACT_LOW 0x00 640*4882a593Smuzhiyun #define DA9063_GPIO10_TYPE_GPO_VDD_IO1 0x00 641*4882a593Smuzhiyun #define DA9063_GPIO10_TYPE_GPI_ACT_HIGH 0x04 642*4882a593Smuzhiyun #define DA9063_GPIO10_TYPE_GPO_VDD_IO2 0x04 643*4882a593Smuzhiyun #define DA9063_GPIO10_NO_WAKEUP 0x08 644*4882a593Smuzhiyun #define DA9063_GPIO11_PIN_MASK 0x30 645*4882a593Smuzhiyun #define DA9063_GPIO11_PIN_GPO_OD 0x00 646*4882a593Smuzhiyun #define DA9063_GPIO11_PIN_GPI 0x10 647*4882a593Smuzhiyun #define DA9063_GPIO11_PIN_GPO_PSS 0x20 648*4882a593Smuzhiyun #define DA9063_GPIO11_PIN_GPO 0x30 649*4882a593Smuzhiyun #define DA9063_GPIO11_TYPE 0x40 650*4882a593Smuzhiyun #define DA9063_GPIO11_TYPE_GPI_ACT_LOW 0x00 651*4882a593Smuzhiyun #define DA9063_GPIO11_TYPE_GPO_VDD_IO1 0x00 652*4882a593Smuzhiyun #define DA9063_GPIO11_TYPE_GPI_ACT_HIGH 0x04 653*4882a593Smuzhiyun #define DA9063_GPIO11_TYPE_GPO_VDD_IO2 0x04 654*4882a593Smuzhiyun #define DA9063_GPIO11_NO_WAKEUP 0x80 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun /* DA9063_REG_GPIO_12_13 (addr=0x1B) */ 657*4882a593Smuzhiyun #define DA9063_GPIO12_PIN_MASK 0x03 658*4882a593Smuzhiyun #define DA9063_GPIO12_PIN_NVDDFLT_OUT 0x00 659*4882a593Smuzhiyun #define DA9063_GPIO12_PIN_GPI 0x01 660*4882a593Smuzhiyun #define DA9063_GPIO12_PIN_VSYSMON_OUT 0x02 661*4882a593Smuzhiyun #define DA9063_GPIO12_PIN_GPO 0x03 662*4882a593Smuzhiyun #define DA9063_GPIO12_TYPE 0x04 663*4882a593Smuzhiyun #define DA9063_GPIO12_TYPE_GPI_ACT_LOW 0x00 664*4882a593Smuzhiyun #define DA9063_GPIO12_TYPE_GPO_VDD_IO1 0x00 665*4882a593Smuzhiyun #define DA9063_GPIO12_TYPE_GPI_ACT_HIGH 0x04 666*4882a593Smuzhiyun #define DA9063_GPIO12_TYPE_GPO_VDD_IO2 0x04 667*4882a593Smuzhiyun #define DA9063_GPIO12_NO_WAKEUP 0x08 668*4882a593Smuzhiyun #define DA9063_GPIO13_PIN_MASK 0x30 669*4882a593Smuzhiyun #define DA9063_GPIO13_PIN_GPFB1_OUT 0x00 670*4882a593Smuzhiyun #define DA9063_GPIO13_PIN_GPI 0x10 671*4882a593Smuzhiyun #define DA9063_GPIO13_PIN_GPFB1_OUTOD 0x20 672*4882a593Smuzhiyun #define DA9063_GPIO13_PIN_GPO 0x30 673*4882a593Smuzhiyun #define DA9063_GPIO13_TYPE 0x40 674*4882a593Smuzhiyun #define DA9063_GPIO13_TYPE_GPFB1_OUT 0x00 675*4882a593Smuzhiyun #define DA9063_GPIO13_TYPE_GPI 0x00 676*4882a593Smuzhiyun #define DA9063_GPIO13_TYPE_GPFB1_OUTOD 0x04 677*4882a593Smuzhiyun #define DA9063_GPIO13_TYPE_GPO 0x04 678*4882a593Smuzhiyun #define DA9063_GPIO13_NO_WAKEUP 0x80 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun /* DA9063_REG_GPIO_14_15 (addr=0x1C) */ 681*4882a593Smuzhiyun #define DA9063_GPIO14_PIN_MASK 0x03 682*4882a593Smuzhiyun #define DA9063_GPIO14_PIN_GPO_OD 0x00 683*4882a593Smuzhiyun #define DA9063_GPIO14_PIN_GPI 0x01 684*4882a593Smuzhiyun #define DA9063_GPIO14_PIN_HS2DATA 0x02 685*4882a593Smuzhiyun #define DA9063_GPIO14_PIN_GPO 0x03 686*4882a593Smuzhiyun #define DA9063_GPIO14_TYPE 0x04 687*4882a593Smuzhiyun #define DA9063_GPIO14_TYPE_GPI_ACT_LOW 0x00 688*4882a593Smuzhiyun #define DA9063_GPIO14_TYPE_GPO_VDD_IO1 0x00 689*4882a593Smuzhiyun #define DA9063_GPIO14_TYPE_GPI_ACT_HIGH 0x04 690*4882a593Smuzhiyun #define DA9063_GPIO14_TYPE_GPO_VDD_IO2 0x04 691*4882a593Smuzhiyun #define DA9063_GPIO14_NO_WAKEUP 0x08 692*4882a593Smuzhiyun #define DA9063_GPIO15_PIN_MASK 0x30 693*4882a593Smuzhiyun #define DA9063_GPIO15_PIN_GPO_OD 0x00 694*4882a593Smuzhiyun #define DA9063_GPIO15_PIN_GPI 0x10 695*4882a593Smuzhiyun #define DA9063_GPIO15_PIN_GPO 0x30 696*4882a593Smuzhiyun #define DA9063_GPIO15_TYPE 0x40 697*4882a593Smuzhiyun #define DA9063_GPIO15_TYPE_GPFB1_OUT 0x00 698*4882a593Smuzhiyun #define DA9063_GPIO15_TYPE_GPI 0x00 699*4882a593Smuzhiyun #define DA9063_GPIO15_TYPE_GPFB1_OUTOD 0x04 700*4882a593Smuzhiyun #define DA9063_GPIO15_TYPE_GPO 0x04 701*4882a593Smuzhiyun #define DA9063_GPIO15_NO_WAKEUP 0x80 702*4882a593Smuzhiyun 703*4882a593Smuzhiyun /* DA9063_REG_GPIO_MODE0_7 (addr=0x1D) */ 704*4882a593Smuzhiyun #define DA9063_GPIO0_MODE 0x01 705*4882a593Smuzhiyun #define DA9063_GPIO1_MODE 0x02 706*4882a593Smuzhiyun #define DA9063_GPIO2_MODE 0x04 707*4882a593Smuzhiyun #define DA9063_GPIO3_MODE 0x08 708*4882a593Smuzhiyun #define DA9063_GPIO4_MODE 0x10 709*4882a593Smuzhiyun #define DA9063_GPIO5_MODE 0x20 710*4882a593Smuzhiyun #define DA9063_GPIO6_MODE 0x40 711*4882a593Smuzhiyun #define DA9063_GPIO7_MODE 0x80 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun /* DA9063_REG_GPIO_MODE8_15 (addr=0x1E) */ 714*4882a593Smuzhiyun #define DA9063_GPIO8_MODE 0x01 715*4882a593Smuzhiyun #define DA9063_GPIO9_MODE 0x02 716*4882a593Smuzhiyun #define DA9063_GPIO10_MODE 0x04 717*4882a593Smuzhiyun #define DA9063_GPIO11_MODE 0x08 718*4882a593Smuzhiyun #define DA9063_GPIO11_MODE_LED_ACT_HIGH 0x00 719*4882a593Smuzhiyun #define DA9063_GPIO11_MODE_LED_ACT_LOW 0x08 720*4882a593Smuzhiyun #define DA9063_GPIO12_MODE 0x10 721*4882a593Smuzhiyun #define DA9063_GPIO13_MODE 0x20 722*4882a593Smuzhiyun #define DA9063_GPIO14_MODE 0x40 723*4882a593Smuzhiyun #define DA9063_GPIO14_MODE_LED_ACT_HIGH 0x00 724*4882a593Smuzhiyun #define DA9063_GPIO14_MODE_LED_ACT_LOW 0x40 725*4882a593Smuzhiyun #define DA9063_GPIO15_MODE 0x80 726*4882a593Smuzhiyun #define DA9063_GPIO15_MODE_LED_ACT_HIGH 0x00 727*4882a593Smuzhiyun #define DA9063_GPIO15_MODE_LED_ACT_LOW 0x80 728*4882a593Smuzhiyun 729*4882a593Smuzhiyun /* DA9063_REG_SWITCH_CONT (addr=0x1F) */ 730*4882a593Smuzhiyun #define DA9063_CORE_SW_GPI_MASK 0x03 731*4882a593Smuzhiyun #define DA9063_CORE_SW_GPI_OFF 0x00 732*4882a593Smuzhiyun #define DA9063_CORE_SW_GPI_GPIO1 0x01 733*4882a593Smuzhiyun #define DA9063_CORE_SW_GPI_GPIO2 0x02 734*4882a593Smuzhiyun #define DA9063_CORE_SW_GPI_GPIO13 0x03 735*4882a593Smuzhiyun #define DA9063_PERI_SW_GPI_MASK 0x0C 736*4882a593Smuzhiyun #define DA9063_PERI_SW_GPI_OFF 0x00 737*4882a593Smuzhiyun #define DA9063_PERI_SW_GPI_GPIO1 0x04 738*4882a593Smuzhiyun #define DA9063_PERI_SW_GPI_GPIO2 0x08 739*4882a593Smuzhiyun #define DA9063_PERI_SW_GPI_GPIO13 0x0C 740*4882a593Smuzhiyun #define DA9063_SWITCH_SR_MASK 0x30 741*4882a593Smuzhiyun #define DA9063_SWITCH_SR_1MV 0x00 742*4882a593Smuzhiyun #define DA9063_SWITCH_SR_5MV 0x10 743*4882a593Smuzhiyun #define DA9063_SWITCH_SR_10MV 0x20 744*4882a593Smuzhiyun #define DA9063_SWITCH_SR_50MV 0x30 745*4882a593Smuzhiyun #define DA9063_CORE_SW_INTERNAL 0x40 746*4882a593Smuzhiyun #define DA9063_CP_EN_MODE 0x80 747*4882a593Smuzhiyun 748*4882a593Smuzhiyun /* DA9063_REGL_Bxxxx_CONT common bits (addr=0x20-0x25) */ 749*4882a593Smuzhiyun #define DA9063_BUCK_EN 0x01 750*4882a593Smuzhiyun #define DA9063_BUCK_GPI_MASK 0x06 751*4882a593Smuzhiyun #define DA9063_BUCK_GPI_OFF 0x00 752*4882a593Smuzhiyun #define DA9063_BUCK_GPI_GPIO1 0x02 753*4882a593Smuzhiyun #define DA9063_BUCK_GPI_GPIO2 0x04 754*4882a593Smuzhiyun #define DA9063_BUCK_GPI_GPIO13 0x06 755*4882a593Smuzhiyun #define DA9063_BUCK_CONF 0x08 756*4882a593Smuzhiyun #define DA9063_VBUCK_GPI_MASK 0x60 757*4882a593Smuzhiyun #define DA9063_VBUCK_GPI_OFF 0x00 758*4882a593Smuzhiyun #define DA9063_VBUCK_GPI_GPIO1 0x20 759*4882a593Smuzhiyun #define DA9063_VBUCK_GPI_GPIO2 0x40 760*4882a593Smuzhiyun #define DA9063_VBUCK_GPI_GPIO13 0x60 761*4882a593Smuzhiyun 762*4882a593Smuzhiyun /* DA9063_REG_BCORE1_CONT specific bits (addr=0x21) */ 763*4882a593Smuzhiyun #define DA9063_CORE_SW_EN 0x10 764*4882a593Smuzhiyun #define DA9063_CORE_SW_CONF 0x80 765*4882a593Smuzhiyun 766*4882a593Smuzhiyun /* DA9063_REG_BPERI_CONT specific bits (addr=0x25) */ 767*4882a593Smuzhiyun #define DA9063_PERI_SW_EN 0x10 768*4882a593Smuzhiyun #define DA9063_PERI_SW_CONF 0x80 769*4882a593Smuzhiyun 770*4882a593Smuzhiyun /* DA9063_REG_LDOx_CONT common bits (addr=0x26-0x30) */ 771*4882a593Smuzhiyun #define DA9063_LDO_EN 0x01 772*4882a593Smuzhiyun #define DA9063_LDO_GPI_MASK 0x06 773*4882a593Smuzhiyun #define DA9063_LDO_GPI_OFF 0x00 774*4882a593Smuzhiyun #define DA9063_LDO_GPI_GPIO1 0x02 775*4882a593Smuzhiyun #define DA9063_LDO_GPI_GPIO2 0x04 776*4882a593Smuzhiyun #define DA9063_LDO_GPI_GPIO13 0x06 777*4882a593Smuzhiyun #define DA9063_LDO_PD_DIS 0x08 778*4882a593Smuzhiyun #define DA9063_VLDO_GPI_MASK 0x60 779*4882a593Smuzhiyun #define DA9063_VLDO_GPI_OFF 0x00 780*4882a593Smuzhiyun #define DA9063_VLDO_GPI_GPIO1 0x20 781*4882a593Smuzhiyun #define DA9063_VLDO_GPI_GPIO2 0x40 782*4882a593Smuzhiyun #define DA9063_VLDO_GPI_GPIO13 0x60 783*4882a593Smuzhiyun #define DA9063_LDO_CONF 0x80 784*4882a593Smuzhiyun 785*4882a593Smuzhiyun /* DA9063_REG_LDO5_CONT specific bits (addr=0x2A) */ 786*4882a593Smuzhiyun #define DA9063_VLDO5_SEL 0x10 787*4882a593Smuzhiyun 788*4882a593Smuzhiyun /* DA9063_REG_LDO6_CONT specific bits (addr=0x2B) */ 789*4882a593Smuzhiyun #define DA9063_VLDO6_SEL 0x10 790*4882a593Smuzhiyun 791*4882a593Smuzhiyun /* DA9063_REG_LDO7_CONT specific bits (addr=0x2C) */ 792*4882a593Smuzhiyun #define DA9063_VLDO7_SEL 0x10 793*4882a593Smuzhiyun 794*4882a593Smuzhiyun /* DA9063_REG_LDO8_CONT specific bits (addr=0x2D) */ 795*4882a593Smuzhiyun #define DA9063_VLDO8_SEL 0x10 796*4882a593Smuzhiyun 797*4882a593Smuzhiyun /* DA9063_REG_LDO9_CONT specific bits (addr=0x2E) */ 798*4882a593Smuzhiyun #define DA9063_VLDO9_SEL 0x10 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun /* DA9063_REG_LDO10_CONT specific bits (addr=0x2F) */ 801*4882a593Smuzhiyun #define DA9063_VLDO10_SEL 0x10 802*4882a593Smuzhiyun 803*4882a593Smuzhiyun /* DA9063_REG_LDO11_CONT specific bits (addr=0x30) */ 804*4882a593Smuzhiyun #define DA9063_VLDO11_SEL 0x10 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun /* DA9063_REG_VIB (addr=0x31) */ 807*4882a593Smuzhiyun #define DA9063_VIB_SET_MASK 0x3F 808*4882a593Smuzhiyun #define DA9063_VIB_SET_OFF 0 809*4882a593Smuzhiyun #define DA9063_VIB_SET_MAX 0x3F 810*4882a593Smuzhiyun 811*4882a593Smuzhiyun /* DA9063_REG_DVC_1 (addr=0x32) */ 812*4882a593Smuzhiyun #define DA9063_VBCORE1_SEL 0x01 813*4882a593Smuzhiyun #define DA9063_VBCORE2_SEL 0x02 814*4882a593Smuzhiyun #define DA9063_VBPRO_SEL 0x04 815*4882a593Smuzhiyun #define DA9063_VBMEM_SEL 0x08 816*4882a593Smuzhiyun #define DA9063_VBPERI_SEL 0x10 817*4882a593Smuzhiyun #define DA9063_VLDO1_SEL 0x20 818*4882a593Smuzhiyun #define DA9063_VLDO2_SEL 0x40 819*4882a593Smuzhiyun #define DA9063_VLDO3_SEL 0x80 820*4882a593Smuzhiyun 821*4882a593Smuzhiyun /* DA9063_REG_DVC_2 (addr=0x33) */ 822*4882a593Smuzhiyun #define DA9063_VBIO_SEL 0x01 823*4882a593Smuzhiyun #define DA9063_VLDO4_SEL 0x80 824*4882a593Smuzhiyun 825*4882a593Smuzhiyun /* DA9063_REG_ADC_MAN (addr=0x34) */ 826*4882a593Smuzhiyun #define DA9063_ADC_MUX_MASK 0x0F 827*4882a593Smuzhiyun #define DA9063_ADC_MUX_VSYS 0x00 828*4882a593Smuzhiyun #define DA9063_ADC_MUX_ADCIN1 0x01 829*4882a593Smuzhiyun #define DA9063_ADC_MUX_ADCIN2 0x02 830*4882a593Smuzhiyun #define DA9063_ADC_MUX_ADCIN3 0x03 831*4882a593Smuzhiyun #define DA9063_ADC_MUX_T_SENSE 0x04 832*4882a593Smuzhiyun #define DA9063_ADC_MUX_VBBAT 0x05 833*4882a593Smuzhiyun #define DA9063_ADC_MUX_LDO_G1 0x08 834*4882a593Smuzhiyun #define DA9063_ADC_MUX_LDO_G2 0x09 835*4882a593Smuzhiyun #define DA9063_ADC_MUX_LDO_G3 0x0A 836*4882a593Smuzhiyun #define DA9063_ADC_MAN 0x10 837*4882a593Smuzhiyun #define DA9063_ADC_MODE 0x20 838*4882a593Smuzhiyun 839*4882a593Smuzhiyun /* DA9063_REG_ADC_CONT (addr=0x35) */ 840*4882a593Smuzhiyun #define DA9063_ADC_AUTO_VSYS_EN 0x01 841*4882a593Smuzhiyun #define DA9063_ADC_AUTO_AD1_EN 0x02 842*4882a593Smuzhiyun #define DA9063_ADC_AUTO_AD2_EN 0x04 843*4882a593Smuzhiyun #define DA9063_ADC_AUTO_AD3_EN 0x08 844*4882a593Smuzhiyun #define DA9063_ADC_AD1_ISRC_EN 0x10 845*4882a593Smuzhiyun #define DA9063_ADC_AD2_ISRC_EN 0x20 846*4882a593Smuzhiyun #define DA9063_ADC_AD3_ISRC_EN 0x40 847*4882a593Smuzhiyun #define DA9063_COMP1V2_EN 0x80 848*4882a593Smuzhiyun 849*4882a593Smuzhiyun /* DA9063_REG_VSYS_MON (addr=0x36) */ 850*4882a593Smuzhiyun #define DA9063_VSYS_VAL_MASK 0xFF 851*4882a593Smuzhiyun #define DA9063_VSYS_VAL_BASE 0x00 852*4882a593Smuzhiyun 853*4882a593Smuzhiyun /* DA9063_REG_ADC_RES_L (addr=0x37) */ 854*4882a593Smuzhiyun #define DA9063_ADC_RES_L_BITS 2 855*4882a593Smuzhiyun #define DA9063_ADC_RES_L_MASK 0xC0 856*4882a593Smuzhiyun 857*4882a593Smuzhiyun /* DA9063_REG_ADC_RES_H (addr=0x38) */ 858*4882a593Smuzhiyun #define DA9063_ADC_RES_M_BITS 8 859*4882a593Smuzhiyun #define DA9063_ADC_RES_M_MASK 0xFF 860*4882a593Smuzhiyun 861*4882a593Smuzhiyun /* DA9063_REG_(xxx_RES/ADC_RES_H) (addr=0x39-0x3F) */ 862*4882a593Smuzhiyun #define DA9063_ADC_VAL_MASK 0xFF 863*4882a593Smuzhiyun 864*4882a593Smuzhiyun /* DA9063_REG_COUNT_S (addr=0x40) */ 865*4882a593Smuzhiyun #define DA9063_RTC_READ 0x80 866*4882a593Smuzhiyun #define DA9063_COUNT_SEC_MASK 0x3F 867*4882a593Smuzhiyun 868*4882a593Smuzhiyun /* DA9063_REG_COUNT_MI (addr=0x41) */ 869*4882a593Smuzhiyun #define DA9063_COUNT_MIN_MASK 0x3F 870*4882a593Smuzhiyun 871*4882a593Smuzhiyun /* DA9063_REG_COUNT_H (addr=0x42) */ 872*4882a593Smuzhiyun #define DA9063_COUNT_HOUR_MASK 0x1F 873*4882a593Smuzhiyun 874*4882a593Smuzhiyun /* DA9063_REG_COUNT_D (addr=0x43) */ 875*4882a593Smuzhiyun #define DA9063_COUNT_DAY_MASK 0x1F 876*4882a593Smuzhiyun 877*4882a593Smuzhiyun /* DA9063_REG_COUNT_MO (addr=0x44) */ 878*4882a593Smuzhiyun #define DA9063_COUNT_MONTH_MASK 0x0F 879*4882a593Smuzhiyun 880*4882a593Smuzhiyun /* DA9063_REG_COUNT_Y (addr=0x45) */ 881*4882a593Smuzhiyun #define DA9063_COUNT_YEAR_MASK 0x3F 882*4882a593Smuzhiyun #define DA9063_MONITOR 0x40 883*4882a593Smuzhiyun 884*4882a593Smuzhiyun /* DA9063_REG_ALARM_S (addr=0x46) */ 885*4882a593Smuzhiyun #define DA9063_BB_ALARM_S_MASK 0x3F 886*4882a593Smuzhiyun #define DA9063_ALARM_STATUS_ALARM 0x80 887*4882a593Smuzhiyun #define DA9063_ALARM_STATUS_TICK 0x40 888*4882a593Smuzhiyun /* DA9063_REG_ALARM_MI (addr=0x47) */ 889*4882a593Smuzhiyun #define DA9063_ALARM_MIN_MASK 0x3F 890*4882a593Smuzhiyun 891*4882a593Smuzhiyun /* DA9063_REG_ALARM_H (addr=0x48) */ 892*4882a593Smuzhiyun #define DA9063_ALARM_HOUR_MASK 0x1F 893*4882a593Smuzhiyun 894*4882a593Smuzhiyun /* DA9063_REG_ALARM_D (addr=0x49) */ 895*4882a593Smuzhiyun #define DA9063_ALARM_DAY_MASK 0x1F 896*4882a593Smuzhiyun 897*4882a593Smuzhiyun /* DA9063_REG_ALARM_MO (addr=0x4A) */ 898*4882a593Smuzhiyun #define DA9063_TICK_WAKE 0x20 899*4882a593Smuzhiyun #define DA9063_TICK_TYPE 0x10 900*4882a593Smuzhiyun #define DA9063_TICK_TYPE_SEC 0x00 901*4882a593Smuzhiyun #define DA9063_TICK_TYPE_MIN 0x10 902*4882a593Smuzhiyun #define DA9063_ALARM_MONTH_MASK 0x0F 903*4882a593Smuzhiyun 904*4882a593Smuzhiyun /* DA9063_REG_ALARM_Y (addr=0x4B) */ 905*4882a593Smuzhiyun #define DA9063_TICK_ON 0x80 906*4882a593Smuzhiyun #define DA9063_ALARM_ON 0x40 907*4882a593Smuzhiyun #define DA9063_ALARM_YEAR_MASK 0x3F 908*4882a593Smuzhiyun 909*4882a593Smuzhiyun /* DA9063_REG_WAIT (addr=0x97)*/ 910*4882a593Smuzhiyun #define DA9063_REG_WAIT_TIME_MASK 0xF 911*4882a593Smuzhiyun #define DA9063_WAIT_TIME_0_US 0x0 912*4882a593Smuzhiyun #define DA9063_WAIT_TIME_512_US 0x1 913*4882a593Smuzhiyun #define DA9063_WAIT_TIME_1_MS 0x2 914*4882a593Smuzhiyun #define DA9063_WAIT_TIME_2_MS 0x3 915*4882a593Smuzhiyun #define DA9063_WAIT_TIME_4_1_MS 0x4 916*4882a593Smuzhiyun #define DA9063_WAIT_TIME_8_2_MS 0x5 917*4882a593Smuzhiyun #define DA9063_WAIT_TIME_16_4_MS 0x6 918*4882a593Smuzhiyun #define DA9063_WAIT_TIME_32_8_MS 0x7 919*4882a593Smuzhiyun #define DA9063_WAIT_TIME_65_5_MS 0x8 920*4882a593Smuzhiyun #define DA9063_WAIT_TIME_128_MS 0x9 921*4882a593Smuzhiyun #define DA9063_WAIT_TIME_256_MS 0xA 922*4882a593Smuzhiyun #define DA9063_WAIT_TIME_512_MS 0xB 923*4882a593Smuzhiyun #define DA9063_WAIT_TIME_1_S 0xC 924*4882a593Smuzhiyun #define DA9063_WAIT_TIME_2_1_S 0xD 925*4882a593Smuzhiyun 926*4882a593Smuzhiyun /* DA9063_REG_EN_32K (addr=0x98)*/ 927*4882a593Smuzhiyun #define DA9063_STABILIZ_TIME_MASK 0x7 928*4882a593Smuzhiyun #define DA9063_CRYSTAL 0x08 929*4882a593Smuzhiyun #define DA9063_DELAY_MODE 0x10 930*4882a593Smuzhiyun #define DA9063_OUT_CLOCK 0x20 931*4882a593Smuzhiyun #define DA9063_RTC_CLOCK 0x40 932*4882a593Smuzhiyun #define DA9063_OUT_32K_EN 0x80 933*4882a593Smuzhiyun 934*4882a593Smuzhiyun /* DA9063_REG_BUCK_ILIM_A (addr=0x9A) */ 935*4882a593Smuzhiyun #define DA9063_BIO_ILIM_MASK 0x0F 936*4882a593Smuzhiyun #define DA9063_BMEM_ILIM_MASK 0xF0 937*4882a593Smuzhiyun 938*4882a593Smuzhiyun /* DA9063_REG_BUCK_ILIM_B (addr=0x9B) */ 939*4882a593Smuzhiyun #define DA9063_BPRO_ILIM_MASK 0x0F 940*4882a593Smuzhiyun #define DA9063_BPERI_ILIM_MASK 0xF0 941*4882a593Smuzhiyun 942*4882a593Smuzhiyun /* DA9063_REG_BUCK_ILIM_C (addr=0x9C) */ 943*4882a593Smuzhiyun #define DA9063_BCORE1_ILIM_MASK 0x0F 944*4882a593Smuzhiyun #define DA9063_BCORE2_ILIM_MASK 0xF0 945*4882a593Smuzhiyun 946*4882a593Smuzhiyun /* DA9063_REG_Bxxxx_CFG common bits (addr=0x9D-0xA2) */ 947*4882a593Smuzhiyun #define DA9063_BUCK_FB_MASK 0x07 948*4882a593Smuzhiyun #define DA9063_BUCK_PD_DIS_MASK 0x20 949*4882a593Smuzhiyun #define DA9063_BUCK_MODE_MASK 0xC0 950*4882a593Smuzhiyun #define DA9063_BUCK_MODE_MANUAL 0x00 951*4882a593Smuzhiyun #define DA9063_BUCK_MODE_SLEEP 0x40 952*4882a593Smuzhiyun #define DA9063_BUCK_MODE_SYNC 0x80 953*4882a593Smuzhiyun #define DA9063_BUCK_MODE_AUTO 0xC0 954*4882a593Smuzhiyun 955*4882a593Smuzhiyun /* DA9063_REG_BPRO_CFG (addr=0x9F) */ 956*4882a593Smuzhiyun #define DA9063_BPRO_VTTR_EN 0x08 957*4882a593Smuzhiyun #define DA9063_BPRO_VTT_EN 0x10 958*4882a593Smuzhiyun 959*4882a593Smuzhiyun /* DA9063_REG_VBxxxx_A/B (addr=0xA3-0xA8, 0xB4-0xB9) */ 960*4882a593Smuzhiyun #define DA9063_VBUCK_MASK 0x7F 961*4882a593Smuzhiyun #define DA9063_VBUCK_BIAS 0 962*4882a593Smuzhiyun #define DA9063_BUCK_SL 0x80 963*4882a593Smuzhiyun 964*4882a593Smuzhiyun /* DA9063_REG_VLDOx_A/B (addr=0xA9-0x3, 0xBA-0xC4) */ 965*4882a593Smuzhiyun #define DA9063_LDO_SL 0x80 966*4882a593Smuzhiyun 967*4882a593Smuzhiyun /* DA9063_REG_VLDO1_A/B (addr=0xA9, 0xBA) */ 968*4882a593Smuzhiyun #define DA9063_VLDO1_MASK 0x3F 969*4882a593Smuzhiyun #define DA9063_VLDO1_BIAS 0 970*4882a593Smuzhiyun 971*4882a593Smuzhiyun /* DA9063_REG_VLDO2_A/B (addr=0xAA, 0xBB) */ 972*4882a593Smuzhiyun #define DA9063_VLDO2_MASK 0x3F 973*4882a593Smuzhiyun #define DA9063_VLDO2_BIAS 0 974*4882a593Smuzhiyun 975*4882a593Smuzhiyun /* DA9063_REG_VLDO3_A/B (addr=0xAB, 0xBC) */ 976*4882a593Smuzhiyun #define DA9063_VLDO3_MASK 0x7F 977*4882a593Smuzhiyun #define DA9063_VLDO3_BIAS 0 978*4882a593Smuzhiyun 979*4882a593Smuzhiyun /* DA9063_REG_VLDO4_A/B (addr=0xAC, 0xBD) */ 980*4882a593Smuzhiyun #define DA9063_VLDO4_MASK 0x7F 981*4882a593Smuzhiyun #define DA9063_VLDO4_BIAS 0 982*4882a593Smuzhiyun 983*4882a593Smuzhiyun /* DA9063_REG_VLDO5_A/B (addr=0xAD, 0xBE) */ 984*4882a593Smuzhiyun #define DA9063_VLDO5_MASK 0x3F 985*4882a593Smuzhiyun #define DA9063_VLDO5_BIAS 2 986*4882a593Smuzhiyun 987*4882a593Smuzhiyun /* DA9063_REG_VLDO6_A/B (addr=0xAE, 0xBF) */ 988*4882a593Smuzhiyun #define DA9063_VLDO6_MASK 0x3F 989*4882a593Smuzhiyun #define DA9063_VLDO6_BIAS 2 990*4882a593Smuzhiyun 991*4882a593Smuzhiyun /* DA9063_REG_VLDO7_A/B (addr=0xAF, 0xC0) */ 992*4882a593Smuzhiyun #define DA9063_VLDO7_MASK 0x3F 993*4882a593Smuzhiyun #define DA9063_VLDO7_BIAS 2 994*4882a593Smuzhiyun 995*4882a593Smuzhiyun /* DA9063_REG_VLDO8_A/B (addr=0xB0, 0xC1) */ 996*4882a593Smuzhiyun #define DA9063_VLDO8_MASK 0x3F 997*4882a593Smuzhiyun #define DA9063_VLDO8_BIAS 2 998*4882a593Smuzhiyun 999*4882a593Smuzhiyun /* DA9063_REG_VLDO9_A/B (addr=0xB1, 0xC2) */ 1000*4882a593Smuzhiyun #define DA9063_VLDO9_MASK 0x3F 1001*4882a593Smuzhiyun #define DA9063_VLDO9_BIAS 3 1002*4882a593Smuzhiyun 1003*4882a593Smuzhiyun /* DA9063_REG_VLDO10_A/B (addr=0xB2, 0xC3) */ 1004*4882a593Smuzhiyun #define DA9063_VLDO10_MASK 0x3F 1005*4882a593Smuzhiyun #define DA9063_VLDO10_BIAS 2 1006*4882a593Smuzhiyun 1007*4882a593Smuzhiyun /* DA9063_REG_VLDO11_A/B (addr=0xB3, 0xC4) */ 1008*4882a593Smuzhiyun #define DA9063_VLDO11_MASK 0x3F 1009*4882a593Smuzhiyun #define DA9063_VLDO11_BIAS 2 1010*4882a593Smuzhiyun 1011*4882a593Smuzhiyun /* DA9063_REG_GPO11_LED (addr=0xC6) */ 1012*4882a593Smuzhiyun /* DA9063_REG_GPO14_LED (addr=0xC7) */ 1013*4882a593Smuzhiyun /* DA9063_REG_GPO15_LED (addr=0xC8) */ 1014*4882a593Smuzhiyun #define DA9063_GPIO_DIM 0x80 1015*4882a593Smuzhiyun #define DA9063_GPIO_PWM_MASK 0x7F 1016*4882a593Smuzhiyun 1017*4882a593Smuzhiyun /* DA9063_REG_CONFIG_H (addr=0x10D) */ 1018*4882a593Smuzhiyun #define DA9063_PWM_CLK_MASK 0x01 1019*4882a593Smuzhiyun #define DA9063_PWM_CLK_PWM2MHZ 0x00 1020*4882a593Smuzhiyun #define DA9063_PWM_CLK_PWM1MHZ 0x01 1021*4882a593Smuzhiyun #define DA9063_LDO8_MODE_MASK 0x02 1022*4882a593Smuzhiyun #define DA9063_LDO8_MODE_LDO 0 1023*4882a593Smuzhiyun #define DA9063_LDO8_MODE_VIBR 0x02 1024*4882a593Smuzhiyun #define DA9063_MERGE_SENSE_MASK 0x04 1025*4882a593Smuzhiyun #define DA9063_MERGE_SENSE_GP_FB2 0x00 1026*4882a593Smuzhiyun #define DA9063_MERGE_SENSE_GPIO4 0x04 1027*4882a593Smuzhiyun #define DA9063_BCORE_MERGE 0x08 1028*4882a593Smuzhiyun #define DA9063_BPRO_OD 0x10 1029*4882a593Smuzhiyun #define DA9063_BCORE2_OD 0x20 1030*4882a593Smuzhiyun #define DA9063_BCORE1_OD 0x40 1031*4882a593Smuzhiyun #define DA9063_BUCK_MERGE 0x80 1032*4882a593Smuzhiyun 1033*4882a593Smuzhiyun /* DA9063_REG_CONFIG_I (addr=0x10E) */ 1034*4882a593Smuzhiyun #define DA9063_NONKEY_PIN_MASK 0x03 1035*4882a593Smuzhiyun #define DA9063_NONKEY_PIN_PORT 0x00 1036*4882a593Smuzhiyun #define DA9063_NONKEY_PIN_SWDOWN 0x01 1037*4882a593Smuzhiyun #define DA9063_NONKEY_PIN_AUTODOWN 0x02 1038*4882a593Smuzhiyun #define DA9063_NONKEY_PIN_AUTOFLPRT 0x03 1039*4882a593Smuzhiyun 1040*4882a593Smuzhiyun /* DA9063_REG_CONFIG_J (addr=0x10F) */ 1041*4882a593Smuzhiyun #define DA9063_TWOWIRE_TO 0x40 1042*4882a593Smuzhiyun 1043*4882a593Smuzhiyun /* DA9063_REG_MON_REG_5 (addr=0x116) */ 1044*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_MASK 0x07 1045*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_NONE 0x00 1046*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_BCORE1 0x01 1047*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_BCORE2 0x02 1048*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_BPRO 0x03 1049*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_LDO3 0x04 1050*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_LDO4 0x05 1051*4882a593Smuzhiyun #define DA9063_MON_A8_IDX_LDO11 0x06 1052*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_MASK 0x70 1053*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_NONE 0x00 1054*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_BIO 0x01 1055*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_BMEM 0x02 1056*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_BPERI 0x03 1057*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_LDO1 0x04 1058*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_LDO2 0x05 1059*4882a593Smuzhiyun #define DA9063_MON_A9_IDX_LDO5 0x06 1060*4882a593Smuzhiyun 1061*4882a593Smuzhiyun /* DA9063_REG_MON_REG_6 (addr=0x117) */ 1062*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_MASK 0x07 1063*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_NONE 0x00 1064*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_LDO6 0x01 1065*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_LDO7 0x02 1066*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_LDO8 0x03 1067*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_LDO9 0x04 1068*4882a593Smuzhiyun #define DA9063_MON_A10_IDX_LDO10 0x05 1069*4882a593Smuzhiyun 1070*4882a593Smuzhiyun /* DA9063_REG_VARIANT_ID (addr=0x182) */ 1071*4882a593Smuzhiyun #define DA9063_VARIANT_ID_VRC_SHIFT 0 1072*4882a593Smuzhiyun #define DA9063_VARIANT_ID_VRC_MASK 0x0F 1073*4882a593Smuzhiyun #define DA9063_VARIANT_ID_MRC_SHIFT 4 1074*4882a593Smuzhiyun #define DA9063_VARIANT_ID_MRC_MASK 0xF0 1075*4882a593Smuzhiyun 1076*4882a593Smuzhiyun #endif /* _DA9063_REG_H */ 1077