1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/mdio.h: definitions for MDIO (clause 45) transceivers
4*4882a593Smuzhiyun * Copyright 2006-2009 Solarflare Communications Inc.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun #ifndef __LINUX_MDIO_H__
7*4882a593Smuzhiyun #define __LINUX_MDIO_H__
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <uapi/linux/mdio.h>
10*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
13*4882a593Smuzhiyun * IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun #define MII_ADDR_C45 (1<<30)
16*4882a593Smuzhiyun #define MII_DEVADDR_C45_SHIFT 16
17*4882a593Smuzhiyun #define MII_REGADDR_C45_MASK GENMASK(15, 0)
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun struct gpio_desc;
20*4882a593Smuzhiyun struct mii_bus;
21*4882a593Smuzhiyun struct reset_control;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* Multiple levels of nesting are possible. However typically this is
24*4882a593Smuzhiyun * limited to nested DSA like layer, a MUX layer, and the normal
25*4882a593Smuzhiyun * user. Instead of trying to handle the general case, just define
26*4882a593Smuzhiyun * these cases.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun enum mdio_mutex_lock_class {
29*4882a593Smuzhiyun MDIO_MUTEX_NORMAL,
30*4882a593Smuzhiyun MDIO_MUTEX_MUX,
31*4882a593Smuzhiyun MDIO_MUTEX_NESTED,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct mdio_device {
35*4882a593Smuzhiyun struct device dev;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun struct mii_bus *bus;
38*4882a593Smuzhiyun char modalias[MDIO_NAME_SIZE];
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun int (*bus_match)(struct device *dev, struct device_driver *drv);
41*4882a593Smuzhiyun void (*device_free)(struct mdio_device *mdiodev);
42*4882a593Smuzhiyun void (*device_remove)(struct mdio_device *mdiodev);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* Bus address of the MDIO device (0-31) */
45*4882a593Smuzhiyun int addr;
46*4882a593Smuzhiyun int flags;
47*4882a593Smuzhiyun struct gpio_desc *reset_gpio;
48*4882a593Smuzhiyun struct reset_control *reset_ctrl;
49*4882a593Smuzhiyun unsigned int reset_assert_delay;
50*4882a593Smuzhiyun unsigned int reset_deassert_delay;
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun #define to_mdio_device(d) container_of(d, struct mdio_device, dev)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* struct mdio_driver_common: Common to all MDIO drivers */
55*4882a593Smuzhiyun struct mdio_driver_common {
56*4882a593Smuzhiyun struct device_driver driver;
57*4882a593Smuzhiyun int flags;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun #define MDIO_DEVICE_FLAG_PHY 1
60*4882a593Smuzhiyun #define to_mdio_common_driver(d) \
61*4882a593Smuzhiyun container_of(d, struct mdio_driver_common, driver)
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* struct mdio_driver: Generic MDIO driver */
64*4882a593Smuzhiyun struct mdio_driver {
65*4882a593Smuzhiyun struct mdio_driver_common mdiodrv;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * Called during discovery. Used to set
69*4882a593Smuzhiyun * up device-specific structures, if any
70*4882a593Smuzhiyun */
71*4882a593Smuzhiyun int (*probe)(struct mdio_device *mdiodev);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Clears up any memory if needed */
74*4882a593Smuzhiyun void (*remove)(struct mdio_device *mdiodev);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* Quiesces the device on system shutdown, turns off interrupts etc */
77*4882a593Smuzhiyun void (*shutdown)(struct mdio_device *mdiodev);
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun #define to_mdio_driver(d) \
80*4882a593Smuzhiyun container_of(to_mdio_common_driver(d), struct mdio_driver, mdiodrv)
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* device driver data */
mdiodev_set_drvdata(struct mdio_device * mdio,void * data)83*4882a593Smuzhiyun static inline void mdiodev_set_drvdata(struct mdio_device *mdio, void *data)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun dev_set_drvdata(&mdio->dev, data);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
mdiodev_get_drvdata(struct mdio_device * mdio)88*4882a593Smuzhiyun static inline void *mdiodev_get_drvdata(struct mdio_device *mdio)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun return dev_get_drvdata(&mdio->dev);
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun void mdio_device_free(struct mdio_device *mdiodev);
94*4882a593Smuzhiyun struct mdio_device *mdio_device_create(struct mii_bus *bus, int addr);
95*4882a593Smuzhiyun int mdio_device_register(struct mdio_device *mdiodev);
96*4882a593Smuzhiyun void mdio_device_remove(struct mdio_device *mdiodev);
97*4882a593Smuzhiyun void mdio_device_reset(struct mdio_device *mdiodev, int value);
98*4882a593Smuzhiyun int mdio_driver_register(struct mdio_driver *drv);
99*4882a593Smuzhiyun void mdio_driver_unregister(struct mdio_driver *drv);
100*4882a593Smuzhiyun int mdio_device_bus_match(struct device *dev, struct device_driver *drv);
101*4882a593Smuzhiyun
mdio_phy_id_is_c45(int phy_id)102*4882a593Smuzhiyun static inline bool mdio_phy_id_is_c45(int phy_id)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun return (phy_id & MDIO_PHY_ID_C45) && !(phy_id & ~MDIO_PHY_ID_C45_MASK);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
mdio_phy_id_prtad(int phy_id)107*4882a593Smuzhiyun static inline __u16 mdio_phy_id_prtad(int phy_id)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun return (phy_id & MDIO_PHY_ID_PRTAD) >> 5;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
mdio_phy_id_devad(int phy_id)112*4882a593Smuzhiyun static inline __u16 mdio_phy_id_devad(int phy_id)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun return phy_id & MDIO_PHY_ID_DEVAD;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /**
118*4882a593Smuzhiyun * struct mdio_if_info - Ethernet controller MDIO interface
119*4882a593Smuzhiyun * @prtad: PRTAD of the PHY (%MDIO_PRTAD_NONE if not present/unknown)
120*4882a593Smuzhiyun * @mmds: Mask of MMDs expected to be present in the PHY. This must be
121*4882a593Smuzhiyun * non-zero unless @prtad = %MDIO_PRTAD_NONE.
122*4882a593Smuzhiyun * @mode_support: MDIO modes supported. If %MDIO_SUPPORTS_C22 is set then
123*4882a593Smuzhiyun * MII register access will be passed through with @devad =
124*4882a593Smuzhiyun * %MDIO_DEVAD_NONE. If %MDIO_EMULATE_C22 is set then access to
125*4882a593Smuzhiyun * commonly used clause 22 registers will be translated into
126*4882a593Smuzhiyun * clause 45 registers.
127*4882a593Smuzhiyun * @dev: Net device structure
128*4882a593Smuzhiyun * @mdio_read: Register read function; returns value or negative error code
129*4882a593Smuzhiyun * @mdio_write: Register write function; returns 0 or negative error code
130*4882a593Smuzhiyun */
131*4882a593Smuzhiyun struct mdio_if_info {
132*4882a593Smuzhiyun int prtad;
133*4882a593Smuzhiyun u32 mmds;
134*4882a593Smuzhiyun unsigned mode_support;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun struct net_device *dev;
137*4882a593Smuzhiyun int (*mdio_read)(struct net_device *dev, int prtad, int devad,
138*4882a593Smuzhiyun u16 addr);
139*4882a593Smuzhiyun int (*mdio_write)(struct net_device *dev, int prtad, int devad,
140*4882a593Smuzhiyun u16 addr, u16 val);
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun #define MDIO_PRTAD_NONE (-1)
144*4882a593Smuzhiyun #define MDIO_DEVAD_NONE (-1)
145*4882a593Smuzhiyun #define MDIO_SUPPORTS_C22 1
146*4882a593Smuzhiyun #define MDIO_SUPPORTS_C45 2
147*4882a593Smuzhiyun #define MDIO_EMULATE_C22 4
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun struct ethtool_cmd;
150*4882a593Smuzhiyun struct ethtool_pauseparam;
151*4882a593Smuzhiyun extern int mdio45_probe(struct mdio_if_info *mdio, int prtad);
152*4882a593Smuzhiyun extern int mdio_set_flag(const struct mdio_if_info *mdio,
153*4882a593Smuzhiyun int prtad, int devad, u16 addr, int mask,
154*4882a593Smuzhiyun bool sense);
155*4882a593Smuzhiyun extern int mdio45_links_ok(const struct mdio_if_info *mdio, u32 mmds);
156*4882a593Smuzhiyun extern int mdio45_nway_restart(const struct mdio_if_info *mdio);
157*4882a593Smuzhiyun extern void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio,
158*4882a593Smuzhiyun struct ethtool_cmd *ecmd,
159*4882a593Smuzhiyun u32 npage_adv, u32 npage_lpa);
160*4882a593Smuzhiyun extern void
161*4882a593Smuzhiyun mdio45_ethtool_ksettings_get_npage(const struct mdio_if_info *mdio,
162*4882a593Smuzhiyun struct ethtool_link_ksettings *cmd,
163*4882a593Smuzhiyun u32 npage_adv, u32 npage_lpa);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /**
166*4882a593Smuzhiyun * mdio45_ethtool_gset - get settings for ETHTOOL_GSET
167*4882a593Smuzhiyun * @mdio: MDIO interface
168*4882a593Smuzhiyun * @ecmd: Ethtool request structure
169*4882a593Smuzhiyun *
170*4882a593Smuzhiyun * Since the CSRs for auto-negotiation using next pages are not fully
171*4882a593Smuzhiyun * standardised, this function does not attempt to decode them. Use
172*4882a593Smuzhiyun * mdio45_ethtool_gset_npage() to specify advertisement bits from next
173*4882a593Smuzhiyun * pages.
174*4882a593Smuzhiyun */
mdio45_ethtool_gset(const struct mdio_if_info * mdio,struct ethtool_cmd * ecmd)175*4882a593Smuzhiyun static inline void mdio45_ethtool_gset(const struct mdio_if_info *mdio,
176*4882a593Smuzhiyun struct ethtool_cmd *ecmd)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun mdio45_ethtool_gset_npage(mdio, ecmd, 0, 0);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /**
182*4882a593Smuzhiyun * mdio45_ethtool_ksettings_get - get settings for ETHTOOL_GLINKSETTINGS
183*4882a593Smuzhiyun * @mdio: MDIO interface
184*4882a593Smuzhiyun * @cmd: Ethtool request structure
185*4882a593Smuzhiyun *
186*4882a593Smuzhiyun * Since the CSRs for auto-negotiation using next pages are not fully
187*4882a593Smuzhiyun * standardised, this function does not attempt to decode them. Use
188*4882a593Smuzhiyun * mdio45_ethtool_ksettings_get_npage() to specify advertisement bits
189*4882a593Smuzhiyun * from next pages.
190*4882a593Smuzhiyun */
191*4882a593Smuzhiyun static inline void
mdio45_ethtool_ksettings_get(const struct mdio_if_info * mdio,struct ethtool_link_ksettings * cmd)192*4882a593Smuzhiyun mdio45_ethtool_ksettings_get(const struct mdio_if_info *mdio,
193*4882a593Smuzhiyun struct ethtool_link_ksettings *cmd)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun mdio45_ethtool_ksettings_get_npage(mdio, cmd, 0, 0);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun extern int mdio_mii_ioctl(const struct mdio_if_info *mdio,
199*4882a593Smuzhiyun struct mii_ioctl_data *mii_data, int cmd);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /**
202*4882a593Smuzhiyun * mmd_eee_cap_to_ethtool_sup_t
203*4882a593Smuzhiyun * @eee_cap: value of the MMD EEE Capability register
204*4882a593Smuzhiyun *
205*4882a593Smuzhiyun * A small helper function that translates MMD EEE Capability (3.20) bits
206*4882a593Smuzhiyun * to ethtool supported settings.
207*4882a593Smuzhiyun */
mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap)208*4882a593Smuzhiyun static inline u32 mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun u32 supported = 0;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_100TX)
213*4882a593Smuzhiyun supported |= SUPPORTED_100baseT_Full;
214*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_1000T)
215*4882a593Smuzhiyun supported |= SUPPORTED_1000baseT_Full;
216*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_10GT)
217*4882a593Smuzhiyun supported |= SUPPORTED_10000baseT_Full;
218*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_1000KX)
219*4882a593Smuzhiyun supported |= SUPPORTED_1000baseKX_Full;
220*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_10GKX4)
221*4882a593Smuzhiyun supported |= SUPPORTED_10000baseKX4_Full;
222*4882a593Smuzhiyun if (eee_cap & MDIO_EEE_10GKR)
223*4882a593Smuzhiyun supported |= SUPPORTED_10000baseKR_Full;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun return supported;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /**
229*4882a593Smuzhiyun * mmd_eee_adv_to_ethtool_adv_t
230*4882a593Smuzhiyun * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers
231*4882a593Smuzhiyun *
232*4882a593Smuzhiyun * A small helper function that translates the MMD EEE Advertisment (7.60)
233*4882a593Smuzhiyun * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement
234*4882a593Smuzhiyun * settings.
235*4882a593Smuzhiyun */
mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv)236*4882a593Smuzhiyun static inline u32 mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun u32 adv = 0;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_100TX)
241*4882a593Smuzhiyun adv |= ADVERTISED_100baseT_Full;
242*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_1000T)
243*4882a593Smuzhiyun adv |= ADVERTISED_1000baseT_Full;
244*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_10GT)
245*4882a593Smuzhiyun adv |= ADVERTISED_10000baseT_Full;
246*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_1000KX)
247*4882a593Smuzhiyun adv |= ADVERTISED_1000baseKX_Full;
248*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_10GKX4)
249*4882a593Smuzhiyun adv |= ADVERTISED_10000baseKX4_Full;
250*4882a593Smuzhiyun if (eee_adv & MDIO_EEE_10GKR)
251*4882a593Smuzhiyun adv |= ADVERTISED_10000baseKR_Full;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun return adv;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /**
257*4882a593Smuzhiyun * ethtool_adv_to_mmd_eee_adv_t
258*4882a593Smuzhiyun * @adv: the ethtool advertisement settings
259*4882a593Smuzhiyun *
260*4882a593Smuzhiyun * A small helper function that translates ethtool advertisement settings
261*4882a593Smuzhiyun * to EEE advertisements for the MMD EEE Advertisement (7.60) and
262*4882a593Smuzhiyun * MMD EEE Link Partner Ability (7.61) registers.
263*4882a593Smuzhiyun */
ethtool_adv_to_mmd_eee_adv_t(u32 adv)264*4882a593Smuzhiyun static inline u16 ethtool_adv_to_mmd_eee_adv_t(u32 adv)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun u16 reg = 0;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun if (adv & ADVERTISED_100baseT_Full)
269*4882a593Smuzhiyun reg |= MDIO_EEE_100TX;
270*4882a593Smuzhiyun if (adv & ADVERTISED_1000baseT_Full)
271*4882a593Smuzhiyun reg |= MDIO_EEE_1000T;
272*4882a593Smuzhiyun if (adv & ADVERTISED_10000baseT_Full)
273*4882a593Smuzhiyun reg |= MDIO_EEE_10GT;
274*4882a593Smuzhiyun if (adv & ADVERTISED_1000baseKX_Full)
275*4882a593Smuzhiyun reg |= MDIO_EEE_1000KX;
276*4882a593Smuzhiyun if (adv & ADVERTISED_10000baseKX4_Full)
277*4882a593Smuzhiyun reg |= MDIO_EEE_10GKX4;
278*4882a593Smuzhiyun if (adv & ADVERTISED_10000baseKR_Full)
279*4882a593Smuzhiyun reg |= MDIO_EEE_10GKR;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun return reg;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun /**
285*4882a593Smuzhiyun * linkmode_adv_to_mii_10gbt_adv_t
286*4882a593Smuzhiyun * @advertising: the linkmode advertisement settings
287*4882a593Smuzhiyun *
288*4882a593Smuzhiyun * A small helper function that translates linkmode advertisement
289*4882a593Smuzhiyun * settings to phy autonegotiation advertisements for the C45
290*4882a593Smuzhiyun * 10GBASE-T AN CONTROL (7.32) register.
291*4882a593Smuzhiyun */
linkmode_adv_to_mii_10gbt_adv_t(unsigned long * advertising)292*4882a593Smuzhiyun static inline u32 linkmode_adv_to_mii_10gbt_adv_t(unsigned long *advertising)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun u32 result = 0;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
297*4882a593Smuzhiyun advertising))
298*4882a593Smuzhiyun result |= MDIO_AN_10GBT_CTRL_ADV2_5G;
299*4882a593Smuzhiyun if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
300*4882a593Smuzhiyun advertising))
301*4882a593Smuzhiyun result |= MDIO_AN_10GBT_CTRL_ADV5G;
302*4882a593Smuzhiyun if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
303*4882a593Smuzhiyun advertising))
304*4882a593Smuzhiyun result |= MDIO_AN_10GBT_CTRL_ADV10G;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun return result;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /**
310*4882a593Smuzhiyun * mii_10gbt_stat_mod_linkmode_lpa_t
311*4882a593Smuzhiyun * @advertising: target the linkmode advertisement settings
312*4882a593Smuzhiyun * @lpa: value of the C45 10GBASE-T AN STATUS register
313*4882a593Smuzhiyun *
314*4882a593Smuzhiyun * A small helper function that translates C45 10GBASE-T AN STATUS register bits
315*4882a593Smuzhiyun * to linkmode advertisement settings. Other bits in advertising aren't changed.
316*4882a593Smuzhiyun */
mii_10gbt_stat_mod_linkmode_lpa_t(unsigned long * advertising,u32 lpa)317*4882a593Smuzhiyun static inline void mii_10gbt_stat_mod_linkmode_lpa_t(unsigned long *advertising,
318*4882a593Smuzhiyun u32 lpa)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
321*4882a593Smuzhiyun advertising, lpa & MDIO_AN_10GBT_STAT_LP2_5G);
322*4882a593Smuzhiyun linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
323*4882a593Smuzhiyun advertising, lpa & MDIO_AN_10GBT_STAT_LP5G);
324*4882a593Smuzhiyun linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
325*4882a593Smuzhiyun advertising, lpa & MDIO_AN_10GBT_STAT_LP10G);
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
329*4882a593Smuzhiyun int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
330*4882a593Smuzhiyun int __mdiobus_modify_changed(struct mii_bus *bus, int addr, u32 regnum,
331*4882a593Smuzhiyun u16 mask, u16 set);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
334*4882a593Smuzhiyun int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum);
335*4882a593Smuzhiyun int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
336*4882a593Smuzhiyun int mdiobus_write_nested(struct mii_bus *bus, int addr, u32 regnum, u16 val);
337*4882a593Smuzhiyun int mdiobus_modify(struct mii_bus *bus, int addr, u32 regnum, u16 mask,
338*4882a593Smuzhiyun u16 set);
339*4882a593Smuzhiyun
mdiobus_c45_addr(int devad,u16 regnum)340*4882a593Smuzhiyun static inline u32 mdiobus_c45_addr(int devad, u16 regnum)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun return MII_ADDR_C45 | devad << MII_DEVADDR_C45_SHIFT | regnum;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
__mdiobus_c45_read(struct mii_bus * bus,int prtad,int devad,u16 regnum)345*4882a593Smuzhiyun static inline int __mdiobus_c45_read(struct mii_bus *bus, int prtad, int devad,
346*4882a593Smuzhiyun u16 regnum)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun return __mdiobus_read(bus, prtad, mdiobus_c45_addr(devad, regnum));
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
__mdiobus_c45_write(struct mii_bus * bus,int prtad,int devad,u16 regnum,u16 val)351*4882a593Smuzhiyun static inline int __mdiobus_c45_write(struct mii_bus *bus, int prtad, int devad,
352*4882a593Smuzhiyun u16 regnum, u16 val)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun return __mdiobus_write(bus, prtad, mdiobus_c45_addr(devad, regnum),
355*4882a593Smuzhiyun val);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
mdiobus_c45_read(struct mii_bus * bus,int prtad,int devad,u16 regnum)358*4882a593Smuzhiyun static inline int mdiobus_c45_read(struct mii_bus *bus, int prtad, int devad,
359*4882a593Smuzhiyun u16 regnum)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun return mdiobus_read(bus, prtad, mdiobus_c45_addr(devad, regnum));
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
mdiobus_c45_write(struct mii_bus * bus,int prtad,int devad,u16 regnum,u16 val)364*4882a593Smuzhiyun static inline int mdiobus_c45_write(struct mii_bus *bus, int prtad, int devad,
365*4882a593Smuzhiyun u16 regnum, u16 val)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun return mdiobus_write(bus, prtad, mdiobus_c45_addr(devad, regnum), val);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun int mdiobus_register_device(struct mdio_device *mdiodev);
371*4882a593Smuzhiyun int mdiobus_unregister_device(struct mdio_device *mdiodev);
372*4882a593Smuzhiyun bool mdiobus_is_registered_device(struct mii_bus *bus, int addr);
373*4882a593Smuzhiyun struct phy_device *mdiobus_get_phy(struct mii_bus *bus, int addr);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /**
376*4882a593Smuzhiyun * mdio_module_driver() - Helper macro for registering mdio drivers
377*4882a593Smuzhiyun * @_mdio_driver: driver to register
378*4882a593Smuzhiyun *
379*4882a593Smuzhiyun * Helper macro for MDIO drivers which do not do anything special in module
380*4882a593Smuzhiyun * init/exit. Each module may only use this macro once, and calling it
381*4882a593Smuzhiyun * replaces module_init() and module_exit().
382*4882a593Smuzhiyun */
383*4882a593Smuzhiyun #define mdio_module_driver(_mdio_driver) \
384*4882a593Smuzhiyun static int __init mdio_module_init(void) \
385*4882a593Smuzhiyun { \
386*4882a593Smuzhiyun return mdio_driver_register(&_mdio_driver); \
387*4882a593Smuzhiyun } \
388*4882a593Smuzhiyun module_init(mdio_module_init); \
389*4882a593Smuzhiyun static void __exit mdio_module_exit(void) \
390*4882a593Smuzhiyun { \
391*4882a593Smuzhiyun mdio_driver_unregister(&_mdio_driver); \
392*4882a593Smuzhiyun } \
393*4882a593Smuzhiyun module_exit(mdio_module_exit)
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun #endif /* __LINUX_MDIO_H__ */
396