1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _MARVELL_PHY_H 3*4882a593Smuzhiyun #define _MARVELL_PHY_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* Mask used for ID comparisons */ 6*4882a593Smuzhiyun #define MARVELL_PHY_ID_MASK 0xfffffff0 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* Known PHY IDs */ 9*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1101 0x01410c60 10*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1112 0x01410c90 11*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1111 0x01410cc0 12*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1118 0x01410e10 13*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1121R 0x01410cb0 14*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1145 0x01410cd0 15*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1149R 0x01410e50 16*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1240 0x01410e30 17*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1318S 0x01410e90 18*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1340S 0x01410dc0 19*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1116R 0x01410e40 20*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1510 0x01410dd0 21*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1540 0x01410eb0 22*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1545 0x01410ea0 23*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E1548P 0x01410ec0 24*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E3016 0x01410e60 25*4882a593Smuzhiyun #define MARVELL_PHY_ID_88X3310 0x002b09a0 26*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E2110 0x002b09b0 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* These Ethernet switch families contain embedded PHYs, but they do 29*4882a593Smuzhiyun * not have a model ID. So the switch driver traps reads to the ID2 30*4882a593Smuzhiyun * register and returns the switch family ID 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E6341_FAMILY 0x01410f41 33*4882a593Smuzhiyun #define MARVELL_PHY_ID_88E6390_FAMILY 0x01410f90 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define MARVELL_PHY_FAMILY_ID(id) ((id) >> 4) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* struct phy_device dev_flags definitions */ 38*4882a593Smuzhiyun #define MARVELL_PHY_M1145_FLAGS_RESISTANCE 0x00000001 39*4882a593Smuzhiyun #define MARVELL_PHY_M1118_DNS323_LEDS 0x00000002 40*4882a593Smuzhiyun #define MARVELL_PHY_LED0_LINK_LED1_ACTIVE 0x00000004 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #endif /* _MARVELL_PHY_H */ 43