1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2019 Texas Instruments 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _LINUX_IRQ_DAVINCI_AINTC_ 7*4882a593Smuzhiyun #define _LINUX_IRQ_DAVINCI_AINTC_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/ioport.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /** 12*4882a593Smuzhiyun * struct davinci_aintc_config - configuration data for davinci-aintc driver. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * @reg: register range to map 15*4882a593Smuzhiyun * @num_irqs: number of HW interrupts supported by the controller 16*4882a593Smuzhiyun * @prios: an array of size num_irqs containing priority settings for 17*4882a593Smuzhiyun * each interrupt 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun struct davinci_aintc_config { 20*4882a593Smuzhiyun struct resource reg; 21*4882a593Smuzhiyun unsigned int num_irqs; 22*4882a593Smuzhiyun u8 *prios; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun void davinci_aintc_init(const struct davinci_aintc_config *config); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ 28