1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/linux/irqchip/arm-gic-common.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016 ARM Limited, All Rights Reserved. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef __LINUX_IRQCHIP_ARM_GIC_COMMON_H 8*4882a593Smuzhiyun #define __LINUX_IRQCHIP_ARM_GIC_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun #include <linux/ioport.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define GICD_INT_DEF_PRI 0xa0 14*4882a593Smuzhiyun #define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\ 15*4882a593Smuzhiyun (GICD_INT_DEF_PRI << 16) |\ 16*4882a593Smuzhiyun (GICD_INT_DEF_PRI << 8) |\ 17*4882a593Smuzhiyun GICD_INT_DEF_PRI) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun enum gic_type { 20*4882a593Smuzhiyun GIC_V2, 21*4882a593Smuzhiyun GIC_V3, 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun struct gic_kvm_info { 25*4882a593Smuzhiyun /* GIC type */ 26*4882a593Smuzhiyun enum gic_type type; 27*4882a593Smuzhiyun /* Virtual CPU interface */ 28*4882a593Smuzhiyun struct resource vcpu; 29*4882a593Smuzhiyun /* Interrupt number */ 30*4882a593Smuzhiyun unsigned int maint_irq; 31*4882a593Smuzhiyun /* Virtual control interface */ 32*4882a593Smuzhiyun struct resource vctrl; 33*4882a593Smuzhiyun /* vlpi support */ 34*4882a593Smuzhiyun bool has_v4; 35*4882a593Smuzhiyun /* rvpeid support */ 36*4882a593Smuzhiyun bool has_v4_1; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun const struct gic_kvm_info *gic_get_kvm_info(void); 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun struct irq_domain; 42*4882a593Smuzhiyun struct fwnode_handle; 43*4882a593Smuzhiyun int gicv2m_init(struct fwnode_handle *parent_handle, 44*4882a593Smuzhiyun struct irq_domain *parent); 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */ 47