1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * itg3200.h -- support InvenSense ITG3200 4*4882a593Smuzhiyun * Digital 3-Axis Gyroscope driver 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (c) 2011 Christian Strobel <christian.strobel@iis.fraunhofer.de> 7*4882a593Smuzhiyun * Copyright (c) 2011 Manuel Stahl <manuel.stahl@iis.fraunhofer.de> 8*4882a593Smuzhiyun * Copyright (c) 2012 Thorsten Nowak <thorsten.nowak@iis.fraunhofer.de> 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef I2C_ITG3200_H_ 12*4882a593Smuzhiyun #define I2C_ITG3200_H_ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <linux/iio/iio.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* Register with I2C address (34h) */ 17*4882a593Smuzhiyun #define ITG3200_REG_ADDRESS 0x00 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Sample rate divider 20*4882a593Smuzhiyun * Range: 0 to 255 21*4882a593Smuzhiyun * Default value: 0x00 */ 22*4882a593Smuzhiyun #define ITG3200_REG_SAMPLE_RATE_DIV 0x15 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun /* Digital low pass filter settings */ 25*4882a593Smuzhiyun #define ITG3200_REG_DLPF 0x16 26*4882a593Smuzhiyun /* DLPF full scale range */ 27*4882a593Smuzhiyun #define ITG3200_DLPF_FS_SEL_2000 0x18 28*4882a593Smuzhiyun /* Bandwidth (Hz) and internal sample rate 29*4882a593Smuzhiyun * (kHz) of DLPF */ 30*4882a593Smuzhiyun #define ITG3200_DLPF_256_8 0x00 31*4882a593Smuzhiyun #define ITG3200_DLPF_188_1 0x01 32*4882a593Smuzhiyun #define ITG3200_DLPF_98_1 0x02 33*4882a593Smuzhiyun #define ITG3200_DLPF_42_1 0x03 34*4882a593Smuzhiyun #define ITG3200_DLPF_20_1 0x04 35*4882a593Smuzhiyun #define ITG3200_DLPF_10_1 0x05 36*4882a593Smuzhiyun #define ITG3200_DLPF_5_1 0x06 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define ITG3200_DLPF_CFG_MASK 0x07 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* Configuration for interrupt operations */ 41*4882a593Smuzhiyun #define ITG3200_REG_IRQ_CONFIG 0x17 42*4882a593Smuzhiyun /* Logic level */ 43*4882a593Smuzhiyun #define ITG3200_IRQ_ACTIVE_LOW 0x80 44*4882a593Smuzhiyun #define ITG3200_IRQ_ACTIVE_HIGH 0x00 45*4882a593Smuzhiyun /* Drive type */ 46*4882a593Smuzhiyun #define ITG3200_IRQ_OPEN_DRAIN 0x40 47*4882a593Smuzhiyun #define ITG3200_IRQ_PUSH_PULL 0x00 48*4882a593Smuzhiyun /* Latch mode */ 49*4882a593Smuzhiyun #define ITG3200_IRQ_LATCH_UNTIL_CLEARED 0x20 50*4882a593Smuzhiyun #define ITG3200_IRQ_LATCH_50US_PULSE 0x00 51*4882a593Smuzhiyun /* Latch clear method */ 52*4882a593Smuzhiyun #define ITG3200_IRQ_LATCH_CLEAR_ANY 0x10 53*4882a593Smuzhiyun #define ITG3200_IRQ_LATCH_CLEAR_STATUS 0x00 54*4882a593Smuzhiyun /* Enable interrupt when device is ready */ 55*4882a593Smuzhiyun #define ITG3200_IRQ_DEVICE_RDY_ENABLE 0x04 56*4882a593Smuzhiyun /* Enable interrupt when data is available */ 57*4882a593Smuzhiyun #define ITG3200_IRQ_DATA_RDY_ENABLE 0x01 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Determine the status of ITG-3200 interrupts */ 60*4882a593Smuzhiyun #define ITG3200_REG_IRQ_STATUS 0x1A 61*4882a593Smuzhiyun /* Status of 'device is ready'-interrupt */ 62*4882a593Smuzhiyun #define ITG3200_IRQ_DEVICE_RDY_STATUS 0x04 63*4882a593Smuzhiyun /* Status of 'data is available'-interrupt */ 64*4882a593Smuzhiyun #define ITG3200_IRQ_DATA_RDY_STATUS 0x01 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* Sensor registers */ 67*4882a593Smuzhiyun #define ITG3200_REG_TEMP_OUT_H 0x1B 68*4882a593Smuzhiyun #define ITG3200_REG_TEMP_OUT_L 0x1C 69*4882a593Smuzhiyun #define ITG3200_REG_GYRO_XOUT_H 0x1D 70*4882a593Smuzhiyun #define ITG3200_REG_GYRO_XOUT_L 0x1E 71*4882a593Smuzhiyun #define ITG3200_REG_GYRO_YOUT_H 0x1F 72*4882a593Smuzhiyun #define ITG3200_REG_GYRO_YOUT_L 0x20 73*4882a593Smuzhiyun #define ITG3200_REG_GYRO_ZOUT_H 0x21 74*4882a593Smuzhiyun #define ITG3200_REG_GYRO_ZOUT_L 0x22 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* Power management */ 77*4882a593Smuzhiyun #define ITG3200_REG_POWER_MANAGEMENT 0x3E 78*4882a593Smuzhiyun /* Reset device and internal registers to the 79*4882a593Smuzhiyun * power-up-default settings */ 80*4882a593Smuzhiyun #define ITG3200_RESET 0x80 81*4882a593Smuzhiyun /* Enable low power sleep mode */ 82*4882a593Smuzhiyun #define ITG3200_SLEEP 0x40 83*4882a593Smuzhiyun /* Put according gyroscope in standby mode */ 84*4882a593Smuzhiyun #define ITG3200_STANDBY_GYRO_X 0x20 85*4882a593Smuzhiyun #define ITG3200_STANDBY_GYRO_Y 0x10 86*4882a593Smuzhiyun #define ITG3200_STANDBY_GYRO_Z 0x08 87*4882a593Smuzhiyun /* Determine the device clock source */ 88*4882a593Smuzhiyun #define ITG3200_CLK_INTERNAL 0x00 89*4882a593Smuzhiyun #define ITG3200_CLK_GYRO_X 0x01 90*4882a593Smuzhiyun #define ITG3200_CLK_GYRO_Y 0x02 91*4882a593Smuzhiyun #define ITG3200_CLK_GYRO_Z 0x03 92*4882a593Smuzhiyun #define ITG3200_CLK_EXT_32K 0x04 93*4882a593Smuzhiyun #define ITG3200_CLK_EXT_19M 0x05 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun /** 97*4882a593Smuzhiyun * struct itg3200 - device instance specific data 98*4882a593Smuzhiyun * @i2c: actual i2c_client 99*4882a593Smuzhiyun * @trig: data ready trigger from itg3200 pin 100*4882a593Smuzhiyun **/ 101*4882a593Smuzhiyun struct itg3200 { 102*4882a593Smuzhiyun struct i2c_client *i2c; 103*4882a593Smuzhiyun struct iio_trigger *trig; 104*4882a593Smuzhiyun struct iio_mount_matrix orientation; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun enum ITG3200_SCAN_INDEX { 108*4882a593Smuzhiyun ITG3200_SCAN_TEMP, 109*4882a593Smuzhiyun ITG3200_SCAN_GYRO_X, 110*4882a593Smuzhiyun ITG3200_SCAN_GYRO_Y, 111*4882a593Smuzhiyun ITG3200_SCAN_GYRO_Z, 112*4882a593Smuzhiyun ITG3200_SCAN_ELEMENTS, 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun int itg3200_write_reg_8(struct iio_dev *indio_dev, 116*4882a593Smuzhiyun u8 reg_address, u8 val); 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun int itg3200_read_reg_8(struct iio_dev *indio_dev, 119*4882a593Smuzhiyun u8 reg_address, u8 *val); 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun #ifdef CONFIG_IIO_BUFFER 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun void itg3200_remove_trigger(struct iio_dev *indio_dev); 125*4882a593Smuzhiyun int itg3200_probe_trigger(struct iio_dev *indio_dev); 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun int itg3200_buffer_configure(struct iio_dev *indio_dev); 128*4882a593Smuzhiyun void itg3200_buffer_unconfigure(struct iio_dev *indio_dev); 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #else /* CONFIG_IIO_BUFFER */ 131*4882a593Smuzhiyun itg3200_remove_trigger(struct iio_dev * indio_dev)132*4882a593Smuzhiyunstatic inline void itg3200_remove_trigger(struct iio_dev *indio_dev) 133*4882a593Smuzhiyun { 134*4882a593Smuzhiyun } 135*4882a593Smuzhiyun itg3200_probe_trigger(struct iio_dev * indio_dev)136*4882a593Smuzhiyunstatic inline int itg3200_probe_trigger(struct iio_dev *indio_dev) 137*4882a593Smuzhiyun { 138*4882a593Smuzhiyun return 0; 139*4882a593Smuzhiyun } 140*4882a593Smuzhiyun itg3200_buffer_configure(struct iio_dev * indio_dev)141*4882a593Smuzhiyunstatic inline int itg3200_buffer_configure(struct iio_dev *indio_dev) 142*4882a593Smuzhiyun { 143*4882a593Smuzhiyun return 0; 144*4882a593Smuzhiyun } 145*4882a593Smuzhiyun itg3200_buffer_unconfigure(struct iio_dev * indio_dev)146*4882a593Smuzhiyunstatic inline void itg3200_buffer_unconfigure(struct iio_dev *indio_dev) 147*4882a593Smuzhiyun { 148*4882a593Smuzhiyun } 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun #endif /* CONFIG_IIO_BUFFER */ 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun #endif /* ITG3200_H_ */ 153