1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Analog Devices Generic AXI ADC IP core driver/library 4*4882a593Smuzhiyun * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright 2012-2020 Analog Devices Inc. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __ADI_AXI_ADC_H__ 9*4882a593Smuzhiyun #define __ADI_AXI_ADC_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct device; 12*4882a593Smuzhiyun struct iio_chan_spec; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /** 15*4882a593Smuzhiyun * struct adi_axi_adc_chip_info - Chip specific information 16*4882a593Smuzhiyun * @name Chip name 17*4882a593Smuzhiyun * @id Chip ID (usually product ID) 18*4882a593Smuzhiyun * @channels Channel specifications of type @struct axi_adc_chan_spec 19*4882a593Smuzhiyun * @num_channels Number of @channels 20*4882a593Smuzhiyun * @scale_table Supported scales by the chip; tuples of 2 ints 21*4882a593Smuzhiyun * @num_scales Number of scales in the table 22*4882a593Smuzhiyun * @max_rate Maximum sampling rate supported by the device 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun struct adi_axi_adc_chip_info { 25*4882a593Smuzhiyun const char *name; 26*4882a593Smuzhiyun unsigned int id; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun const struct iio_chan_spec *channels; 29*4882a593Smuzhiyun unsigned int num_channels; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun const unsigned int (*scale_table)[2]; 32*4882a593Smuzhiyun int num_scales; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun unsigned long max_rate; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /** 38*4882a593Smuzhiyun * struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC 39*4882a593Smuzhiyun * @chip_info chip info details for the client ADC 40*4882a593Smuzhiyun * @preenable_setup op to run in the client before enabling the AXI ADC 41*4882a593Smuzhiyun * @reg_access IIO debugfs_reg_access hook for the client ADC 42*4882a593Smuzhiyun * @read_raw IIO read_raw hook for the client ADC 43*4882a593Smuzhiyun * @write_raw IIO write_raw hook for the client ADC 44*4882a593Smuzhiyun */ 45*4882a593Smuzhiyun struct adi_axi_adc_conv { 46*4882a593Smuzhiyun const struct adi_axi_adc_chip_info *chip_info; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun int (*preenable_setup)(struct adi_axi_adc_conv *conv); 49*4882a593Smuzhiyun int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg, 50*4882a593Smuzhiyun unsigned int writeval, unsigned int *readval); 51*4882a593Smuzhiyun int (*read_raw)(struct adi_axi_adc_conv *conv, 52*4882a593Smuzhiyun struct iio_chan_spec const *chan, 53*4882a593Smuzhiyun int *val, int *val2, long mask); 54*4882a593Smuzhiyun int (*write_raw)(struct adi_axi_adc_conv *conv, 55*4882a593Smuzhiyun struct iio_chan_spec const *chan, 56*4882a593Smuzhiyun int val, int val2, long mask); 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, 60*4882a593Smuzhiyun size_t sizeof_priv); 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv); 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #endif 65