1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2018 Cadence Design Systems Inc.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef I3C_MASTER_H
9*4882a593Smuzhiyun #define I3C_MASTER_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/bitsperlong.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/bitops.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/i3c/ccc.h>
16*4882a593Smuzhiyun #include <linux/i3c/device.h>
17*4882a593Smuzhiyun #include <linux/rwsem.h>
18*4882a593Smuzhiyun #include <linux/spinlock.h>
19*4882a593Smuzhiyun #include <linux/workqueue.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define I3C_HOT_JOIN_ADDR 0x2
22*4882a593Smuzhiyun #define I3C_BROADCAST_ADDR 0x7e
23*4882a593Smuzhiyun #define I3C_MAX_ADDR GENMASK(6, 0)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct i3c_master_controller;
26*4882a593Smuzhiyun struct i3c_bus;
27*4882a593Smuzhiyun struct i2c_device;
28*4882a593Smuzhiyun struct i3c_device;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /**
31*4882a593Smuzhiyun * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
32*4882a593Smuzhiyun * @node: node element used to insert the slot into the I2C or I3C device
33*4882a593Smuzhiyun * list
34*4882a593Smuzhiyun * @master: I3C master that instantiated this device. Will be used to do
35*4882a593Smuzhiyun * I2C/I3C transfers
36*4882a593Smuzhiyun * @master_priv: master private data assigned to the device. Can be used to
37*4882a593Smuzhiyun * add master specific information
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * This structure is describing common I3C/I2C dev information.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun struct i3c_i2c_dev_desc {
42*4882a593Smuzhiyun struct list_head node;
43*4882a593Smuzhiyun struct i3c_master_controller *master;
44*4882a593Smuzhiyun void *master_priv;
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
48*4882a593Smuzhiyun #define I3C_LVR_I2C_INDEX(x) ((x) << 5)
49*4882a593Smuzhiyun #define I3C_LVR_I2C_FM_MODE BIT(4)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define I2C_MAX_ADDR GENMASK(6, 0)
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /**
54*4882a593Smuzhiyun * struct i2c_dev_boardinfo - I2C device board information
55*4882a593Smuzhiyun * @node: used to insert the boardinfo object in the I2C boardinfo list
56*4882a593Smuzhiyun * @base: regular I2C board information
57*4882a593Smuzhiyun * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
58*4882a593Smuzhiyun * the I2C device limitations
59*4882a593Smuzhiyun *
60*4882a593Smuzhiyun * This structure is used to attach board-level information to an I2C device.
61*4882a593Smuzhiyun * Each I2C device connected on the I3C bus should have one.
62*4882a593Smuzhiyun */
63*4882a593Smuzhiyun struct i2c_dev_boardinfo {
64*4882a593Smuzhiyun struct list_head node;
65*4882a593Smuzhiyun struct i2c_board_info base;
66*4882a593Smuzhiyun u8 lvr;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /**
70*4882a593Smuzhiyun * struct i2c_dev_desc - I2C device descriptor
71*4882a593Smuzhiyun * @common: common part of the I2C device descriptor
72*4882a593Smuzhiyun * @boardinfo: pointer to the boardinfo attached to this I2C device
73*4882a593Smuzhiyun * @dev: I2C device object registered to the I2C framework
74*4882a593Smuzhiyun * @addr: I2C device address
75*4882a593Smuzhiyun * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
76*4882a593Smuzhiyun * the I2C device limitations
77*4882a593Smuzhiyun *
78*4882a593Smuzhiyun * Each I2C device connected on the bus will have an i2c_dev_desc.
79*4882a593Smuzhiyun * This object is created by the core and later attached to the controller
80*4882a593Smuzhiyun * using &struct_i3c_master_controller->ops->attach_i2c_dev().
81*4882a593Smuzhiyun *
82*4882a593Smuzhiyun * &struct_i2c_dev_desc is the internal representation of an I2C device
83*4882a593Smuzhiyun * connected on an I3C bus. This object is also passed to all
84*4882a593Smuzhiyun * &struct_i3c_master_controller_ops hooks.
85*4882a593Smuzhiyun */
86*4882a593Smuzhiyun struct i2c_dev_desc {
87*4882a593Smuzhiyun struct i3c_i2c_dev_desc common;
88*4882a593Smuzhiyun const struct i2c_dev_boardinfo *boardinfo;
89*4882a593Smuzhiyun struct i2c_client *dev;
90*4882a593Smuzhiyun u16 addr;
91*4882a593Smuzhiyun u8 lvr;
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /**
95*4882a593Smuzhiyun * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
96*4882a593Smuzhiyun * @work: work associated to this slot. The IBI handler will be called from
97*4882a593Smuzhiyun * there
98*4882a593Smuzhiyun * @dev: the I3C device that has generated this IBI
99*4882a593Smuzhiyun * @len: length of the payload associated to this IBI
100*4882a593Smuzhiyun * @data: payload buffer
101*4882a593Smuzhiyun *
102*4882a593Smuzhiyun * An IBI slot is an object pre-allocated by the controller and used when an
103*4882a593Smuzhiyun * IBI comes in.
104*4882a593Smuzhiyun * Every time an IBI comes in, the I3C master driver should find a free IBI
105*4882a593Smuzhiyun * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
106*4882a593Smuzhiyun * i3c_master_queue_ibi().
107*4882a593Smuzhiyun *
108*4882a593Smuzhiyun * How IBI slots are allocated is left to the I3C master driver, though, for
109*4882a593Smuzhiyun * simple kmalloc-based allocation, the generic IBI slot pool can be used.
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun struct i3c_ibi_slot {
112*4882a593Smuzhiyun struct work_struct work;
113*4882a593Smuzhiyun struct i3c_dev_desc *dev;
114*4882a593Smuzhiyun unsigned int len;
115*4882a593Smuzhiyun void *data;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /**
119*4882a593Smuzhiyun * struct i3c_device_ibi_info - IBI information attached to a specific device
120*4882a593Smuzhiyun * @all_ibis_handled: used to be informed when no more IBIs are waiting to be
121*4882a593Smuzhiyun * processed. Used by i3c_device_disable_ibi() to wait for
122*4882a593Smuzhiyun * all IBIs to be dequeued
123*4882a593Smuzhiyun * @pending_ibis: count the number of pending IBIs. Each pending IBI has its
124*4882a593Smuzhiyun * work element queued to the controller workqueue
125*4882a593Smuzhiyun * @max_payload_len: maximum payload length for an IBI coming from this device.
126*4882a593Smuzhiyun * this value is specified when calling
127*4882a593Smuzhiyun * i3c_device_request_ibi() and should not change at run
128*4882a593Smuzhiyun * time. All messages IBIs exceeding this limit should be
129*4882a593Smuzhiyun * rejected by the master
130*4882a593Smuzhiyun * @num_slots: number of IBI slots reserved for this device
131*4882a593Smuzhiyun * @enabled: reflect the IBI status
132*4882a593Smuzhiyun * @handler: IBI handler specified at i3c_device_request_ibi() call time. This
133*4882a593Smuzhiyun * handler will be called from the controller workqueue, and as such
134*4882a593Smuzhiyun * is allowed to sleep (though it is recommended to process the IBI
135*4882a593Smuzhiyun * as fast as possible to not stall processing of other IBIs queued
136*4882a593Smuzhiyun * on the same workqueue).
137*4882a593Smuzhiyun * New I3C messages can be sent from the IBI handler
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * The &struct_i3c_device_ibi_info object is allocated when
140*4882a593Smuzhiyun * i3c_device_request_ibi() is called and attached to a specific device. This
141*4882a593Smuzhiyun * object is here to manage IBIs coming from a specific I3C device.
142*4882a593Smuzhiyun *
143*4882a593Smuzhiyun * Note that this structure is the generic view of the IBI management
144*4882a593Smuzhiyun * infrastructure. I3C master drivers may have their own internal
145*4882a593Smuzhiyun * representation which they can associate to the device using
146*4882a593Smuzhiyun * controller-private data.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun struct i3c_device_ibi_info {
149*4882a593Smuzhiyun struct completion all_ibis_handled;
150*4882a593Smuzhiyun atomic_t pending_ibis;
151*4882a593Smuzhiyun unsigned int max_payload_len;
152*4882a593Smuzhiyun unsigned int num_slots;
153*4882a593Smuzhiyun unsigned int enabled;
154*4882a593Smuzhiyun void (*handler)(struct i3c_device *dev,
155*4882a593Smuzhiyun const struct i3c_ibi_payload *payload);
156*4882a593Smuzhiyun };
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /**
159*4882a593Smuzhiyun * struct i3c_dev_boardinfo - I3C device board information
160*4882a593Smuzhiyun * @node: used to insert the boardinfo object in the I3C boardinfo list
161*4882a593Smuzhiyun * @init_dyn_addr: initial dynamic address requested by the FW. We provide no
162*4882a593Smuzhiyun * guarantee that the device will end up using this address,
163*4882a593Smuzhiyun * but try our best to assign this specific address to the
164*4882a593Smuzhiyun * device
165*4882a593Smuzhiyun * @static_addr: static address the I3C device listen on before it's been
166*4882a593Smuzhiyun * assigned a dynamic address by the master. Will be used during
167*4882a593Smuzhiyun * bus initialization to assign it a specific dynamic address
168*4882a593Smuzhiyun * before starting DAA (Dynamic Address Assignment)
169*4882a593Smuzhiyun * @pid: I3C Provisional ID exposed by the device. This is a unique identifier
170*4882a593Smuzhiyun * that may be used to attach boardinfo to i3c_dev_desc when the device
171*4882a593Smuzhiyun * does not have a static address
172*4882a593Smuzhiyun * @of_node: optional DT node in case the device has been described in the DT
173*4882a593Smuzhiyun *
174*4882a593Smuzhiyun * This structure is used to attach board-level information to an I3C device.
175*4882a593Smuzhiyun * Not all I3C devices connected on the bus will have a boardinfo. It's only
176*4882a593Smuzhiyun * needed if you want to attach extra resources to a device or assign it a
177*4882a593Smuzhiyun * specific dynamic address.
178*4882a593Smuzhiyun */
179*4882a593Smuzhiyun struct i3c_dev_boardinfo {
180*4882a593Smuzhiyun struct list_head node;
181*4882a593Smuzhiyun u8 init_dyn_addr;
182*4882a593Smuzhiyun u8 static_addr;
183*4882a593Smuzhiyun u64 pid;
184*4882a593Smuzhiyun struct device_node *of_node;
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /**
188*4882a593Smuzhiyun * struct i3c_dev_desc - I3C device descriptor
189*4882a593Smuzhiyun * @common: common part of the I3C device descriptor
190*4882a593Smuzhiyun * @info: I3C device information. Will be automatically filled when you create
191*4882a593Smuzhiyun * your device with i3c_master_add_i3c_dev_locked()
192*4882a593Smuzhiyun * @ibi_lock: lock used to protect the &struct_i3c_device->ibi
193*4882a593Smuzhiyun * @ibi: IBI info attached to a device. Should be NULL until
194*4882a593Smuzhiyun * i3c_device_request_ibi() is called
195*4882a593Smuzhiyun * @dev: pointer to the I3C device object exposed to I3C device drivers. This
196*4882a593Smuzhiyun * should never be accessed from I3C master controller drivers. Only core
197*4882a593Smuzhiyun * code should manipulate it in when updating the dev <-> desc link or
198*4882a593Smuzhiyun * when propagating IBI events to the driver
199*4882a593Smuzhiyun * @boardinfo: pointer to the boardinfo attached to this I3C device
200*4882a593Smuzhiyun *
201*4882a593Smuzhiyun * Internal representation of an I3C device. This object is only used by the
202*4882a593Smuzhiyun * core and passed to I3C master controller drivers when they're requested to
203*4882a593Smuzhiyun * do some operations on the device.
204*4882a593Smuzhiyun * The core maintains the link between the internal I3C dev descriptor and the
205*4882a593Smuzhiyun * object exposed to the I3C device drivers (&struct_i3c_device).
206*4882a593Smuzhiyun */
207*4882a593Smuzhiyun struct i3c_dev_desc {
208*4882a593Smuzhiyun struct i3c_i2c_dev_desc common;
209*4882a593Smuzhiyun struct i3c_device_info info;
210*4882a593Smuzhiyun struct mutex ibi_lock;
211*4882a593Smuzhiyun struct i3c_device_ibi_info *ibi;
212*4882a593Smuzhiyun struct i3c_device *dev;
213*4882a593Smuzhiyun const struct i3c_dev_boardinfo *boardinfo;
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /**
217*4882a593Smuzhiyun * struct i3c_device - I3C device object
218*4882a593Smuzhiyun * @dev: device object to register the I3C dev to the device model
219*4882a593Smuzhiyun * @desc: pointer to an i3c device descriptor object. This link is updated
220*4882a593Smuzhiyun * every time the I3C device is rediscovered with a different dynamic
221*4882a593Smuzhiyun * address assigned
222*4882a593Smuzhiyun * @bus: I3C bus this device is attached to
223*4882a593Smuzhiyun *
224*4882a593Smuzhiyun * I3C device object exposed to I3C device drivers. The takes care of linking
225*4882a593Smuzhiyun * this object to the relevant &struct_i3c_dev_desc one.
226*4882a593Smuzhiyun * All I3C devs on the I3C bus are represented, including I3C masters. For each
227*4882a593Smuzhiyun * of them, we have an instance of &struct i3c_device.
228*4882a593Smuzhiyun */
229*4882a593Smuzhiyun struct i3c_device {
230*4882a593Smuzhiyun struct device dev;
231*4882a593Smuzhiyun struct i3c_dev_desc *desc;
232*4882a593Smuzhiyun struct i3c_bus *bus;
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /*
236*4882a593Smuzhiyun * The I3C specification says the maximum number of devices connected on the
237*4882a593Smuzhiyun * bus is 11, but this number depends on external parameters like trace length,
238*4882a593Smuzhiyun * capacitive load per Device, and the types of Devices present on the Bus.
239*4882a593Smuzhiyun * I3C master can also have limitations, so this number is just here as a
240*4882a593Smuzhiyun * reference and should be adjusted on a per-controller/per-board basis.
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun #define I3C_BUS_MAX_DEVS 11
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #define I3C_BUS_MAX_I3C_SCL_RATE 12900000
245*4882a593Smuzhiyun #define I3C_BUS_TYP_I3C_SCL_RATE 12500000
246*4882a593Smuzhiyun #define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000
247*4882a593Smuzhiyun #define I3C_BUS_I2C_FM_SCL_RATE 400000
248*4882a593Smuzhiyun #define I3C_BUS_TLOW_OD_MIN_NS 200
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /**
251*4882a593Smuzhiyun * enum i3c_bus_mode - I3C bus mode
252*4882a593Smuzhiyun * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation
253*4882a593Smuzhiyun * expected
254*4882a593Smuzhiyun * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on
255*4882a593Smuzhiyun * the bus. The only impact in this mode is that the
256*4882a593Smuzhiyun * high SCL pulse has to stay below 50ns to trick I2C
257*4882a593Smuzhiyun * devices when transmitting I3C frames
258*4882a593Smuzhiyun * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
259*4882a593Smuzhiyun * present on the bus. However they allow
260*4882a593Smuzhiyun * compliance up to the maximum SDR SCL clock
261*4882a593Smuzhiyun * frequency.
262*4882a593Smuzhiyun * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
263*4882a593Smuzhiyun * on the bus
264*4882a593Smuzhiyun */
265*4882a593Smuzhiyun enum i3c_bus_mode {
266*4882a593Smuzhiyun I3C_BUS_MODE_PURE,
267*4882a593Smuzhiyun I3C_BUS_MODE_MIXED_FAST,
268*4882a593Smuzhiyun I3C_BUS_MODE_MIXED_LIMITED,
269*4882a593Smuzhiyun I3C_BUS_MODE_MIXED_SLOW,
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /**
273*4882a593Smuzhiyun * enum i3c_addr_slot_status - I3C address slot status
274*4882a593Smuzhiyun * @I3C_ADDR_SLOT_FREE: address is free
275*4882a593Smuzhiyun * @I3C_ADDR_SLOT_RSVD: address is reserved
276*4882a593Smuzhiyun * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device
277*4882a593Smuzhiyun * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device
278*4882a593Smuzhiyun * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask
279*4882a593Smuzhiyun *
280*4882a593Smuzhiyun * On an I3C bus, addresses are assigned dynamically, and we need to know which
281*4882a593Smuzhiyun * addresses are free to use and which ones are already assigned.
282*4882a593Smuzhiyun *
283*4882a593Smuzhiyun * Addresses marked as reserved are those reserved by the I3C protocol
284*4882a593Smuzhiyun * (broadcast address, ...).
285*4882a593Smuzhiyun */
286*4882a593Smuzhiyun enum i3c_addr_slot_status {
287*4882a593Smuzhiyun I3C_ADDR_SLOT_FREE,
288*4882a593Smuzhiyun I3C_ADDR_SLOT_RSVD,
289*4882a593Smuzhiyun I3C_ADDR_SLOT_I2C_DEV,
290*4882a593Smuzhiyun I3C_ADDR_SLOT_I3C_DEV,
291*4882a593Smuzhiyun I3C_ADDR_SLOT_STATUS_MASK = 3,
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun /**
295*4882a593Smuzhiyun * struct i3c_bus - I3C bus object
296*4882a593Smuzhiyun * @cur_master: I3C master currently driving the bus. Since I3C is multi-master
297*4882a593Smuzhiyun * this can change over the time. Will be used to let a master
298*4882a593Smuzhiyun * know whether it needs to request bus ownership before sending
299*4882a593Smuzhiyun * a frame or not
300*4882a593Smuzhiyun * @id: bus ID. Assigned by the framework when register the bus
301*4882a593Smuzhiyun * @addrslots: a bitmap with 2-bits per-slot to encode the address status and
302*4882a593Smuzhiyun * ease the DAA (Dynamic Address Assignment) procedure (see
303*4882a593Smuzhiyun * &enum i3c_addr_slot_status)
304*4882a593Smuzhiyun * @mode: bus mode (see &enum i3c_bus_mode)
305*4882a593Smuzhiyun * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv
306*4882a593Smuzhiyun * transfers
307*4882a593Smuzhiyun * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers
308*4882a593Smuzhiyun * @scl_rate: SCL signal rate for I3C and I2C mode
309*4882a593Smuzhiyun * @devs.i3c: contains a list of I3C device descriptors representing I3C
310*4882a593Smuzhiyun * devices connected on the bus and successfully attached to the
311*4882a593Smuzhiyun * I3C master
312*4882a593Smuzhiyun * @devs.i2c: contains a list of I2C device descriptors representing I2C
313*4882a593Smuzhiyun * devices connected on the bus and successfully attached to the
314*4882a593Smuzhiyun * I3C master
315*4882a593Smuzhiyun * @devs: 2 lists containing all I3C/I2C devices connected to the bus
316*4882a593Smuzhiyun * @lock: read/write lock on the bus. This is needed to protect against
317*4882a593Smuzhiyun * operations that have an impact on the whole bus and the devices
318*4882a593Smuzhiyun * connected to it. For example, when asking slaves to drop their
319*4882a593Smuzhiyun * dynamic address (RSTDAA CCC), we need to make sure no one is trying
320*4882a593Smuzhiyun * to send I3C frames to these devices.
321*4882a593Smuzhiyun * Note that this lock does not protect against concurrency between
322*4882a593Smuzhiyun * devices: several drivers can send different I3C/I2C frames through
323*4882a593Smuzhiyun * the same master in parallel. This is the responsibility of the
324*4882a593Smuzhiyun * master to guarantee that frames are actually sent sequentially and
325*4882a593Smuzhiyun * not interlaced
326*4882a593Smuzhiyun *
327*4882a593Smuzhiyun * The I3C bus is represented with its own object and not implicitly described
328*4882a593Smuzhiyun * by the I3C master to cope with the multi-master functionality, where one bus
329*4882a593Smuzhiyun * can be shared amongst several masters, each of them requesting bus ownership
330*4882a593Smuzhiyun * when they need to.
331*4882a593Smuzhiyun */
332*4882a593Smuzhiyun struct i3c_bus {
333*4882a593Smuzhiyun struct i3c_dev_desc *cur_master;
334*4882a593Smuzhiyun int id;
335*4882a593Smuzhiyun unsigned long addrslots[((I2C_MAX_ADDR + 1) * 2) / BITS_PER_LONG];
336*4882a593Smuzhiyun enum i3c_bus_mode mode;
337*4882a593Smuzhiyun struct {
338*4882a593Smuzhiyun unsigned long i3c;
339*4882a593Smuzhiyun unsigned long i2c;
340*4882a593Smuzhiyun } scl_rate;
341*4882a593Smuzhiyun struct {
342*4882a593Smuzhiyun struct list_head i3c;
343*4882a593Smuzhiyun struct list_head i2c;
344*4882a593Smuzhiyun } devs;
345*4882a593Smuzhiyun struct rw_semaphore lock;
346*4882a593Smuzhiyun };
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /**
349*4882a593Smuzhiyun * struct i3c_master_controller_ops - I3C master methods
350*4882a593Smuzhiyun * @bus_init: hook responsible for the I3C bus initialization. You should at
351*4882a593Smuzhiyun * least call master_set_info() from there and set the bus mode.
352*4882a593Smuzhiyun * You can also put controller specific initialization in there.
353*4882a593Smuzhiyun * This method is mandatory.
354*4882a593Smuzhiyun * @bus_cleanup: cleanup everything done in
355*4882a593Smuzhiyun * &i3c_master_controller_ops->bus_init().
356*4882a593Smuzhiyun * This method is optional.
357*4882a593Smuzhiyun * @attach_i3c_dev: called every time an I3C device is attached to the bus. It
358*4882a593Smuzhiyun * can be after a DAA or when a device is statically declared
359*4882a593Smuzhiyun * by the FW, in which case it will only have a static address
360*4882a593Smuzhiyun * and the dynamic address will be 0.
361*4882a593Smuzhiyun * When this function is called, device information have not
362*4882a593Smuzhiyun * been retrieved yet.
363*4882a593Smuzhiyun * This is a good place to attach master controller specific
364*4882a593Smuzhiyun * data to I3C devices.
365*4882a593Smuzhiyun * This method is optional.
366*4882a593Smuzhiyun * @reattach_i3c_dev: called every time an I3C device has its addressed
367*4882a593Smuzhiyun * changed. It can be because the device has been powered
368*4882a593Smuzhiyun * down and has lost its address, or it can happen when a
369*4882a593Smuzhiyun * device had a static address and has been assigned a
370*4882a593Smuzhiyun * dynamic address with SETDASA.
371*4882a593Smuzhiyun * This method is optional.
372*4882a593Smuzhiyun * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually
373*4882a593Smuzhiyun * happens when the master device is unregistered.
374*4882a593Smuzhiyun * This method is optional.
375*4882a593Smuzhiyun * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure
376*4882a593Smuzhiyun * should send an ENTDAA CCC command and then add all devices
377*4882a593Smuzhiyun * discovered sure the DAA using i3c_master_add_i3c_dev_locked().
378*4882a593Smuzhiyun * Add devices added with i3c_master_add_i3c_dev_locked() will then be
379*4882a593Smuzhiyun * attached or re-attached to the controller.
380*4882a593Smuzhiyun * This method is mandatory.
381*4882a593Smuzhiyun * @supports_ccc_cmd: should return true if the CCC command is supported, false
382*4882a593Smuzhiyun * otherwise.
383*4882a593Smuzhiyun * This method is optional, if not provided the core assumes
384*4882a593Smuzhiyun * all CCC commands are supported.
385*4882a593Smuzhiyun * @send_ccc_cmd: send a CCC command
386*4882a593Smuzhiyun * This method is mandatory.
387*4882a593Smuzhiyun * @priv_xfers: do one or several private I3C SDR transfers
388*4882a593Smuzhiyun * This method is mandatory.
389*4882a593Smuzhiyun * @attach_i2c_dev: called every time an I2C device is attached to the bus.
390*4882a593Smuzhiyun * This is a good place to attach master controller specific
391*4882a593Smuzhiyun * data to I2C devices.
392*4882a593Smuzhiyun * This method is optional.
393*4882a593Smuzhiyun * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually
394*4882a593Smuzhiyun * happens when the master device is unregistered.
395*4882a593Smuzhiyun * This method is optional.
396*4882a593Smuzhiyun * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c
397*4882a593Smuzhiyun * transfers, the core does not guarantee that buffers attached to
398*4882a593Smuzhiyun * the transfers are DMA-safe. If drivers want to have DMA-safe
399*4882a593Smuzhiyun * buffers, they should use the i2c_get_dma_safe_msg_buf()
400*4882a593Smuzhiyun * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C
401*4882a593Smuzhiyun * framework.
402*4882a593Smuzhiyun * This method is mandatory.
403*4882a593Smuzhiyun * @request_ibi: attach an IBI handler to an I3C device. This implies defining
404*4882a593Smuzhiyun * an IBI handler and the constraints of the IBI (maximum payload
405*4882a593Smuzhiyun * length and number of pre-allocated slots).
406*4882a593Smuzhiyun * Some controllers support less IBI-capable devices than regular
407*4882a593Smuzhiyun * devices, so this method might return -%EBUSY if there's no
408*4882a593Smuzhiyun * more space for an extra IBI registration
409*4882a593Smuzhiyun * This method is optional.
410*4882a593Smuzhiyun * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI
411*4882a593Smuzhiyun * should have been disabled with ->disable_irq() prior to that
412*4882a593Smuzhiyun * This method is mandatory only if ->request_ibi is not NULL.
413*4882a593Smuzhiyun * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called
414*4882a593Smuzhiyun * prior to ->enable_ibi(). The controller should first enable
415*4882a593Smuzhiyun * the IBI on the controller end (for example, unmask the hardware
416*4882a593Smuzhiyun * IRQ) and then send the ENEC CCC command (with the IBI flag set)
417*4882a593Smuzhiyun * to the I3C device.
418*4882a593Smuzhiyun * This method is mandatory only if ->request_ibi is not NULL.
419*4882a593Smuzhiyun * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
420*4882a593Smuzhiyun * flag set and then deactivate the hardware IRQ on the
421*4882a593Smuzhiyun * controller end.
422*4882a593Smuzhiyun * This method is mandatory only if ->request_ibi is not NULL.
423*4882a593Smuzhiyun * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been
424*4882a593Smuzhiyun * processed by its handler. The IBI slot should be put back
425*4882a593Smuzhiyun * in the IBI slot pool so that the controller can re-use it
426*4882a593Smuzhiyun * for a future IBI
427*4882a593Smuzhiyun * This method is mandatory only if ->request_ibi is not
428*4882a593Smuzhiyun * NULL.
429*4882a593Smuzhiyun */
430*4882a593Smuzhiyun struct i3c_master_controller_ops {
431*4882a593Smuzhiyun int (*bus_init)(struct i3c_master_controller *master);
432*4882a593Smuzhiyun void (*bus_cleanup)(struct i3c_master_controller *master);
433*4882a593Smuzhiyun int (*attach_i3c_dev)(struct i3c_dev_desc *dev);
434*4882a593Smuzhiyun int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr);
435*4882a593Smuzhiyun void (*detach_i3c_dev)(struct i3c_dev_desc *dev);
436*4882a593Smuzhiyun int (*do_daa)(struct i3c_master_controller *master);
437*4882a593Smuzhiyun bool (*supports_ccc_cmd)(struct i3c_master_controller *master,
438*4882a593Smuzhiyun const struct i3c_ccc_cmd *cmd);
439*4882a593Smuzhiyun int (*send_ccc_cmd)(struct i3c_master_controller *master,
440*4882a593Smuzhiyun struct i3c_ccc_cmd *cmd);
441*4882a593Smuzhiyun int (*priv_xfers)(struct i3c_dev_desc *dev,
442*4882a593Smuzhiyun struct i3c_priv_xfer *xfers,
443*4882a593Smuzhiyun int nxfers);
444*4882a593Smuzhiyun int (*attach_i2c_dev)(struct i2c_dev_desc *dev);
445*4882a593Smuzhiyun void (*detach_i2c_dev)(struct i2c_dev_desc *dev);
446*4882a593Smuzhiyun int (*i2c_xfers)(struct i2c_dev_desc *dev,
447*4882a593Smuzhiyun const struct i2c_msg *xfers, int nxfers);
448*4882a593Smuzhiyun int (*request_ibi)(struct i3c_dev_desc *dev,
449*4882a593Smuzhiyun const struct i3c_ibi_setup *req);
450*4882a593Smuzhiyun void (*free_ibi)(struct i3c_dev_desc *dev);
451*4882a593Smuzhiyun int (*enable_ibi)(struct i3c_dev_desc *dev);
452*4882a593Smuzhiyun int (*disable_ibi)(struct i3c_dev_desc *dev);
453*4882a593Smuzhiyun void (*recycle_ibi_slot)(struct i3c_dev_desc *dev,
454*4882a593Smuzhiyun struct i3c_ibi_slot *slot);
455*4882a593Smuzhiyun };
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /**
458*4882a593Smuzhiyun * struct i3c_master_controller - I3C master controller object
459*4882a593Smuzhiyun * @dev: device to be registered to the device-model
460*4882a593Smuzhiyun * @this: an I3C device object representing this master. This device will be
461*4882a593Smuzhiyun * added to the list of I3C devs available on the bus
462*4882a593Smuzhiyun * @i2c: I2C adapter used for backward compatibility. This adapter is
463*4882a593Smuzhiyun * registered to the I2C subsystem to be as transparent as possible to
464*4882a593Smuzhiyun * existing I2C drivers
465*4882a593Smuzhiyun * @ops: master operations. See &struct i3c_master_controller_ops
466*4882a593Smuzhiyun * @secondary: true if the master is a secondary master
467*4882a593Smuzhiyun * @init_done: true when the bus initialization is done
468*4882a593Smuzhiyun * @boardinfo.i3c: list of I3C boardinfo objects
469*4882a593Smuzhiyun * @boardinfo.i2c: list of I2C boardinfo objects
470*4882a593Smuzhiyun * @boardinfo: board-level information attached to devices connected on the bus
471*4882a593Smuzhiyun * @bus: I3C bus exposed by this master
472*4882a593Smuzhiyun * @wq: workqueue used to execute IBI handlers. Can also be used by master
473*4882a593Smuzhiyun * drivers if they need to postpone operations that need to take place
474*4882a593Smuzhiyun * in a thread context. Typical examples are Hot Join processing which
475*4882a593Smuzhiyun * requires taking the bus lock in maintenance, which in turn, can only
476*4882a593Smuzhiyun * be done from a sleep-able context
477*4882a593Smuzhiyun *
478*4882a593Smuzhiyun * A &struct i3c_master_controller has to be registered to the I3C subsystem
479*4882a593Smuzhiyun * through i3c_master_register(). None of &struct i3c_master_controller fields
480*4882a593Smuzhiyun * should be set manually, just pass appropriate values to
481*4882a593Smuzhiyun * i3c_master_register().
482*4882a593Smuzhiyun */
483*4882a593Smuzhiyun struct i3c_master_controller {
484*4882a593Smuzhiyun struct device dev;
485*4882a593Smuzhiyun struct i3c_dev_desc *this;
486*4882a593Smuzhiyun struct i2c_adapter i2c;
487*4882a593Smuzhiyun const struct i3c_master_controller_ops *ops;
488*4882a593Smuzhiyun unsigned int secondary : 1;
489*4882a593Smuzhiyun unsigned int init_done : 1;
490*4882a593Smuzhiyun struct {
491*4882a593Smuzhiyun struct list_head i3c;
492*4882a593Smuzhiyun struct list_head i2c;
493*4882a593Smuzhiyun } boardinfo;
494*4882a593Smuzhiyun struct i3c_bus bus;
495*4882a593Smuzhiyun struct workqueue_struct *wq;
496*4882a593Smuzhiyun };
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun /**
499*4882a593Smuzhiyun * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus
500*4882a593Smuzhiyun * @bus: the I3C bus
501*4882a593Smuzhiyun * @dev: an I2C device descriptor pointer updated to point to the current slot
502*4882a593Smuzhiyun * at each iteration of the loop
503*4882a593Smuzhiyun *
504*4882a593Smuzhiyun * Iterate over all I2C devs present on the bus.
505*4882a593Smuzhiyun */
506*4882a593Smuzhiyun #define i3c_bus_for_each_i2cdev(bus, dev) \
507*4882a593Smuzhiyun list_for_each_entry(dev, &(bus)->devs.i2c, common.node)
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /**
510*4882a593Smuzhiyun * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus
511*4882a593Smuzhiyun * @bus: the I3C bus
512*4882a593Smuzhiyun * @dev: and I3C device descriptor pointer updated to point to the current slot
513*4882a593Smuzhiyun * at each iteration of the loop
514*4882a593Smuzhiyun *
515*4882a593Smuzhiyun * Iterate over all I3C devs present on the bus.
516*4882a593Smuzhiyun */
517*4882a593Smuzhiyun #define i3c_bus_for_each_i3cdev(bus, dev) \
518*4882a593Smuzhiyun list_for_each_entry(dev, &(bus)->devs.i3c, common.node)
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
521*4882a593Smuzhiyun const struct i2c_msg *xfers,
522*4882a593Smuzhiyun int nxfers);
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
525*4882a593Smuzhiyun u8 evts);
526*4882a593Smuzhiyun int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
527*4882a593Smuzhiyun u8 evts);
528*4882a593Smuzhiyun int i3c_master_entdaa_locked(struct i3c_master_controller *master);
529*4882a593Smuzhiyun int i3c_master_defslvs_locked(struct i3c_master_controller *master);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun int i3c_master_get_free_addr(struct i3c_master_controller *master,
532*4882a593Smuzhiyun u8 start_addr);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
535*4882a593Smuzhiyun u8 addr);
536*4882a593Smuzhiyun int i3c_master_do_daa(struct i3c_master_controller *master);
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun int i3c_master_set_info(struct i3c_master_controller *master,
539*4882a593Smuzhiyun const struct i3c_device_info *info);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun int i3c_master_register(struct i3c_master_controller *master,
542*4882a593Smuzhiyun struct device *parent,
543*4882a593Smuzhiyun const struct i3c_master_controller_ops *ops,
544*4882a593Smuzhiyun bool secondary);
545*4882a593Smuzhiyun int i3c_master_unregister(struct i3c_master_controller *master);
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun /**
548*4882a593Smuzhiyun * i3c_dev_get_master_data() - get master private data attached to an I3C
549*4882a593Smuzhiyun * device descriptor
550*4882a593Smuzhiyun * @dev: the I3C device descriptor to get private data from
551*4882a593Smuzhiyun *
552*4882a593Smuzhiyun * Return: the private data previously attached with i3c_dev_set_master_data()
553*4882a593Smuzhiyun * or NULL if no data has been attached to the device.
554*4882a593Smuzhiyun */
i3c_dev_get_master_data(const struct i3c_dev_desc * dev)555*4882a593Smuzhiyun static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun return dev->common.master_priv;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /**
561*4882a593Smuzhiyun * i3c_dev_set_master_data() - attach master private data to an I3C device
562*4882a593Smuzhiyun * descriptor
563*4882a593Smuzhiyun * @dev: the I3C device descriptor to attach private data to
564*4882a593Smuzhiyun * @data: private data
565*4882a593Smuzhiyun *
566*4882a593Smuzhiyun * This functions allows a master controller to attach per-device private data
567*4882a593Smuzhiyun * which can then be retrieved with i3c_dev_get_master_data().
568*4882a593Smuzhiyun */
i3c_dev_set_master_data(struct i3c_dev_desc * dev,void * data)569*4882a593Smuzhiyun static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev,
570*4882a593Smuzhiyun void *data)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun dev->common.master_priv = data;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /**
576*4882a593Smuzhiyun * i2c_dev_get_master_data() - get master private data attached to an I2C
577*4882a593Smuzhiyun * device descriptor
578*4882a593Smuzhiyun * @dev: the I2C device descriptor to get private data from
579*4882a593Smuzhiyun *
580*4882a593Smuzhiyun * Return: the private data previously attached with i2c_dev_set_master_data()
581*4882a593Smuzhiyun * or NULL if no data has been attached to the device.
582*4882a593Smuzhiyun */
i2c_dev_get_master_data(const struct i2c_dev_desc * dev)583*4882a593Smuzhiyun static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun return dev->common.master_priv;
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /**
589*4882a593Smuzhiyun * i2c_dev_set_master_data() - attach master private data to an I2C device
590*4882a593Smuzhiyun * descriptor
591*4882a593Smuzhiyun * @dev: the I2C device descriptor to attach private data to
592*4882a593Smuzhiyun * @data: private data
593*4882a593Smuzhiyun *
594*4882a593Smuzhiyun * This functions allows a master controller to attach per-device private data
595*4882a593Smuzhiyun * which can then be retrieved with i2c_device_get_master_data().
596*4882a593Smuzhiyun */
i2c_dev_set_master_data(struct i2c_dev_desc * dev,void * data)597*4882a593Smuzhiyun static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev,
598*4882a593Smuzhiyun void *data)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun dev->common.master_priv = data;
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /**
604*4882a593Smuzhiyun * i3c_dev_get_master() - get master used to communicate with a device
605*4882a593Smuzhiyun * @dev: I3C dev
606*4882a593Smuzhiyun *
607*4882a593Smuzhiyun * Return: the master controller driving @dev
608*4882a593Smuzhiyun */
609*4882a593Smuzhiyun static inline struct i3c_master_controller *
i3c_dev_get_master(struct i3c_dev_desc * dev)610*4882a593Smuzhiyun i3c_dev_get_master(struct i3c_dev_desc *dev)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun return dev->common.master;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun /**
616*4882a593Smuzhiyun * i2c_dev_get_master() - get master used to communicate with a device
617*4882a593Smuzhiyun * @dev: I2C dev
618*4882a593Smuzhiyun *
619*4882a593Smuzhiyun * Return: the master controller driving @dev
620*4882a593Smuzhiyun */
621*4882a593Smuzhiyun static inline struct i3c_master_controller *
i2c_dev_get_master(struct i2c_dev_desc * dev)622*4882a593Smuzhiyun i2c_dev_get_master(struct i2c_dev_desc *dev)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun return dev->common.master;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /**
628*4882a593Smuzhiyun * i3c_master_get_bus() - get the bus attached to a master
629*4882a593Smuzhiyun * @master: master object
630*4882a593Smuzhiyun *
631*4882a593Smuzhiyun * Return: the I3C bus @master is connected to
632*4882a593Smuzhiyun */
633*4882a593Smuzhiyun static inline struct i3c_bus *
i3c_master_get_bus(struct i3c_master_controller * master)634*4882a593Smuzhiyun i3c_master_get_bus(struct i3c_master_controller *master)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun return &master->bus;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun struct i3c_generic_ibi_pool;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun struct i3c_generic_ibi_pool *
642*4882a593Smuzhiyun i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
643*4882a593Smuzhiyun const struct i3c_ibi_setup *req);
644*4882a593Smuzhiyun void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun struct i3c_ibi_slot *
647*4882a593Smuzhiyun i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool);
648*4882a593Smuzhiyun void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
649*4882a593Smuzhiyun struct i3c_ibi_slot *slot);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot);
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev);
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun #endif /* I3C_MASTER_H */
656