1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _LINUX_CACHEINFO_H
3*4882a593Smuzhiyun #define _LINUX_CACHEINFO_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/bitops.h>
6*4882a593Smuzhiyun #include <linux/cpu.h>
7*4882a593Smuzhiyun #include <linux/cpumask.h>
8*4882a593Smuzhiyun #include <linux/smp.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun struct device_node;
11*4882a593Smuzhiyun struct attribute;
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun enum cache_type {
14*4882a593Smuzhiyun CACHE_TYPE_NOCACHE = 0,
15*4882a593Smuzhiyun CACHE_TYPE_INST = BIT(0),
16*4882a593Smuzhiyun CACHE_TYPE_DATA = BIT(1),
17*4882a593Smuzhiyun CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA,
18*4882a593Smuzhiyun CACHE_TYPE_UNIFIED = BIT(2),
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun extern unsigned int coherency_max_size;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun * struct cacheinfo - represent a cache leaf node
25*4882a593Smuzhiyun * @id: This cache's id. It is unique among caches with the same (type, level).
26*4882a593Smuzhiyun * @type: type of the cache - data, inst or unified
27*4882a593Smuzhiyun * @level: represents the hierarchy in the multi-level cache
28*4882a593Smuzhiyun * @coherency_line_size: size of each cache line usually representing
29*4882a593Smuzhiyun * the minimum amount of data that gets transferred from memory
30*4882a593Smuzhiyun * @number_of_sets: total number of sets, a set is a collection of cache
31*4882a593Smuzhiyun * lines sharing the same index
32*4882a593Smuzhiyun * @ways_of_associativity: number of ways in which a particular memory
33*4882a593Smuzhiyun * block can be placed in the cache
34*4882a593Smuzhiyun * @physical_line_partition: number of physical cache lines sharing the
35*4882a593Smuzhiyun * same cachetag
36*4882a593Smuzhiyun * @size: Total size of the cache
37*4882a593Smuzhiyun * @shared_cpu_map: logical cpumask representing all the cpus sharing
38*4882a593Smuzhiyun * this cache node
39*4882a593Smuzhiyun * @attributes: bitfield representing various cache attributes
40*4882a593Smuzhiyun * @fw_token: Unique value used to determine if different cacheinfo
41*4882a593Smuzhiyun * structures represent a single hardware cache instance.
42*4882a593Smuzhiyun * @disable_sysfs: indicates whether this node is visible to the user via
43*4882a593Smuzhiyun * sysfs or not
44*4882a593Smuzhiyun * @priv: pointer to any private data structure specific to particular
45*4882a593Smuzhiyun * cache design
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun * While @of_node, @disable_sysfs and @priv are used for internal book
48*4882a593Smuzhiyun * keeping, the remaining members form the core properties of the cache
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun struct cacheinfo {
51*4882a593Smuzhiyun unsigned int id;
52*4882a593Smuzhiyun enum cache_type type;
53*4882a593Smuzhiyun unsigned int level;
54*4882a593Smuzhiyun unsigned int coherency_line_size;
55*4882a593Smuzhiyun unsigned int number_of_sets;
56*4882a593Smuzhiyun unsigned int ways_of_associativity;
57*4882a593Smuzhiyun unsigned int physical_line_partition;
58*4882a593Smuzhiyun unsigned int size;
59*4882a593Smuzhiyun cpumask_t shared_cpu_map;
60*4882a593Smuzhiyun unsigned int attributes;
61*4882a593Smuzhiyun #define CACHE_WRITE_THROUGH BIT(0)
62*4882a593Smuzhiyun #define CACHE_WRITE_BACK BIT(1)
63*4882a593Smuzhiyun #define CACHE_WRITE_POLICY_MASK \
64*4882a593Smuzhiyun (CACHE_WRITE_THROUGH | CACHE_WRITE_BACK)
65*4882a593Smuzhiyun #define CACHE_READ_ALLOCATE BIT(2)
66*4882a593Smuzhiyun #define CACHE_WRITE_ALLOCATE BIT(3)
67*4882a593Smuzhiyun #define CACHE_ALLOCATE_POLICY_MASK \
68*4882a593Smuzhiyun (CACHE_READ_ALLOCATE | CACHE_WRITE_ALLOCATE)
69*4882a593Smuzhiyun #define CACHE_ID BIT(4)
70*4882a593Smuzhiyun void *fw_token;
71*4882a593Smuzhiyun bool disable_sysfs;
72*4882a593Smuzhiyun void *priv;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun struct cpu_cacheinfo {
76*4882a593Smuzhiyun struct cacheinfo *info_list;
77*4882a593Smuzhiyun unsigned int num_levels;
78*4882a593Smuzhiyun unsigned int num_leaves;
79*4882a593Smuzhiyun bool cpu_map_populated;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu);
83*4882a593Smuzhiyun int init_cache_level(unsigned int cpu);
84*4882a593Smuzhiyun int populate_cache_leaves(unsigned int cpu);
85*4882a593Smuzhiyun int cache_setup_acpi(unsigned int cpu);
86*4882a593Smuzhiyun #ifndef CONFIG_ACPI_PPTT
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun * acpi_find_last_cache_level is only called on ACPI enabled
89*4882a593Smuzhiyun * platforms using the PPTT for topology. This means that if
90*4882a593Smuzhiyun * the platform supports other firmware configuration methods
91*4882a593Smuzhiyun * we need to stub out the call when ACPI is disabled.
92*4882a593Smuzhiyun * ACPI enabled platforms not using PPTT won't be making calls
93*4882a593Smuzhiyun * to this function so we need not worry about them.
94*4882a593Smuzhiyun */
acpi_find_last_cache_level(unsigned int cpu)95*4882a593Smuzhiyun static inline int acpi_find_last_cache_level(unsigned int cpu)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun #else
100*4882a593Smuzhiyun int acpi_find_last_cache_level(unsigned int cpu);
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /*
106*4882a593Smuzhiyun * Get the id of the cache associated with @cpu at level @level.
107*4882a593Smuzhiyun * cpuhp lock must be held.
108*4882a593Smuzhiyun */
get_cpu_cacheinfo_id(int cpu,int level)109*4882a593Smuzhiyun static inline int get_cpu_cacheinfo_id(int cpu, int level)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);
112*4882a593Smuzhiyun int i;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun for (i = 0; i < ci->num_leaves; i++) {
115*4882a593Smuzhiyun if (ci->info_list[i].level == level) {
116*4882a593Smuzhiyun if (ci->info_list[i].attributes & CACHE_ID)
117*4882a593Smuzhiyun return ci->info_list[i].id;
118*4882a593Smuzhiyun return -1;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return -1;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #endif /* _LINUX_CACHEINFO_H */
126