xref: /OK3568_Linux_fs/kernel/include/linux/ata.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun  *  Copyright 2003-2004 Red Hat, Inc.  All rights reserved.
5*4882a593Smuzhiyun  *  Copyright 2003-2004 Jeff Garzik
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *  libata documentation is available via 'make {ps|pdf}docs',
8*4882a593Smuzhiyun  *  as Documentation/driver-api/libata.rst
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  *  Hardware documentation available from http://www.t13.org/
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef __LINUX_ATA_H__
14*4882a593Smuzhiyun #define __LINUX_ATA_H__
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/string.h>
18*4882a593Smuzhiyun #include <linux/types.h>
19*4882a593Smuzhiyun #include <asm/byteorder.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* defines only for the constants which don't work well as enums */
22*4882a593Smuzhiyun #define ATA_DMA_BOUNDARY	0xffffUL
23*4882a593Smuzhiyun #define ATA_DMA_MASK		0xffffffffULL
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun enum {
26*4882a593Smuzhiyun 	/* various global constants */
27*4882a593Smuzhiyun 	ATA_MAX_DEVICES		= 2,	/* per bus/port */
28*4882a593Smuzhiyun 	ATA_MAX_PRD		= 256,	/* we could make these 256/256 */
29*4882a593Smuzhiyun 	ATA_SECT_SIZE		= 512,
30*4882a593Smuzhiyun 	ATA_MAX_SECTORS_128	= 128,
31*4882a593Smuzhiyun 	ATA_MAX_SECTORS		= 256,
32*4882a593Smuzhiyun 	ATA_MAX_SECTORS_1024    = 1024,
33*4882a593Smuzhiyun 	ATA_MAX_SECTORS_LBA48	= 65535,/* avoid count to be 0000h */
34*4882a593Smuzhiyun 	ATA_MAX_SECTORS_TAPE	= 65535,
35*4882a593Smuzhiyun 	ATA_MAX_TRIM_RNUM	= 64,	/* 512-byte payload / (6-byte LBA + 2-byte range per entry) */
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	ATA_ID_WORDS		= 256,
38*4882a593Smuzhiyun 	ATA_ID_CONFIG		= 0,
39*4882a593Smuzhiyun 	ATA_ID_CYLS		= 1,
40*4882a593Smuzhiyun 	ATA_ID_HEADS		= 3,
41*4882a593Smuzhiyun 	ATA_ID_SECTORS		= 6,
42*4882a593Smuzhiyun 	ATA_ID_SERNO		= 10,
43*4882a593Smuzhiyun 	ATA_ID_BUF_SIZE		= 21,
44*4882a593Smuzhiyun 	ATA_ID_FW_REV		= 23,
45*4882a593Smuzhiyun 	ATA_ID_PROD		= 27,
46*4882a593Smuzhiyun 	ATA_ID_MAX_MULTSECT	= 47,
47*4882a593Smuzhiyun 	ATA_ID_DWORD_IO		= 48,	/* before ATA-8 */
48*4882a593Smuzhiyun 	ATA_ID_TRUSTED		= 48,	/* ATA-8 and later */
49*4882a593Smuzhiyun 	ATA_ID_CAPABILITY	= 49,
50*4882a593Smuzhiyun 	ATA_ID_OLD_PIO_MODES	= 51,
51*4882a593Smuzhiyun 	ATA_ID_OLD_DMA_MODES	= 52,
52*4882a593Smuzhiyun 	ATA_ID_FIELD_VALID	= 53,
53*4882a593Smuzhiyun 	ATA_ID_CUR_CYLS		= 54,
54*4882a593Smuzhiyun 	ATA_ID_CUR_HEADS	= 55,
55*4882a593Smuzhiyun 	ATA_ID_CUR_SECTORS	= 56,
56*4882a593Smuzhiyun 	ATA_ID_MULTSECT		= 59,
57*4882a593Smuzhiyun 	ATA_ID_LBA_CAPACITY	= 60,
58*4882a593Smuzhiyun 	ATA_ID_SWDMA_MODES	= 62,
59*4882a593Smuzhiyun 	ATA_ID_MWDMA_MODES	= 63,
60*4882a593Smuzhiyun 	ATA_ID_PIO_MODES	= 64,
61*4882a593Smuzhiyun 	ATA_ID_EIDE_DMA_MIN	= 65,
62*4882a593Smuzhiyun 	ATA_ID_EIDE_DMA_TIME	= 66,
63*4882a593Smuzhiyun 	ATA_ID_EIDE_PIO		= 67,
64*4882a593Smuzhiyun 	ATA_ID_EIDE_PIO_IORDY	= 68,
65*4882a593Smuzhiyun 	ATA_ID_ADDITIONAL_SUPP	= 69,
66*4882a593Smuzhiyun 	ATA_ID_QUEUE_DEPTH	= 75,
67*4882a593Smuzhiyun 	ATA_ID_SATA_CAPABILITY	= 76,
68*4882a593Smuzhiyun 	ATA_ID_SATA_CAPABILITY_2	= 77,
69*4882a593Smuzhiyun 	ATA_ID_FEATURE_SUPP	= 78,
70*4882a593Smuzhiyun 	ATA_ID_MAJOR_VER	= 80,
71*4882a593Smuzhiyun 	ATA_ID_COMMAND_SET_1	= 82,
72*4882a593Smuzhiyun 	ATA_ID_COMMAND_SET_2	= 83,
73*4882a593Smuzhiyun 	ATA_ID_CFSSE		= 84,
74*4882a593Smuzhiyun 	ATA_ID_CFS_ENABLE_1	= 85,
75*4882a593Smuzhiyun 	ATA_ID_CFS_ENABLE_2	= 86,
76*4882a593Smuzhiyun 	ATA_ID_CSF_DEFAULT	= 87,
77*4882a593Smuzhiyun 	ATA_ID_UDMA_MODES	= 88,
78*4882a593Smuzhiyun 	ATA_ID_HW_CONFIG	= 93,
79*4882a593Smuzhiyun 	ATA_ID_SPG		= 98,
80*4882a593Smuzhiyun 	ATA_ID_LBA_CAPACITY_2	= 100,
81*4882a593Smuzhiyun 	ATA_ID_SECTOR_SIZE	= 106,
82*4882a593Smuzhiyun 	ATA_ID_WWN		= 108,
83*4882a593Smuzhiyun 	ATA_ID_LOGICAL_SECTOR_SIZE	= 117,	/* and 118 */
84*4882a593Smuzhiyun 	ATA_ID_COMMAND_SET_3	= 119,
85*4882a593Smuzhiyun 	ATA_ID_COMMAND_SET_4	= 120,
86*4882a593Smuzhiyun 	ATA_ID_LAST_LUN		= 126,
87*4882a593Smuzhiyun 	ATA_ID_DLF		= 128,
88*4882a593Smuzhiyun 	ATA_ID_CSFO		= 129,
89*4882a593Smuzhiyun 	ATA_ID_CFA_POWER	= 160,
90*4882a593Smuzhiyun 	ATA_ID_CFA_KEY_MGMT	= 162,
91*4882a593Smuzhiyun 	ATA_ID_CFA_MODES	= 163,
92*4882a593Smuzhiyun 	ATA_ID_DATA_SET_MGMT	= 169,
93*4882a593Smuzhiyun 	ATA_ID_SCT_CMD_XPORT	= 206,
94*4882a593Smuzhiyun 	ATA_ID_ROT_SPEED	= 217,
95*4882a593Smuzhiyun 	ATA_ID_PIO4		= (1 << 1),
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	ATA_ID_SERNO_LEN	= 20,
98*4882a593Smuzhiyun 	ATA_ID_FW_REV_LEN	= 8,
99*4882a593Smuzhiyun 	ATA_ID_PROD_LEN		= 40,
100*4882a593Smuzhiyun 	ATA_ID_WWN_LEN		= 8,
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	ATA_PCI_CTL_OFS		= 2,
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	ATA_PIO0		= (1 << 0),
105*4882a593Smuzhiyun 	ATA_PIO1		= ATA_PIO0 | (1 << 1),
106*4882a593Smuzhiyun 	ATA_PIO2		= ATA_PIO1 | (1 << 2),
107*4882a593Smuzhiyun 	ATA_PIO3		= ATA_PIO2 | (1 << 3),
108*4882a593Smuzhiyun 	ATA_PIO4		= ATA_PIO3 | (1 << 4),
109*4882a593Smuzhiyun 	ATA_PIO5		= ATA_PIO4 | (1 << 5),
110*4882a593Smuzhiyun 	ATA_PIO6		= ATA_PIO5 | (1 << 6),
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	ATA_PIO4_ONLY		= (1 << 4),
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	ATA_SWDMA0		= (1 << 0),
115*4882a593Smuzhiyun 	ATA_SWDMA1		= ATA_SWDMA0 | (1 << 1),
116*4882a593Smuzhiyun 	ATA_SWDMA2		= ATA_SWDMA1 | (1 << 2),
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	ATA_SWDMA2_ONLY		= (1 << 2),
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	ATA_MWDMA0		= (1 << 0),
121*4882a593Smuzhiyun 	ATA_MWDMA1		= ATA_MWDMA0 | (1 << 1),
122*4882a593Smuzhiyun 	ATA_MWDMA2		= ATA_MWDMA1 | (1 << 2),
123*4882a593Smuzhiyun 	ATA_MWDMA3		= ATA_MWDMA2 | (1 << 3),
124*4882a593Smuzhiyun 	ATA_MWDMA4		= ATA_MWDMA3 | (1 << 4),
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ATA_MWDMA12_ONLY	= (1 << 1) | (1 << 2),
127*4882a593Smuzhiyun 	ATA_MWDMA2_ONLY		= (1 << 2),
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	ATA_UDMA0		= (1 << 0),
130*4882a593Smuzhiyun 	ATA_UDMA1		= ATA_UDMA0 | (1 << 1),
131*4882a593Smuzhiyun 	ATA_UDMA2		= ATA_UDMA1 | (1 << 2),
132*4882a593Smuzhiyun 	ATA_UDMA3		= ATA_UDMA2 | (1 << 3),
133*4882a593Smuzhiyun 	ATA_UDMA4		= ATA_UDMA3 | (1 << 4),
134*4882a593Smuzhiyun 	ATA_UDMA5		= ATA_UDMA4 | (1 << 5),
135*4882a593Smuzhiyun 	ATA_UDMA6		= ATA_UDMA5 | (1 << 6),
136*4882a593Smuzhiyun 	ATA_UDMA7		= ATA_UDMA6 | (1 << 7),
137*4882a593Smuzhiyun 	/* ATA_UDMA7 is just for completeness... doesn't exist (yet?).  */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	ATA_UDMA24_ONLY		= (1 << 2) | (1 << 4),
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	ATA_UDMA_MASK_40C	= ATA_UDMA2,	/* udma0-2 */
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	/* DMA-related */
144*4882a593Smuzhiyun 	ATA_PRD_SZ		= 8,
145*4882a593Smuzhiyun 	ATA_PRD_TBL_SZ		= (ATA_MAX_PRD * ATA_PRD_SZ),
146*4882a593Smuzhiyun 	ATA_PRD_EOT		= (1 << 31),	/* end-of-table flag */
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	ATA_DMA_TABLE_OFS	= 4,
149*4882a593Smuzhiyun 	ATA_DMA_STATUS		= 2,
150*4882a593Smuzhiyun 	ATA_DMA_CMD		= 0,
151*4882a593Smuzhiyun 	ATA_DMA_WR		= (1 << 3),
152*4882a593Smuzhiyun 	ATA_DMA_START		= (1 << 0),
153*4882a593Smuzhiyun 	ATA_DMA_INTR		= (1 << 2),
154*4882a593Smuzhiyun 	ATA_DMA_ERR		= (1 << 1),
155*4882a593Smuzhiyun 	ATA_DMA_ACTIVE		= (1 << 0),
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	/* bits in ATA command block registers */
158*4882a593Smuzhiyun 	ATA_HOB			= (1 << 7),	/* LBA48 selector */
159*4882a593Smuzhiyun 	ATA_NIEN		= (1 << 1),	/* disable-irq flag */
160*4882a593Smuzhiyun 	ATA_LBA			= (1 << 6),	/* LBA28 selector */
161*4882a593Smuzhiyun 	ATA_DEV1		= (1 << 4),	/* Select Device 1 (slave) */
162*4882a593Smuzhiyun 	ATA_DEVICE_OBS		= (1 << 7) | (1 << 5), /* obs bits in dev reg */
163*4882a593Smuzhiyun 	ATA_DEVCTL_OBS		= (1 << 3),	/* obsolete bit in devctl reg */
164*4882a593Smuzhiyun 	ATA_BUSY		= (1 << 7),	/* BSY status bit */
165*4882a593Smuzhiyun 	ATA_DRDY		= (1 << 6),	/* device ready */
166*4882a593Smuzhiyun 	ATA_DF			= (1 << 5),	/* device fault */
167*4882a593Smuzhiyun 	ATA_DSC			= (1 << 4),	/* drive seek complete */
168*4882a593Smuzhiyun 	ATA_DRQ			= (1 << 3),	/* data request i/o */
169*4882a593Smuzhiyun 	ATA_CORR		= (1 << 2),	/* corrected data error */
170*4882a593Smuzhiyun 	ATA_SENSE		= (1 << 1),	/* sense code available */
171*4882a593Smuzhiyun 	ATA_ERR			= (1 << 0),	/* have an error */
172*4882a593Smuzhiyun 	ATA_SRST		= (1 << 2),	/* software reset */
173*4882a593Smuzhiyun 	ATA_ICRC		= (1 << 7),	/* interface CRC error */
174*4882a593Smuzhiyun 	ATA_BBK			= ATA_ICRC,	/* pre-EIDE: block marked bad */
175*4882a593Smuzhiyun 	ATA_UNC			= (1 << 6),	/* uncorrectable media error */
176*4882a593Smuzhiyun 	ATA_MC			= (1 << 5),	/* media changed */
177*4882a593Smuzhiyun 	ATA_IDNF		= (1 << 4),	/* ID not found */
178*4882a593Smuzhiyun 	ATA_MCR			= (1 << 3),	/* media change requested */
179*4882a593Smuzhiyun 	ATA_ABORTED		= (1 << 2),	/* command aborted */
180*4882a593Smuzhiyun 	ATA_TRK0NF		= (1 << 1),	/* track 0 not found */
181*4882a593Smuzhiyun 	ATA_AMNF		= (1 << 0),	/* address mark not found */
182*4882a593Smuzhiyun 	ATAPI_LFS		= 0xF0,		/* last failed sense */
183*4882a593Smuzhiyun 	ATAPI_EOM		= ATA_TRK0NF,	/* end of media */
184*4882a593Smuzhiyun 	ATAPI_ILI		= ATA_AMNF,	/* illegal length indication */
185*4882a593Smuzhiyun 	ATAPI_IO		= (1 << 1),
186*4882a593Smuzhiyun 	ATAPI_COD		= (1 << 0),
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* ATA command block registers */
189*4882a593Smuzhiyun 	ATA_REG_DATA		= 0x00,
190*4882a593Smuzhiyun 	ATA_REG_ERR		= 0x01,
191*4882a593Smuzhiyun 	ATA_REG_NSECT		= 0x02,
192*4882a593Smuzhiyun 	ATA_REG_LBAL		= 0x03,
193*4882a593Smuzhiyun 	ATA_REG_LBAM		= 0x04,
194*4882a593Smuzhiyun 	ATA_REG_LBAH		= 0x05,
195*4882a593Smuzhiyun 	ATA_REG_DEVICE		= 0x06,
196*4882a593Smuzhiyun 	ATA_REG_STATUS		= 0x07,
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	ATA_REG_FEATURE		= ATA_REG_ERR, /* and their aliases */
199*4882a593Smuzhiyun 	ATA_REG_CMD		= ATA_REG_STATUS,
200*4882a593Smuzhiyun 	ATA_REG_BYTEL		= ATA_REG_LBAM,
201*4882a593Smuzhiyun 	ATA_REG_BYTEH		= ATA_REG_LBAH,
202*4882a593Smuzhiyun 	ATA_REG_DEVSEL		= ATA_REG_DEVICE,
203*4882a593Smuzhiyun 	ATA_REG_IRQ		= ATA_REG_NSECT,
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* ATA device commands */
206*4882a593Smuzhiyun 	ATA_CMD_DEV_RESET	= 0x08, /* ATAPI device reset */
207*4882a593Smuzhiyun 	ATA_CMD_CHK_POWER	= 0xE5, /* check power mode */
208*4882a593Smuzhiyun 	ATA_CMD_STANDBY		= 0xE2, /* place in standby power mode */
209*4882a593Smuzhiyun 	ATA_CMD_IDLE		= 0xE3, /* place in idle power mode */
210*4882a593Smuzhiyun 	ATA_CMD_EDD		= 0x90,	/* execute device diagnostic */
211*4882a593Smuzhiyun 	ATA_CMD_DOWNLOAD_MICRO  = 0x92,
212*4882a593Smuzhiyun 	ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
213*4882a593Smuzhiyun 	ATA_CMD_NOP		= 0x00,
214*4882a593Smuzhiyun 	ATA_CMD_FLUSH		= 0xE7,
215*4882a593Smuzhiyun 	ATA_CMD_FLUSH_EXT	= 0xEA,
216*4882a593Smuzhiyun 	ATA_CMD_ID_ATA		= 0xEC,
217*4882a593Smuzhiyun 	ATA_CMD_ID_ATAPI	= 0xA1,
218*4882a593Smuzhiyun 	ATA_CMD_SERVICE		= 0xA2,
219*4882a593Smuzhiyun 	ATA_CMD_READ		= 0xC8,
220*4882a593Smuzhiyun 	ATA_CMD_READ_EXT	= 0x25,
221*4882a593Smuzhiyun 	ATA_CMD_READ_QUEUED	= 0x26,
222*4882a593Smuzhiyun 	ATA_CMD_READ_STREAM_EXT	= 0x2B,
223*4882a593Smuzhiyun 	ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
224*4882a593Smuzhiyun 	ATA_CMD_WRITE		= 0xCA,
225*4882a593Smuzhiyun 	ATA_CMD_WRITE_EXT	= 0x35,
226*4882a593Smuzhiyun 	ATA_CMD_WRITE_QUEUED	= 0x36,
227*4882a593Smuzhiyun 	ATA_CMD_WRITE_STREAM_EXT = 0x3B,
228*4882a593Smuzhiyun 	ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
229*4882a593Smuzhiyun 	ATA_CMD_WRITE_FUA_EXT	= 0x3D,
230*4882a593Smuzhiyun 	ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
231*4882a593Smuzhiyun 	ATA_CMD_FPDMA_READ	= 0x60,
232*4882a593Smuzhiyun 	ATA_CMD_FPDMA_WRITE	= 0x61,
233*4882a593Smuzhiyun 	ATA_CMD_NCQ_NON_DATA	= 0x63,
234*4882a593Smuzhiyun 	ATA_CMD_FPDMA_SEND	= 0x64,
235*4882a593Smuzhiyun 	ATA_CMD_FPDMA_RECV	= 0x65,
236*4882a593Smuzhiyun 	ATA_CMD_PIO_READ	= 0x20,
237*4882a593Smuzhiyun 	ATA_CMD_PIO_READ_EXT	= 0x24,
238*4882a593Smuzhiyun 	ATA_CMD_PIO_WRITE	= 0x30,
239*4882a593Smuzhiyun 	ATA_CMD_PIO_WRITE_EXT	= 0x34,
240*4882a593Smuzhiyun 	ATA_CMD_READ_MULTI	= 0xC4,
241*4882a593Smuzhiyun 	ATA_CMD_READ_MULTI_EXT	= 0x29,
242*4882a593Smuzhiyun 	ATA_CMD_WRITE_MULTI	= 0xC5,
243*4882a593Smuzhiyun 	ATA_CMD_WRITE_MULTI_EXT	= 0x39,
244*4882a593Smuzhiyun 	ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
245*4882a593Smuzhiyun 	ATA_CMD_SET_FEATURES	= 0xEF,
246*4882a593Smuzhiyun 	ATA_CMD_SET_MULTI	= 0xC6,
247*4882a593Smuzhiyun 	ATA_CMD_PACKET		= 0xA0,
248*4882a593Smuzhiyun 	ATA_CMD_VERIFY		= 0x40,
249*4882a593Smuzhiyun 	ATA_CMD_VERIFY_EXT	= 0x42,
250*4882a593Smuzhiyun 	ATA_CMD_WRITE_UNCORR_EXT = 0x45,
251*4882a593Smuzhiyun 	ATA_CMD_STANDBYNOW1	= 0xE0,
252*4882a593Smuzhiyun 	ATA_CMD_IDLEIMMEDIATE	= 0xE1,
253*4882a593Smuzhiyun 	ATA_CMD_SLEEP		= 0xE6,
254*4882a593Smuzhiyun 	ATA_CMD_INIT_DEV_PARAMS	= 0x91,
255*4882a593Smuzhiyun 	ATA_CMD_READ_NATIVE_MAX	= 0xF8,
256*4882a593Smuzhiyun 	ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
257*4882a593Smuzhiyun 	ATA_CMD_SET_MAX		= 0xF9,
258*4882a593Smuzhiyun 	ATA_CMD_SET_MAX_EXT	= 0x37,
259*4882a593Smuzhiyun 	ATA_CMD_READ_LOG_EXT	= 0x2F,
260*4882a593Smuzhiyun 	ATA_CMD_WRITE_LOG_EXT	= 0x3F,
261*4882a593Smuzhiyun 	ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262*4882a593Smuzhiyun 	ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
263*4882a593Smuzhiyun 	ATA_CMD_TRUSTED_NONDATA	= 0x5B,
264*4882a593Smuzhiyun 	ATA_CMD_TRUSTED_RCV	= 0x5C,
265*4882a593Smuzhiyun 	ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
266*4882a593Smuzhiyun 	ATA_CMD_TRUSTED_SND	= 0x5E,
267*4882a593Smuzhiyun 	ATA_CMD_TRUSTED_SND_DMA = 0x5F,
268*4882a593Smuzhiyun 	ATA_CMD_PMP_READ	= 0xE4,
269*4882a593Smuzhiyun 	ATA_CMD_PMP_READ_DMA	= 0xE9,
270*4882a593Smuzhiyun 	ATA_CMD_PMP_WRITE	= 0xE8,
271*4882a593Smuzhiyun 	ATA_CMD_PMP_WRITE_DMA	= 0xEB,
272*4882a593Smuzhiyun 	ATA_CMD_CONF_OVERLAY	= 0xB1,
273*4882a593Smuzhiyun 	ATA_CMD_SEC_SET_PASS	= 0xF1,
274*4882a593Smuzhiyun 	ATA_CMD_SEC_UNLOCK	= 0xF2,
275*4882a593Smuzhiyun 	ATA_CMD_SEC_ERASE_PREP	= 0xF3,
276*4882a593Smuzhiyun 	ATA_CMD_SEC_ERASE_UNIT	= 0xF4,
277*4882a593Smuzhiyun 	ATA_CMD_SEC_FREEZE_LOCK	= 0xF5,
278*4882a593Smuzhiyun 	ATA_CMD_SEC_DISABLE_PASS = 0xF6,
279*4882a593Smuzhiyun 	ATA_CMD_CONFIG_STREAM	= 0x51,
280*4882a593Smuzhiyun 	ATA_CMD_SMART		= 0xB0,
281*4882a593Smuzhiyun 	ATA_CMD_MEDIA_LOCK	= 0xDE,
282*4882a593Smuzhiyun 	ATA_CMD_MEDIA_UNLOCK	= 0xDF,
283*4882a593Smuzhiyun 	ATA_CMD_DSM		= 0x06,
284*4882a593Smuzhiyun 	ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
285*4882a593Smuzhiyun 	ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
286*4882a593Smuzhiyun 	ATA_CMD_CFA_WRITE_NE	= 0x38,
287*4882a593Smuzhiyun 	ATA_CMD_CFA_TRANS_SECT	= 0x87,
288*4882a593Smuzhiyun 	ATA_CMD_CFA_ERASE	= 0xC0,
289*4882a593Smuzhiyun 	ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
290*4882a593Smuzhiyun 	ATA_CMD_REQ_SENSE_DATA  = 0x0B,
291*4882a593Smuzhiyun 	ATA_CMD_SANITIZE_DEVICE = 0xB4,
292*4882a593Smuzhiyun 	ATA_CMD_ZAC_MGMT_IN	= 0x4A,
293*4882a593Smuzhiyun 	ATA_CMD_ZAC_MGMT_OUT	= 0x9F,
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* marked obsolete in the ATA/ATAPI-7 spec */
296*4882a593Smuzhiyun 	ATA_CMD_RESTORE		= 0x10,
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	/* Subcmds for ATA_CMD_FPDMA_RECV */
299*4882a593Smuzhiyun 	ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
300*4882a593Smuzhiyun 	ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN    = 0x02,
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	/* Subcmds for ATA_CMD_FPDMA_SEND */
303*4882a593Smuzhiyun 	ATA_SUBCMD_FPDMA_SEND_DSM            = 0x00,
304*4882a593Smuzhiyun 	ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	/* Subcmds for ATA_CMD_NCQ_NON_DATA */
307*4882a593Smuzhiyun 	ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE  = 0x00,
308*4882a593Smuzhiyun 	ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
309*4882a593Smuzhiyun 	ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT     = 0x06,
310*4882a593Smuzhiyun 	ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	/* Subcmds for ATA_CMD_ZAC_MGMT_IN */
313*4882a593Smuzhiyun 	ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
316*4882a593Smuzhiyun 	ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
317*4882a593Smuzhiyun 	ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
318*4882a593Smuzhiyun 	ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
319*4882a593Smuzhiyun 	ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	/* READ_LOG_EXT pages */
322*4882a593Smuzhiyun 	ATA_LOG_DIRECTORY	= 0x0,
323*4882a593Smuzhiyun 	ATA_LOG_SATA_NCQ	= 0x10,
324*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA	= 0x12,
325*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV	= 0x13,
326*4882a593Smuzhiyun 	ATA_LOG_IDENTIFY_DEVICE	= 0x30,
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	/* Identify device log pages: */
329*4882a593Smuzhiyun 	ATA_LOG_SECURITY	  = 0x06,
330*4882a593Smuzhiyun 	ATA_LOG_SATA_SETTINGS	  = 0x08,
331*4882a593Smuzhiyun 	ATA_LOG_ZONED_INFORMATION = 0x09,
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/* Identify device SATA settings log:*/
334*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_OFFSET	  = 0x30,
335*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_SIZE	  = 0x08,
336*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_MDAT	  = 0x00,
337*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_MDAT_MASK  = 0x1F,
338*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_DETO	  = 0x01,
339*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_VALID	  = 0x07,
340*4882a593Smuzhiyun 	ATA_LOG_DEVSLP_VALID_MASK = 0x80,
341*4882a593Smuzhiyun 	ATA_LOG_NCQ_PRIO_OFFSET   = 0x09,
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	/* NCQ send and receive log */
344*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET	= 0x00,
345*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM	= (1 << 0),
346*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET	= 0x04,
347*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_DSM_TRIM		= (1 << 0),
348*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET	= 0x08,
349*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED  = (1 << 0),
350*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET	= 0x0C,
351*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED  = (1 << 0),
352*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET	= 0x10,
353*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
354*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
355*4882a593Smuzhiyun 	ATA_LOG_NCQ_SEND_RECV_SIZE		= 0x14,
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* NCQ Non-Data log */
358*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET	= 0x00,
359*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET	= 0x00,
360*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_NCQ		= (1 << 0),
361*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_ALL		= (1 << 1),
362*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING	= (1 << 2),
363*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
364*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED	= (1 << 4),
365*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET	= 0x1C,
366*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT	= (1 << 0),
367*4882a593Smuzhiyun 	ATA_LOG_NCQ_NON_DATA_SIZE		= 0x40,
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	/* READ/WRITE LONG (obsolete) */
370*4882a593Smuzhiyun 	ATA_CMD_READ_LONG	= 0x22,
371*4882a593Smuzhiyun 	ATA_CMD_READ_LONG_ONCE	= 0x23,
372*4882a593Smuzhiyun 	ATA_CMD_WRITE_LONG	= 0x32,
373*4882a593Smuzhiyun 	ATA_CMD_WRITE_LONG_ONCE	= 0x33,
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	/* SETFEATURES stuff */
376*4882a593Smuzhiyun 	SETFEATURES_XFER	= 0x03,
377*4882a593Smuzhiyun 	XFER_UDMA_7		= 0x47,
378*4882a593Smuzhiyun 	XFER_UDMA_6		= 0x46,
379*4882a593Smuzhiyun 	XFER_UDMA_5		= 0x45,
380*4882a593Smuzhiyun 	XFER_UDMA_4		= 0x44,
381*4882a593Smuzhiyun 	XFER_UDMA_3		= 0x43,
382*4882a593Smuzhiyun 	XFER_UDMA_2		= 0x42,
383*4882a593Smuzhiyun 	XFER_UDMA_1		= 0x41,
384*4882a593Smuzhiyun 	XFER_UDMA_0		= 0x40,
385*4882a593Smuzhiyun 	XFER_MW_DMA_4		= 0x24,	/* CFA only */
386*4882a593Smuzhiyun 	XFER_MW_DMA_3		= 0x23,	/* CFA only */
387*4882a593Smuzhiyun 	XFER_MW_DMA_2		= 0x22,
388*4882a593Smuzhiyun 	XFER_MW_DMA_1		= 0x21,
389*4882a593Smuzhiyun 	XFER_MW_DMA_0		= 0x20,
390*4882a593Smuzhiyun 	XFER_SW_DMA_2		= 0x12,
391*4882a593Smuzhiyun 	XFER_SW_DMA_1		= 0x11,
392*4882a593Smuzhiyun 	XFER_SW_DMA_0		= 0x10,
393*4882a593Smuzhiyun 	XFER_PIO_6		= 0x0E,	/* CFA only */
394*4882a593Smuzhiyun 	XFER_PIO_5		= 0x0D,	/* CFA only */
395*4882a593Smuzhiyun 	XFER_PIO_4		= 0x0C,
396*4882a593Smuzhiyun 	XFER_PIO_3		= 0x0B,
397*4882a593Smuzhiyun 	XFER_PIO_2		= 0x0A,
398*4882a593Smuzhiyun 	XFER_PIO_1		= 0x09,
399*4882a593Smuzhiyun 	XFER_PIO_0		= 0x08,
400*4882a593Smuzhiyun 	XFER_PIO_SLOW		= 0x00,
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	SETFEATURES_WC_ON	= 0x02, /* Enable write cache */
403*4882a593Smuzhiyun 	SETFEATURES_WC_OFF	= 0x82, /* Disable write cache */
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	SETFEATURES_RA_ON	= 0xaa, /* Enable read look-ahead */
406*4882a593Smuzhiyun 	SETFEATURES_RA_OFF	= 0x55, /* Disable read look-ahead */
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	/* Enable/Disable Automatic Acoustic Management */
409*4882a593Smuzhiyun 	SETFEATURES_AAM_ON	= 0x42,
410*4882a593Smuzhiyun 	SETFEATURES_AAM_OFF	= 0xC2,
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	SETFEATURES_SPINUP		= 0x07, /* Spin-up drive */
413*4882a593Smuzhiyun 	SETFEATURES_SPINUP_TIMEOUT	= 30000, /* 30s timeout for drive spin-up from PUIS */
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
416*4882a593Smuzhiyun 	SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	/* SETFEATURE Sector counts for SATA features */
419*4882a593Smuzhiyun 	SATA_FPDMA_OFFSET	= 0x01,	/* FPDMA non-zero buffer offsets */
420*4882a593Smuzhiyun 	SATA_FPDMA_AA		= 0x02, /* FPDMA Setup FIS Auto-Activate */
421*4882a593Smuzhiyun 	SATA_DIPM		= 0x03,	/* Device Initiated Power Management */
422*4882a593Smuzhiyun 	SATA_FPDMA_IN_ORDER	= 0x04,	/* FPDMA in-order data delivery */
423*4882a593Smuzhiyun 	SATA_AN			= 0x05,	/* Asynchronous Notification */
424*4882a593Smuzhiyun 	SATA_SSP		= 0x06,	/* Software Settings Preservation */
425*4882a593Smuzhiyun 	SATA_DEVSLP		= 0x09,	/* Device Sleep */
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	SETFEATURE_SENSE_DATA	= 0xC3, /* Sense Data Reporting feature */
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	/* feature values for SET_MAX */
430*4882a593Smuzhiyun 	ATA_SET_MAX_ADDR	= 0x00,
431*4882a593Smuzhiyun 	ATA_SET_MAX_PASSWD	= 0x01,
432*4882a593Smuzhiyun 	ATA_SET_MAX_LOCK	= 0x02,
433*4882a593Smuzhiyun 	ATA_SET_MAX_UNLOCK	= 0x03,
434*4882a593Smuzhiyun 	ATA_SET_MAX_FREEZE_LOCK	= 0x04,
435*4882a593Smuzhiyun 	ATA_SET_MAX_PASSWD_DMA	= 0x05,
436*4882a593Smuzhiyun 	ATA_SET_MAX_UNLOCK_DMA	= 0x06,
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	/* feature values for DEVICE CONFIGURATION OVERLAY */
439*4882a593Smuzhiyun 	ATA_DCO_RESTORE		= 0xC0,
440*4882a593Smuzhiyun 	ATA_DCO_FREEZE_LOCK	= 0xC1,
441*4882a593Smuzhiyun 	ATA_DCO_IDENTIFY	= 0xC2,
442*4882a593Smuzhiyun 	ATA_DCO_SET		= 0xC3,
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 	/* feature values for SMART */
445*4882a593Smuzhiyun 	ATA_SMART_ENABLE	= 0xD8,
446*4882a593Smuzhiyun 	ATA_SMART_READ_VALUES	= 0xD0,
447*4882a593Smuzhiyun 	ATA_SMART_READ_THRESHOLDS = 0xD1,
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	/* feature values for Data Set Management */
450*4882a593Smuzhiyun 	ATA_DSM_TRIM		= 0x01,
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	/* password used in LBA Mid / LBA High for executing SMART commands */
453*4882a593Smuzhiyun 	ATA_SMART_LBAM_PASS	= 0x4F,
454*4882a593Smuzhiyun 	ATA_SMART_LBAH_PASS	= 0xC2,
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	/* ATAPI stuff */
457*4882a593Smuzhiyun 	ATAPI_PKT_DMA		= (1 << 0),
458*4882a593Smuzhiyun 	ATAPI_DMADIR		= (1 << 2),	/* ATAPI data dir:
459*4882a593Smuzhiyun 						   0=to device, 1=to host */
460*4882a593Smuzhiyun 	ATAPI_CDB_LEN		= 16,
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	/* PMP stuff */
463*4882a593Smuzhiyun 	SATA_PMP_MAX_PORTS	= 15,
464*4882a593Smuzhiyun 	SATA_PMP_CTRL_PORT	= 15,
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	SATA_PMP_GSCR_DWORDS	= 128,
467*4882a593Smuzhiyun 	SATA_PMP_GSCR_PROD_ID	= 0,
468*4882a593Smuzhiyun 	SATA_PMP_GSCR_REV	= 1,
469*4882a593Smuzhiyun 	SATA_PMP_GSCR_PORT_INFO	= 2,
470*4882a593Smuzhiyun 	SATA_PMP_GSCR_ERROR	= 32,
471*4882a593Smuzhiyun 	SATA_PMP_GSCR_ERROR_EN	= 33,
472*4882a593Smuzhiyun 	SATA_PMP_GSCR_FEAT	= 64,
473*4882a593Smuzhiyun 	SATA_PMP_GSCR_FEAT_EN	= 96,
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	SATA_PMP_PSCR_STATUS	= 0,
476*4882a593Smuzhiyun 	SATA_PMP_PSCR_ERROR	= 1,
477*4882a593Smuzhiyun 	SATA_PMP_PSCR_CONTROL	= 2,
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	SATA_PMP_FEAT_BIST	= (1 << 0),
480*4882a593Smuzhiyun 	SATA_PMP_FEAT_PMREQ	= (1 << 1),
481*4882a593Smuzhiyun 	SATA_PMP_FEAT_DYNSSC	= (1 << 2),
482*4882a593Smuzhiyun 	SATA_PMP_FEAT_NOTIFY	= (1 << 3),
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* cable types */
485*4882a593Smuzhiyun 	ATA_CBL_NONE		= 0,
486*4882a593Smuzhiyun 	ATA_CBL_PATA40		= 1,
487*4882a593Smuzhiyun 	ATA_CBL_PATA80		= 2,
488*4882a593Smuzhiyun 	ATA_CBL_PATA40_SHORT	= 3,	/* 40 wire cable to high UDMA spec */
489*4882a593Smuzhiyun 	ATA_CBL_PATA_UNK	= 4,	/* don't know, maybe 80c? */
490*4882a593Smuzhiyun 	ATA_CBL_PATA_IGN	= 5,	/* don't know, ignore cable handling */
491*4882a593Smuzhiyun 	ATA_CBL_SATA		= 6,
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	/* SATA Status and Control Registers */
494*4882a593Smuzhiyun 	SCR_STATUS		= 0,
495*4882a593Smuzhiyun 	SCR_ERROR		= 1,
496*4882a593Smuzhiyun 	SCR_CONTROL		= 2,
497*4882a593Smuzhiyun 	SCR_ACTIVE		= 3,
498*4882a593Smuzhiyun 	SCR_NOTIFICATION	= 4,
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	/* SError bits */
501*4882a593Smuzhiyun 	SERR_DATA_RECOVERED	= (1 << 0), /* recovered data error */
502*4882a593Smuzhiyun 	SERR_COMM_RECOVERED	= (1 << 1), /* recovered comm failure */
503*4882a593Smuzhiyun 	SERR_DATA		= (1 << 8), /* unrecovered data error */
504*4882a593Smuzhiyun 	SERR_PERSISTENT		= (1 << 9), /* persistent data/comm error */
505*4882a593Smuzhiyun 	SERR_PROTOCOL		= (1 << 10), /* protocol violation */
506*4882a593Smuzhiyun 	SERR_INTERNAL		= (1 << 11), /* host internal error */
507*4882a593Smuzhiyun 	SERR_PHYRDY_CHG		= (1 << 16), /* PHY RDY changed */
508*4882a593Smuzhiyun 	SERR_PHY_INT_ERR	= (1 << 17), /* PHY internal error */
509*4882a593Smuzhiyun 	SERR_COMM_WAKE		= (1 << 18), /* Comm wake */
510*4882a593Smuzhiyun 	SERR_10B_8B_ERR		= (1 << 19), /* 10b to 8b decode error */
511*4882a593Smuzhiyun 	SERR_DISPARITY		= (1 << 20), /* Disparity */
512*4882a593Smuzhiyun 	SERR_CRC		= (1 << 21), /* CRC error */
513*4882a593Smuzhiyun 	SERR_HANDSHAKE		= (1 << 22), /* Handshake error */
514*4882a593Smuzhiyun 	SERR_LINK_SEQ_ERR	= (1 << 23), /* Link sequence error */
515*4882a593Smuzhiyun 	SERR_TRANS_ST_ERROR	= (1 << 24), /* Transport state trans. error */
516*4882a593Smuzhiyun 	SERR_UNRECOG_FIS	= (1 << 25), /* Unrecognized FIS */
517*4882a593Smuzhiyun 	SERR_DEV_XCHG		= (1 << 26), /* device exchanged */
518*4882a593Smuzhiyun };
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun enum ata_prot_flags {
521*4882a593Smuzhiyun 	/* protocol flags */
522*4882a593Smuzhiyun 	ATA_PROT_FLAG_PIO	= (1 << 0), /* is PIO */
523*4882a593Smuzhiyun 	ATA_PROT_FLAG_DMA	= (1 << 1), /* is DMA */
524*4882a593Smuzhiyun 	ATA_PROT_FLAG_NCQ	= (1 << 2), /* is NCQ */
525*4882a593Smuzhiyun 	ATA_PROT_FLAG_ATAPI	= (1 << 3), /* is ATAPI */
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* taskfile protocols */
528*4882a593Smuzhiyun 	ATA_PROT_UNKNOWN	= (u8)-1,
529*4882a593Smuzhiyun 	ATA_PROT_NODATA		= 0,
530*4882a593Smuzhiyun 	ATA_PROT_PIO		= ATA_PROT_FLAG_PIO,
531*4882a593Smuzhiyun 	ATA_PROT_DMA		= ATA_PROT_FLAG_DMA,
532*4882a593Smuzhiyun 	ATA_PROT_NCQ_NODATA	= ATA_PROT_FLAG_NCQ,
533*4882a593Smuzhiyun 	ATA_PROT_NCQ		= ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
534*4882a593Smuzhiyun 	ATAPI_PROT_NODATA	= ATA_PROT_FLAG_ATAPI,
535*4882a593Smuzhiyun 	ATAPI_PROT_PIO		= ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
536*4882a593Smuzhiyun 	ATAPI_PROT_DMA		= ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
537*4882a593Smuzhiyun };
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun enum ata_ioctls {
540*4882a593Smuzhiyun 	ATA_IOC_GET_IO32	= 0x309, /* HDIO_GET_32BIT */
541*4882a593Smuzhiyun 	ATA_IOC_SET_IO32	= 0x324, /* HDIO_SET_32BIT */
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun /* core structures */
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun struct ata_bmdma_prd {
547*4882a593Smuzhiyun 	__le32			addr;
548*4882a593Smuzhiyun 	__le32			flags_len;
549*4882a593Smuzhiyun };
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun /*
552*4882a593Smuzhiyun  * id tests
553*4882a593Smuzhiyun  */
554*4882a593Smuzhiyun #define ata_id_is_ata(id)	(((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
555*4882a593Smuzhiyun #define ata_id_has_lba(id)	((id)[ATA_ID_CAPABILITY] & (1 << 9))
556*4882a593Smuzhiyun #define ata_id_has_dma(id)	((id)[ATA_ID_CAPABILITY] & (1 << 8))
557*4882a593Smuzhiyun #define ata_id_has_ncq(id)	((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
558*4882a593Smuzhiyun #define ata_id_queue_depth(id)	(((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
559*4882a593Smuzhiyun #define ata_id_removable(id)	((id)[ATA_ID_CONFIG] & (1 << 7))
560*4882a593Smuzhiyun #define ata_id_has_atapi_AN(id)	\
561*4882a593Smuzhiyun 	((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
562*4882a593Smuzhiyun 	  ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
563*4882a593Smuzhiyun 	 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
564*4882a593Smuzhiyun #define ata_id_has_fpdma_aa(id)	\
565*4882a593Smuzhiyun 	((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
566*4882a593Smuzhiyun 	  ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
567*4882a593Smuzhiyun 	 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
568*4882a593Smuzhiyun #define ata_id_has_devslp(id)	\
569*4882a593Smuzhiyun 	((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
570*4882a593Smuzhiyun 	  ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
571*4882a593Smuzhiyun 	 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8)))
572*4882a593Smuzhiyun #define ata_id_has_ncq_autosense(id) \
573*4882a593Smuzhiyun 	((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
574*4882a593Smuzhiyun 	  ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
575*4882a593Smuzhiyun 	 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7)))
576*4882a593Smuzhiyun #define ata_id_has_dipm(id)	\
577*4882a593Smuzhiyun 	((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
578*4882a593Smuzhiyun 	  ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
579*4882a593Smuzhiyun 	 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 3)))
580*4882a593Smuzhiyun #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
581*4882a593Smuzhiyun #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
582*4882a593Smuzhiyun #define ata_id_u32(id,n)	\
583*4882a593Smuzhiyun 	(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
584*4882a593Smuzhiyun #define ata_id_u64(id,n)	\
585*4882a593Smuzhiyun 	( ((u64) (id)[(n) + 3] << 48) |	\
586*4882a593Smuzhiyun 	  ((u64) (id)[(n) + 2] << 32) |	\
587*4882a593Smuzhiyun 	  ((u64) (id)[(n) + 1] << 16) |	\
588*4882a593Smuzhiyun 	  ((u64) (id)[(n) + 0]) )
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun #define ata_id_cdb_intr(id)	(((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
591*4882a593Smuzhiyun #define ata_id_has_da(id)	((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
592*4882a593Smuzhiyun 
ata_id_has_hipm(const u16 * id)593*4882a593Smuzhiyun static inline bool ata_id_has_hipm(const u16 *id)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun 	u16 val = id[ATA_ID_SATA_CAPABILITY];
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	if (val == 0 || val == 0xffff)
598*4882a593Smuzhiyun 		return false;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	return val & (1 << 9);
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun 
ata_id_has_fua(const u16 * id)603*4882a593Smuzhiyun static inline bool ata_id_has_fua(const u16 *id)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun 	if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
606*4882a593Smuzhiyun 		return false;
607*4882a593Smuzhiyun 	return id[ATA_ID_CFSSE] & (1 << 6);
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
ata_id_has_flush(const u16 * id)610*4882a593Smuzhiyun static inline bool ata_id_has_flush(const u16 *id)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
613*4882a593Smuzhiyun 		return false;
614*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun 
ata_id_flush_enabled(const u16 * id)617*4882a593Smuzhiyun static inline bool ata_id_flush_enabled(const u16 *id)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun 	if (ata_id_has_flush(id) == 0)
620*4882a593Smuzhiyun 		return false;
621*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
622*4882a593Smuzhiyun 		return false;
623*4882a593Smuzhiyun 	return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun 
ata_id_has_flush_ext(const u16 * id)626*4882a593Smuzhiyun static inline bool ata_id_has_flush_ext(const u16 *id)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
629*4882a593Smuzhiyun 		return false;
630*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun 
ata_id_flush_ext_enabled(const u16 * id)633*4882a593Smuzhiyun static inline bool ata_id_flush_ext_enabled(const u16 *id)
634*4882a593Smuzhiyun {
635*4882a593Smuzhiyun 	if (ata_id_has_flush_ext(id) == 0)
636*4882a593Smuzhiyun 		return false;
637*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
638*4882a593Smuzhiyun 		return false;
639*4882a593Smuzhiyun 	/*
640*4882a593Smuzhiyun 	 * some Maxtor disks have bit 13 defined incorrectly
641*4882a593Smuzhiyun 	 * so check bit 10 too
642*4882a593Smuzhiyun 	 */
643*4882a593Smuzhiyun 	return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
ata_id_logical_sector_size(const u16 * id)646*4882a593Smuzhiyun static inline u32 ata_id_logical_sector_size(const u16 *id)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun 	/* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
649*4882a593Smuzhiyun 	 * IDENTIFY DEVICE data, word 117-118.
650*4882a593Smuzhiyun 	 * 0xd000 ignores bit 13 (logical:physical > 1)
651*4882a593Smuzhiyun 	 */
652*4882a593Smuzhiyun 	if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
653*4882a593Smuzhiyun 		return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
654*4882a593Smuzhiyun 			 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
655*4882a593Smuzhiyun 	return ATA_SECT_SIZE;
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun 
ata_id_log2_per_physical_sector(const u16 * id)658*4882a593Smuzhiyun static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun 	/* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
661*4882a593Smuzhiyun 	 * IDENTIFY DEVICE data, word 106.
662*4882a593Smuzhiyun 	 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
663*4882a593Smuzhiyun 	 */
664*4882a593Smuzhiyun 	if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
665*4882a593Smuzhiyun 		return (id[ATA_ID_SECTOR_SIZE] & 0xf);
666*4882a593Smuzhiyun 	return 0;
667*4882a593Smuzhiyun }
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun /* Offset of logical sectors relative to physical sectors.
670*4882a593Smuzhiyun  *
671*4882a593Smuzhiyun  * If device has more than one logical sector per physical sector
672*4882a593Smuzhiyun  * (aka 512 byte emulation), vendors might offset the "sector 0" address
673*4882a593Smuzhiyun  * so sector 63 is "naturally aligned" - e.g. FAT partition table.
674*4882a593Smuzhiyun  * This avoids Read/Mod/Write penalties when using FAT partition table
675*4882a593Smuzhiyun  * and updating "well aligned" (FS perspective) physical sectors on every
676*4882a593Smuzhiyun  * transaction.
677*4882a593Smuzhiyun  */
ata_id_logical_sector_offset(const u16 * id,u8 log2_per_phys)678*4882a593Smuzhiyun static inline u16 ata_id_logical_sector_offset(const u16 *id,
679*4882a593Smuzhiyun 	 u8 log2_per_phys)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun 	u16 word_209 = id[209];
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
684*4882a593Smuzhiyun 		u16 first = word_209 & 0x3fff;
685*4882a593Smuzhiyun 		if (first > 0)
686*4882a593Smuzhiyun 			return (1 << log2_per_phys) - first;
687*4882a593Smuzhiyun 	}
688*4882a593Smuzhiyun 	return 0;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun 
ata_id_has_lba48(const u16 * id)691*4882a593Smuzhiyun static inline bool ata_id_has_lba48(const u16 *id)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
694*4882a593Smuzhiyun 		return false;
695*4882a593Smuzhiyun 	if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
696*4882a593Smuzhiyun 		return false;
697*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun 
ata_id_lba48_enabled(const u16 * id)700*4882a593Smuzhiyun static inline bool ata_id_lba48_enabled(const u16 *id)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun 	if (ata_id_has_lba48(id) == 0)
703*4882a593Smuzhiyun 		return false;
704*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
705*4882a593Smuzhiyun 		return false;
706*4882a593Smuzhiyun 	return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun 
ata_id_hpa_enabled(const u16 * id)709*4882a593Smuzhiyun static inline bool ata_id_hpa_enabled(const u16 *id)
710*4882a593Smuzhiyun {
711*4882a593Smuzhiyun 	/* Yes children, word 83 valid bits cover word 82 data */
712*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
713*4882a593Smuzhiyun 		return false;
714*4882a593Smuzhiyun 	/* And 87 covers 85-87 */
715*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
716*4882a593Smuzhiyun 		return false;
717*4882a593Smuzhiyun 	/* Check command sets enabled as well as supported */
718*4882a593Smuzhiyun 	if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
719*4882a593Smuzhiyun 		return false;
720*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun 
ata_id_has_wcache(const u16 * id)723*4882a593Smuzhiyun static inline bool ata_id_has_wcache(const u16 *id)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	/* Yes children, word 83 valid bits cover word 82 data */
726*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
727*4882a593Smuzhiyun 		return false;
728*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun 
ata_id_has_pm(const u16 * id)731*4882a593Smuzhiyun static inline bool ata_id_has_pm(const u16 *id)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
734*4882a593Smuzhiyun 		return false;
735*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun 
ata_id_rahead_enabled(const u16 * id)738*4882a593Smuzhiyun static inline bool ata_id_rahead_enabled(const u16 *id)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
741*4882a593Smuzhiyun 		return false;
742*4882a593Smuzhiyun 	return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun 
ata_id_wcache_enabled(const u16 * id)745*4882a593Smuzhiyun static inline bool ata_id_wcache_enabled(const u16 *id)
746*4882a593Smuzhiyun {
747*4882a593Smuzhiyun 	if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
748*4882a593Smuzhiyun 		return false;
749*4882a593Smuzhiyun 	return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun 
ata_id_has_read_log_dma_ext(const u16 * id)752*4882a593Smuzhiyun static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
753*4882a593Smuzhiyun {
754*4882a593Smuzhiyun 	/* Word 86 must have bit 15 set */
755*4882a593Smuzhiyun 	if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
756*4882a593Smuzhiyun 		return false;
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	/* READ LOG DMA EXT support can be signaled either from word 119
759*4882a593Smuzhiyun 	 * or from word 120. The format is the same for both words: Bit
760*4882a593Smuzhiyun 	 * 15 must be cleared, bit 14 set and bit 3 set.
761*4882a593Smuzhiyun 	 */
762*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
763*4882a593Smuzhiyun 	    (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
764*4882a593Smuzhiyun 		return true;
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	return false;
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun 
ata_id_has_sense_reporting(const u16 * id)769*4882a593Smuzhiyun static inline bool ata_id_has_sense_reporting(const u16 *id)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun 	if (!(id[ATA_ID_CFS_ENABLE_2] & BIT(15)))
772*4882a593Smuzhiyun 		return false;
773*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_3] & (BIT(15) | BIT(14))) != BIT(14))
774*4882a593Smuzhiyun 		return false;
775*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_3] & BIT(6);
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun 
ata_id_sense_reporting_enabled(const u16 * id)778*4882a593Smuzhiyun static inline bool ata_id_sense_reporting_enabled(const u16 *id)
779*4882a593Smuzhiyun {
780*4882a593Smuzhiyun 	if (!ata_id_has_sense_reporting(id))
781*4882a593Smuzhiyun 		return false;
782*4882a593Smuzhiyun 	/* ata_id_has_sense_reporting() == true, word 86 must have bit 15 set */
783*4882a593Smuzhiyun 	if ((id[ATA_ID_COMMAND_SET_4] & (BIT(15) | BIT(14))) != BIT(14))
784*4882a593Smuzhiyun 		return false;
785*4882a593Smuzhiyun 	return id[ATA_ID_COMMAND_SET_4] & BIT(6);
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun /**
789*4882a593Smuzhiyun  *
790*4882a593Smuzhiyun  * Word: 206 - SCT Command Transport
791*4882a593Smuzhiyun  *    15:12 - Vendor Specific
792*4882a593Smuzhiyun  *     11:6 - Reserved
793*4882a593Smuzhiyun  *        5 - SCT Command Transport Data Tables supported
794*4882a593Smuzhiyun  *        4 - SCT Command Transport Features Control supported
795*4882a593Smuzhiyun  *        3 - SCT Command Transport Error Recovery Control supported
796*4882a593Smuzhiyun  *        2 - SCT Command Transport Write Same supported
797*4882a593Smuzhiyun  *        1 - SCT Command Transport Long Sector Access supported
798*4882a593Smuzhiyun  *        0 - SCT Command Transport supported
799*4882a593Smuzhiyun  */
ata_id_sct_data_tables(const u16 * id)800*4882a593Smuzhiyun static inline bool ata_id_sct_data_tables(const u16 *id)
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun 	return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
803*4882a593Smuzhiyun }
804*4882a593Smuzhiyun 
ata_id_sct_features_ctrl(const u16 * id)805*4882a593Smuzhiyun static inline bool ata_id_sct_features_ctrl(const u16 *id)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun 	return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun 
ata_id_sct_error_recovery_ctrl(const u16 * id)810*4882a593Smuzhiyun static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
811*4882a593Smuzhiyun {
812*4882a593Smuzhiyun 	return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun 
ata_id_sct_long_sector_access(const u16 * id)815*4882a593Smuzhiyun static inline bool ata_id_sct_long_sector_access(const u16 *id)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun 	return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun 
ata_id_sct_supported(const u16 * id)820*4882a593Smuzhiyun static inline bool ata_id_sct_supported(const u16 *id)
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun 	return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun /**
826*4882a593Smuzhiyun  *	ata_id_major_version	-	get ATA level of drive
827*4882a593Smuzhiyun  *	@id: Identify data
828*4882a593Smuzhiyun  *
829*4882a593Smuzhiyun  *	Caveats:
830*4882a593Smuzhiyun  *		ATA-1 considers identify optional
831*4882a593Smuzhiyun  *		ATA-2 introduces mandatory identify
832*4882a593Smuzhiyun  *		ATA-3 introduces word 80 and accurate reporting
833*4882a593Smuzhiyun  *
834*4882a593Smuzhiyun  *	The practical impact of this is that ata_id_major_version cannot
835*4882a593Smuzhiyun  *	reliably report on drives below ATA3.
836*4882a593Smuzhiyun  */
837*4882a593Smuzhiyun 
ata_id_major_version(const u16 * id)838*4882a593Smuzhiyun static inline unsigned int ata_id_major_version(const u16 *id)
839*4882a593Smuzhiyun {
840*4882a593Smuzhiyun 	unsigned int mver;
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
843*4882a593Smuzhiyun 		return 0;
844*4882a593Smuzhiyun 
845*4882a593Smuzhiyun 	for (mver = 14; mver >= 1; mver--)
846*4882a593Smuzhiyun 		if (id[ATA_ID_MAJOR_VER] & (1 << mver))
847*4882a593Smuzhiyun 			break;
848*4882a593Smuzhiyun 	return mver;
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun 
ata_id_is_sata(const u16 * id)851*4882a593Smuzhiyun static inline bool ata_id_is_sata(const u16 *id)
852*4882a593Smuzhiyun {
853*4882a593Smuzhiyun 	/*
854*4882a593Smuzhiyun 	 * See if word 93 is 0 AND drive is at least ATA-5 compatible
855*4882a593Smuzhiyun 	 * verifying that word 80 by casting it to a signed type --
856*4882a593Smuzhiyun 	 * this trick allows us to filter out the reserved values of
857*4882a593Smuzhiyun 	 * 0x0000 and 0xffff along with the earlier ATA revisions...
858*4882a593Smuzhiyun 	 */
859*4882a593Smuzhiyun 	if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
860*4882a593Smuzhiyun 		return true;
861*4882a593Smuzhiyun 	return false;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun 
ata_id_has_tpm(const u16 * id)864*4882a593Smuzhiyun static inline bool ata_id_has_tpm(const u16 *id)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun 	/* The TPM bits are only valid on ATA8 */
867*4882a593Smuzhiyun 	if (ata_id_major_version(id) < 8)
868*4882a593Smuzhiyun 		return false;
869*4882a593Smuzhiyun 	if ((id[48] & 0xC000) != 0x4000)
870*4882a593Smuzhiyun 		return false;
871*4882a593Smuzhiyun 	return id[48] & (1 << 0);
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun 
ata_id_has_dword_io(const u16 * id)874*4882a593Smuzhiyun static inline bool ata_id_has_dword_io(const u16 *id)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	/* ATA 8 reuses this flag for "trusted" computing */
877*4882a593Smuzhiyun 	if (ata_id_major_version(id) > 7)
878*4882a593Smuzhiyun 		return false;
879*4882a593Smuzhiyun 	return id[ATA_ID_DWORD_IO] & (1 << 0);
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun 
ata_id_has_trusted(const u16 * id)882*4882a593Smuzhiyun static inline bool ata_id_has_trusted(const u16 *id)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	if (ata_id_major_version(id) <= 7)
885*4882a593Smuzhiyun 		return false;
886*4882a593Smuzhiyun 	return id[ATA_ID_TRUSTED] & (1 << 0);
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun 
ata_id_has_unload(const u16 * id)889*4882a593Smuzhiyun static inline bool ata_id_has_unload(const u16 *id)
890*4882a593Smuzhiyun {
891*4882a593Smuzhiyun 	if (ata_id_major_version(id) >= 7 &&
892*4882a593Smuzhiyun 	    (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
893*4882a593Smuzhiyun 	    id[ATA_ID_CFSSE] & (1 << 13))
894*4882a593Smuzhiyun 		return true;
895*4882a593Smuzhiyun 	return false;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
ata_id_has_wwn(const u16 * id)898*4882a593Smuzhiyun static inline bool ata_id_has_wwn(const u16 *id)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun 	return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
ata_id_form_factor(const u16 * id)903*4882a593Smuzhiyun static inline int ata_id_form_factor(const u16 *id)
904*4882a593Smuzhiyun {
905*4882a593Smuzhiyun 	u16 val = id[168];
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
908*4882a593Smuzhiyun 		return 0;
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	val &= 0xf;
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	if (val > 5)
913*4882a593Smuzhiyun 		return 0;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	return val;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun 
ata_id_rotation_rate(const u16 * id)918*4882a593Smuzhiyun static inline int ata_id_rotation_rate(const u16 *id)
919*4882a593Smuzhiyun {
920*4882a593Smuzhiyun 	u16 val = id[217];
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
923*4882a593Smuzhiyun 		return 0;
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	if (val > 1 && val < 0x401)
926*4882a593Smuzhiyun 		return 0;
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	return val;
929*4882a593Smuzhiyun }
930*4882a593Smuzhiyun 
ata_id_has_ncq_send_and_recv(const u16 * id)931*4882a593Smuzhiyun static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
932*4882a593Smuzhiyun {
933*4882a593Smuzhiyun 	return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun 
ata_id_has_ncq_non_data(const u16 * id)936*4882a593Smuzhiyun static inline bool ata_id_has_ncq_non_data(const u16 *id)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun 	return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun 
ata_id_has_ncq_prio(const u16 * id)941*4882a593Smuzhiyun static inline bool ata_id_has_ncq_prio(const u16 *id)
942*4882a593Smuzhiyun {
943*4882a593Smuzhiyun 	return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun 
ata_id_has_trim(const u16 * id)946*4882a593Smuzhiyun static inline bool ata_id_has_trim(const u16 *id)
947*4882a593Smuzhiyun {
948*4882a593Smuzhiyun 	if (ata_id_major_version(id) >= 7 &&
949*4882a593Smuzhiyun 	    (id[ATA_ID_DATA_SET_MGMT] & 1))
950*4882a593Smuzhiyun 		return true;
951*4882a593Smuzhiyun 	return false;
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun 
ata_id_has_zero_after_trim(const u16 * id)954*4882a593Smuzhiyun static inline bool ata_id_has_zero_after_trim(const u16 *id)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	/* DSM supported, deterministic read, and read zero after trim set */
957*4882a593Smuzhiyun 	if (ata_id_has_trim(id) &&
958*4882a593Smuzhiyun 	    (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
959*4882a593Smuzhiyun 		return true;
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 	return false;
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun 
ata_id_current_chs_valid(const u16 * id)964*4882a593Smuzhiyun static inline bool ata_id_current_chs_valid(const u16 *id)
965*4882a593Smuzhiyun {
966*4882a593Smuzhiyun 	/* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
967*4882a593Smuzhiyun 	   has not been issued to the device then the values of
968*4882a593Smuzhiyun 	   id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
969*4882a593Smuzhiyun 	return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
970*4882a593Smuzhiyun 		id[ATA_ID_CUR_CYLS] &&  /* cylinders in current translation */
971*4882a593Smuzhiyun 		id[ATA_ID_CUR_HEADS] &&  /* heads in current translation */
972*4882a593Smuzhiyun 		id[ATA_ID_CUR_HEADS] <= 16 &&
973*4882a593Smuzhiyun 		id[ATA_ID_CUR_SECTORS];    /* sectors in current translation */
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun 
ata_id_is_cfa(const u16 * id)976*4882a593Smuzhiyun static inline bool ata_id_is_cfa(const u16 *id)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun 	if ((id[ATA_ID_CONFIG] == 0x848A) ||	/* Traditional CF */
979*4882a593Smuzhiyun 	    (id[ATA_ID_CONFIG] == 0x844A))	/* Delkin Devices CF */
980*4882a593Smuzhiyun 		return true;
981*4882a593Smuzhiyun 	/*
982*4882a593Smuzhiyun 	 * CF specs don't require specific value in the word 0 anymore and yet
983*4882a593Smuzhiyun 	 * they forbid to report the ATA version in the word 80 and require the
984*4882a593Smuzhiyun 	 * CFA feature set support to be indicated in the word 83 in this case.
985*4882a593Smuzhiyun 	 * Unfortunately, some cards only follow either of this requirements,
986*4882a593Smuzhiyun 	 * and while those that don't indicate CFA feature support need some
987*4882a593Smuzhiyun 	 * sort of quirk list, it seems impractical for the ones that do...
988*4882a593Smuzhiyun 	 */
989*4882a593Smuzhiyun 	return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun 
ata_id_is_ssd(const u16 * id)992*4882a593Smuzhiyun static inline bool ata_id_is_ssd(const u16 *id)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	return id[ATA_ID_ROT_SPEED] == 0x01;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun 
ata_id_zoned_cap(const u16 * id)997*4882a593Smuzhiyun static inline u8 ata_id_zoned_cap(const u16 *id)
998*4882a593Smuzhiyun {
999*4882a593Smuzhiyun 	return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
1000*4882a593Smuzhiyun }
1001*4882a593Smuzhiyun 
ata_id_pio_need_iordy(const u16 * id,const u8 pio)1002*4882a593Smuzhiyun static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
1003*4882a593Smuzhiyun {
1004*4882a593Smuzhiyun 	/* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
1005*4882a593Smuzhiyun 	if (pio > 4 && ata_id_is_cfa(id))
1006*4882a593Smuzhiyun 		return false;
1007*4882a593Smuzhiyun 	/* For PIO3 and higher it is mandatory. */
1008*4882a593Smuzhiyun 	if (pio > 2)
1009*4882a593Smuzhiyun 		return true;
1010*4882a593Smuzhiyun 	/* Turn it on when possible. */
1011*4882a593Smuzhiyun 	return ata_id_has_iordy(id);
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun 
ata_drive_40wire(const u16 * dev_id)1014*4882a593Smuzhiyun static inline bool ata_drive_40wire(const u16 *dev_id)
1015*4882a593Smuzhiyun {
1016*4882a593Smuzhiyun 	if (ata_id_is_sata(dev_id))
1017*4882a593Smuzhiyun 		return false;	/* SATA */
1018*4882a593Smuzhiyun 	if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
1019*4882a593Smuzhiyun 		return false;	/* 80 wire */
1020*4882a593Smuzhiyun 	return true;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun 
ata_drive_40wire_relaxed(const u16 * dev_id)1023*4882a593Smuzhiyun static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
1026*4882a593Smuzhiyun 		return false;	/* 80 wire */
1027*4882a593Smuzhiyun 	return true;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun 
atapi_cdb_len(const u16 * dev_id)1030*4882a593Smuzhiyun static inline int atapi_cdb_len(const u16 *dev_id)
1031*4882a593Smuzhiyun {
1032*4882a593Smuzhiyun 	u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
1033*4882a593Smuzhiyun 	switch (tmp) {
1034*4882a593Smuzhiyun 	case 0:		return 12;
1035*4882a593Smuzhiyun 	case 1:		return 16;
1036*4882a593Smuzhiyun 	default:	return -1;
1037*4882a593Smuzhiyun 	}
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun 
atapi_command_packet_set(const u16 * dev_id)1040*4882a593Smuzhiyun static inline int atapi_command_packet_set(const u16 *dev_id)
1041*4882a593Smuzhiyun {
1042*4882a593Smuzhiyun 	return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun 
atapi_id_dmadir(const u16 * dev_id)1045*4882a593Smuzhiyun static inline bool atapi_id_dmadir(const u16 *dev_id)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun 	return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun /*
1051*4882a593Smuzhiyun  * ata_id_is_lba_capacity_ok() performs a sanity check on
1052*4882a593Smuzhiyun  * the claimed LBA capacity value for the device.
1053*4882a593Smuzhiyun  *
1054*4882a593Smuzhiyun  * Returns 1 if LBA capacity looks sensible, 0 otherwise.
1055*4882a593Smuzhiyun  *
1056*4882a593Smuzhiyun  * It is called only once for each device.
1057*4882a593Smuzhiyun  */
ata_id_is_lba_capacity_ok(u16 * id)1058*4882a593Smuzhiyun static inline bool ata_id_is_lba_capacity_ok(u16 *id)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun 	unsigned long lba_sects, chs_sects, head, tail;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	/* No non-LBA info .. so valid! */
1063*4882a593Smuzhiyun 	if (id[ATA_ID_CYLS] == 0)
1064*4882a593Smuzhiyun 		return true;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 	/*
1069*4882a593Smuzhiyun 	 * The ATA spec tells large drives to return
1070*4882a593Smuzhiyun 	 * C/H/S = 16383/16/63 independent of their size.
1071*4882a593Smuzhiyun 	 * Some drives can be jumpered to use 15 heads instead of 16.
1072*4882a593Smuzhiyun 	 * Some drives can be jumpered to use 4092 cyls instead of 16383.
1073*4882a593Smuzhiyun 	 */
1074*4882a593Smuzhiyun 	if ((id[ATA_ID_CYLS] == 16383 ||
1075*4882a593Smuzhiyun 	     (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1076*4882a593Smuzhiyun 	    id[ATA_ID_SECTORS] == 63 &&
1077*4882a593Smuzhiyun 	    (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1078*4882a593Smuzhiyun 	    (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
1079*4882a593Smuzhiyun 		return true;
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 	chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 	/* perform a rough sanity check on lba_sects: within 10% is OK */
1084*4882a593Smuzhiyun 	if (lba_sects - chs_sects < chs_sects/10)
1085*4882a593Smuzhiyun 		return true;
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	/* some drives have the word order reversed */
1088*4882a593Smuzhiyun 	head = (lba_sects >> 16) & 0xffff;
1089*4882a593Smuzhiyun 	tail = lba_sects & 0xffff;
1090*4882a593Smuzhiyun 	lba_sects = head | (tail << 16);
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	if (lba_sects - chs_sects < chs_sects/10) {
1093*4882a593Smuzhiyun 		*(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1094*4882a593Smuzhiyun 		return true;	/* LBA capacity is (now) good */
1095*4882a593Smuzhiyun 	}
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun 	return false;	/* LBA capacity value may be bad */
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun 
ata_id_to_hd_driveid(u16 * id)1100*4882a593Smuzhiyun static inline void ata_id_to_hd_driveid(u16 *id)
1101*4882a593Smuzhiyun {
1102*4882a593Smuzhiyun #ifdef __BIG_ENDIAN
1103*4882a593Smuzhiyun 	/* accessed in struct hd_driveid as 8-bit values */
1104*4882a593Smuzhiyun 	id[ATA_ID_MAX_MULTSECT]	 = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1105*4882a593Smuzhiyun 	id[ATA_ID_CAPABILITY]	 = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1106*4882a593Smuzhiyun 	id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1107*4882a593Smuzhiyun 	id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1108*4882a593Smuzhiyun 	id[ATA_ID_MULTSECT]	 = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 	/* as 32-bit values */
1111*4882a593Smuzhiyun 	*(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1112*4882a593Smuzhiyun 	*(u32 *)&id[ATA_ID_SPG]		 = ata_id_u32(id, ATA_ID_SPG);
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	/* as 64-bit value */
1115*4882a593Smuzhiyun 	*(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1116*4882a593Smuzhiyun 		ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1117*4882a593Smuzhiyun #endif
1118*4882a593Smuzhiyun }
1119*4882a593Smuzhiyun 
ata_ok(u8 status)1120*4882a593Smuzhiyun static inline bool ata_ok(u8 status)
1121*4882a593Smuzhiyun {
1122*4882a593Smuzhiyun 	return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1123*4882a593Smuzhiyun 			== ATA_DRDY);
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun 
lba_28_ok(u64 block,u32 n_block)1126*4882a593Smuzhiyun static inline bool lba_28_ok(u64 block, u32 n_block)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun 	/* check the ending block number: must be LESS THAN 0x0fffffff */
1129*4882a593Smuzhiyun 	return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
1130*4882a593Smuzhiyun }
1131*4882a593Smuzhiyun 
lba_48_ok(u64 block,u32 n_block)1132*4882a593Smuzhiyun static inline bool lba_48_ok(u64 block, u32 n_block)
1133*4882a593Smuzhiyun {
1134*4882a593Smuzhiyun 	/* check the ending block number */
1135*4882a593Smuzhiyun 	return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun #define sata_pmp_gscr_vendor(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1139*4882a593Smuzhiyun #define sata_pmp_gscr_devid(gscr)	((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1140*4882a593Smuzhiyun #define sata_pmp_gscr_rev(gscr)		(((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1141*4882a593Smuzhiyun #define sata_pmp_gscr_ports(gscr)	((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun #endif /* __LINUX_ATA_H__ */
1144