1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * CCI cache coherent interconnect support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 ARM Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef __LINUX_ARM_CCI_H
9*4882a593Smuzhiyun #define __LINUX_ARM_CCI_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <asm/arm-cci.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun struct device_node;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #ifdef CONFIG_ARM_CCI
19*4882a593Smuzhiyun extern bool cci_probed(void);
20*4882a593Smuzhiyun #else
cci_probed(void)21*4882a593Smuzhiyun static inline bool cci_probed(void) { return false; }
22*4882a593Smuzhiyun #endif
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #ifdef CONFIG_ARM_CCI400_PORT_CTRL
25*4882a593Smuzhiyun extern int cci_ace_get_port(struct device_node *dn);
26*4882a593Smuzhiyun extern int cci_disable_port_by_cpu(u64 mpidr);
27*4882a593Smuzhiyun extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
28*4882a593Smuzhiyun extern int __cci_control_port_by_index(u32 port, bool enable);
29*4882a593Smuzhiyun #else
cci_ace_get_port(struct device_node * dn)30*4882a593Smuzhiyun static inline int cci_ace_get_port(struct device_node *dn)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun return -ENODEV;
33*4882a593Smuzhiyun }
cci_disable_port_by_cpu(u64 mpidr)34*4882a593Smuzhiyun static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
__cci_control_port_by_device(struct device_node * dn,bool enable)35*4882a593Smuzhiyun static inline int __cci_control_port_by_device(struct device_node *dn,
36*4882a593Smuzhiyun bool enable)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return -ENODEV;
39*4882a593Smuzhiyun }
__cci_control_port_by_index(u32 port,bool enable)40*4882a593Smuzhiyun static inline int __cci_control_port_by_index(u32 port, bool enable)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return -ENODEV;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define cci_disable_port_by_device(dev) \
47*4882a593Smuzhiyun __cci_control_port_by_device(dev, false)
48*4882a593Smuzhiyun #define cci_enable_port_by_device(dev) \
49*4882a593Smuzhiyun __cci_control_port_by_device(dev, true)
50*4882a593Smuzhiyun #define cci_disable_port_by_index(dev) \
51*4882a593Smuzhiyun __cci_control_port_by_index(dev, false)
52*4882a593Smuzhiyun #define cci_enable_port_by_index(dev) \
53*4882a593Smuzhiyun __cci_control_port_by_index(dev, true)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #endif
56