1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2015 Linaro Ltd.
4*4882a593Smuzhiyun * Author: Shannon Zhao <shannon.zhao@linaro.org>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __ASM_ARM_KVM_PMU_H
8*4882a593Smuzhiyun #define __ASM_ARM_KVM_PMU_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/perf_event.h>
11*4882a593Smuzhiyun #include <asm/perf_event.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
14*4882a593Smuzhiyun #define ARMV8_PMU_MAX_COUNTER_PAIRS ((ARMV8_PMU_MAX_COUNTERS + 1) >> 1)
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun DECLARE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
17*4882a593Smuzhiyun
kvm_arm_support_pmu_v3(void)18*4882a593Smuzhiyun static __always_inline bool kvm_arm_support_pmu_v3(void)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun return static_branch_likely(&kvm_arm_pmu_available);
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #ifdef CONFIG_HW_PERF_EVENTS
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct kvm_pmc {
26*4882a593Smuzhiyun u8 idx; /* index into the pmu->pmc array */
27*4882a593Smuzhiyun struct perf_event *perf_event;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun struct kvm_pmu {
31*4882a593Smuzhiyun int irq_num;
32*4882a593Smuzhiyun struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
33*4882a593Smuzhiyun DECLARE_BITMAP(chained, ARMV8_PMU_MAX_COUNTER_PAIRS);
34*4882a593Smuzhiyun bool created;
35*4882a593Smuzhiyun bool irq_level;
36*4882a593Smuzhiyun struct irq_work overflow_work;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS)
40*4882a593Smuzhiyun u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
41*4882a593Smuzhiyun void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
42*4882a593Smuzhiyun u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
43*4882a593Smuzhiyun u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1);
44*4882a593Smuzhiyun void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu);
45*4882a593Smuzhiyun void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu);
46*4882a593Smuzhiyun void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
47*4882a593Smuzhiyun void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
48*4882a593Smuzhiyun void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
49*4882a593Smuzhiyun void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
50*4882a593Smuzhiyun void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
51*4882a593Smuzhiyun bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
52*4882a593Smuzhiyun void kvm_pmu_update_run(struct kvm_vcpu *vcpu);
53*4882a593Smuzhiyun void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
54*4882a593Smuzhiyun void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
55*4882a593Smuzhiyun void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
56*4882a593Smuzhiyun u64 select_idx);
57*4882a593Smuzhiyun int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
58*4882a593Smuzhiyun struct kvm_device_attr *attr);
59*4882a593Smuzhiyun int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
60*4882a593Smuzhiyun struct kvm_device_attr *attr);
61*4882a593Smuzhiyun int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
62*4882a593Smuzhiyun struct kvm_device_attr *attr);
63*4882a593Smuzhiyun int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu);
64*4882a593Smuzhiyun #else
65*4882a593Smuzhiyun struct kvm_pmu {
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define kvm_arm_pmu_irq_initialized(v) (false)
kvm_pmu_get_counter_value(struct kvm_vcpu * vcpu,u64 select_idx)69*4882a593Smuzhiyun static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
70*4882a593Smuzhiyun u64 select_idx)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
kvm_pmu_set_counter_value(struct kvm_vcpu * vcpu,u64 select_idx,u64 val)74*4882a593Smuzhiyun static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
75*4882a593Smuzhiyun u64 select_idx, u64 val) {}
kvm_pmu_valid_counter_mask(struct kvm_vcpu * vcpu)76*4882a593Smuzhiyun static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
kvm_pmu_vcpu_init(struct kvm_vcpu * vcpu)80*4882a593Smuzhiyun static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {}
kvm_pmu_vcpu_reset(struct kvm_vcpu * vcpu)81*4882a593Smuzhiyun static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {}
kvm_pmu_vcpu_destroy(struct kvm_vcpu * vcpu)82*4882a593Smuzhiyun static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
kvm_pmu_disable_counter_mask(struct kvm_vcpu * vcpu,u64 val)83*4882a593Smuzhiyun static inline void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_enable_counter_mask(struct kvm_vcpu * vcpu,u64 val)84*4882a593Smuzhiyun static inline void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_flush_hwstate(struct kvm_vcpu * vcpu)85*4882a593Smuzhiyun static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
kvm_pmu_sync_hwstate(struct kvm_vcpu * vcpu)86*4882a593Smuzhiyun static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
kvm_pmu_should_notify_user(struct kvm_vcpu * vcpu)87*4882a593Smuzhiyun static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun return false;
90*4882a593Smuzhiyun }
kvm_pmu_update_run(struct kvm_vcpu * vcpu)91*4882a593Smuzhiyun static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {}
kvm_pmu_software_increment(struct kvm_vcpu * vcpu,u64 val)92*4882a593Smuzhiyun static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_handle_pmcr(struct kvm_vcpu * vcpu,u64 val)93*4882a593Smuzhiyun static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
kvm_pmu_set_counter_event_type(struct kvm_vcpu * vcpu,u64 data,u64 select_idx)94*4882a593Smuzhiyun static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
95*4882a593Smuzhiyun u64 data, u64 select_idx) {}
kvm_arm_pmu_v3_set_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)96*4882a593Smuzhiyun static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
97*4882a593Smuzhiyun struct kvm_device_attr *attr)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return -ENXIO;
100*4882a593Smuzhiyun }
kvm_arm_pmu_v3_get_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)101*4882a593Smuzhiyun static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
102*4882a593Smuzhiyun struct kvm_device_attr *attr)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun return -ENXIO;
105*4882a593Smuzhiyun }
kvm_arm_pmu_v3_has_attr(struct kvm_vcpu * vcpu,struct kvm_device_attr * attr)106*4882a593Smuzhiyun static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
107*4882a593Smuzhiyun struct kvm_device_attr *attr)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun return -ENXIO;
110*4882a593Smuzhiyun }
kvm_arm_pmu_v3_enable(struct kvm_vcpu * vcpu)111*4882a593Smuzhiyun static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun }
kvm_pmu_get_pmceid(struct kvm_vcpu * vcpu,bool pmceid1)115*4882a593Smuzhiyun static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun return 0;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun #endif
122