1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Header providing constants for Rockchip suspend bindings. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2023, Rockchip Electronics Co., Ltd. 6*4882a593Smuzhiyun * Author: Shengfei.Xu 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3562_H__ 10*4882a593Smuzhiyun #define __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3562_H__ 11*4882a593Smuzhiyun /******************************bits ops************************************/ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef BIT 14*4882a593Smuzhiyun #define BIT(nr) (1 << (nr)) 15*4882a593Smuzhiyun #endif 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define RKPM_SLP_NORMAL_MODE BIT(0) 18*4882a593Smuzhiyun #define RKPM_SLP_DEEP1_MODE BIT(1) 19*4882a593Smuzhiyun #define RKPM_SLP_DEEP2_MODE BIT(2) 20*4882a593Smuzhiyun #define RKPM_SLP_ULTRA_MODE BIT(3) 21*4882a593Smuzhiyun #define RKPM_SLP_FROM_UBOOT BIT(4) 22*4882a593Smuzhiyun #define RKPM_SLP_PMIC_LP BIT(5) 23*4882a593Smuzhiyun #define RKPM_SLP_HW_PLLS_OFF BIT(6) 24*4882a593Smuzhiyun #define RKPM_SLP_PMUALIVE_32K BIT(7) 25*4882a593Smuzhiyun #define RKPM_SLP_OSC_DIS BIT(8) 26*4882a593Smuzhiyun #define RKPM_SLP_32K_EXT BIT(9) 27*4882a593Smuzhiyun #define RKPM_SLP_32K_PVTM BIT(10) 28*4882a593Smuzhiyun /* the wake up source */ 29*4882a593Smuzhiyun #define RKPM_CPU0_WKUP_EN BIT(0) 30*4882a593Smuzhiyun #define RKPM_CPU1_WKUP_EN BIT(1) 31*4882a593Smuzhiyun #define RKPM_CPU2_WKUP_EN BIT(2) 32*4882a593Smuzhiyun #define RKPM_CPU3_WKUP_EN BIT(3) 33*4882a593Smuzhiyun #define RKPM_GPIO0_WKUP_EN BIT(4) 34*4882a593Smuzhiyun #define RKPM_GPIO0_EXP_WKUP_EN BIT(5) 35*4882a593Smuzhiyun #define RKPM_SDMMC0_WKUP_EN BIT(6) 36*4882a593Smuzhiyun #define RKPM_SDMMC1_WKUP_EN BIT(7) 37*4882a593Smuzhiyun #define RKPM_PCIE_WKUP_EN BIT(8) 38*4882a593Smuzhiyun #define RKPM_SDIO_WKUP_EN BIT(9) 39*4882a593Smuzhiyun #define RKPM_USB_WKUP_EN BIT(10) 40*4882a593Smuzhiyun #define RKPM_UART0_WKUP_EN BIT(11) 41*4882a593Smuzhiyun #define RKPM_PWM0_WKUP_EN BIT(12) 42*4882a593Smuzhiyun #define RKPM_PWM0_PWR_WKUP_EN BIT(13) 43*4882a593Smuzhiyun #define RKPM_TIMER_WKUP_EN BIT(14) 44*4882a593Smuzhiyun #define RKPM_HPTIMER_WKUP_EN BIT(15) 45*4882a593Smuzhiyun #define RKPM_SYS_WKUP_EN BIT(16) 46*4882a593Smuzhiyun #define RKPM_TIMEOUT_WKUP_EN BIT(17) 47*4882a593Smuzhiyun #endif 48