1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2 /* 3 * Header providing constants for Rockchip suspend bindings. 4 * 5 * Copyright (C) 2022, Rockchip Electronics Co., Ltd 6 * Author: XiaoDong.Huang 7 */ 8 9 #ifndef __DT_BINDINGS_RK3528_PM_H__ 10 #define __DT_BINDINGS_RK3528_PM_H__ 11 /******************************bits ops************************************/ 12 13 #ifndef BIT 14 #define BIT(nr) (1 << (nr)) 15 #endif 16 17 #define RKPM_SLP_ARMPD BIT(0) 18 #define RKPM_SLP_ARMOFF BIT(1) 19 #define RKPM_SLP_ARMOFF_DDRPD BIT(2) 20 #define RKPM_SLP_ARMOFF_LOGOFF BIT(3) 21 22 /* all plls except ddr's pll*/ 23 #define RKPM_SLP_PMU_HW_PLLS_PD BIT(8) 24 #define RKPM_SLP_PMU_PMUALIVE_32K BIT(9) 25 #define RKPM_SLP_PMU_DIS_OSC BIT(10) 26 27 #define RKPM_SLP_CLK_GT BIT(16) 28 #define RKPM_SLP_PMIC_LP BIT(17) 29 30 #define RKPM_SLP_32K_EXT BIT(24) 31 #define RKPM_SLP_TIME_OUT_WKUP BIT(25) 32 #define RKPM_SLP_PMU_DBG BIT(26) 33 34 /* the wake up source */ 35 #define RKPM_CPU0_WKUP_EN BIT(0) 36 #define RKPM_CPU1_WKUP_EN BIT(1) 37 #define RKPM_CPU2_WKUP_EN BIT(2) 38 #define RKPM_CPU3_WKUP_EN BIT(3) 39 #define RKPM_GPIO_WKUP_EN BIT(4) 40 #define RKPM_HDMI_HDP_WKUP_EN BIT(5) 41 #define RKPM_HDMI_CEC_WKUP_EN BIT(6) 42 #define RKPM_PWMIR_WKUP_EN BIT(7) 43 #define RKPM_GMAC_WKUP_EN BIT(8) 44 #define RKPM_TIMER_WKUP_EN BIT(9) 45 #define RKPM_USBDEV_WKUP_EN BIT(10) 46 #define RKPM_SYSINT_WKUP_EN BIT(11) 47 #define RKPM_TIME_OUT_WKUP_EN BIT(12) 48 49 /* the pwm regulator */ 50 #define RKPM_PWM0_M0_REGULATOR_EN BIT(0) 51 #define RKPM_PWM1_M0_REGULATOR_EN BIT(1) 52 #define RKPM_PWM2_M0_REGULATOR_EN BIT(2) 53 54 /* sleep pin */ 55 #define RKPM_SLEEP_PIN0_EN BIT(0) /* GPIO4_C2 */ 56 #define RKPM_SLEEP_PIN1_EN BIT(1) /* GPIO4_B6 */ 57 #define RKPM_SLEEP_PIN2_EN BIT(2) /* GPIO0_A0 */ 58 #define RKPM_SLEEP_PIN3_EN BIT(3) /* GPIO0_A1 */ 59 #define RKPM_SLEEP_PIN4_EN BIT(4) /* GPIO0_A2 */ 60 #define RKPM_SLEEP_PIN5_EN BIT(5) /* GPIO0_A3 */ 61 #define RKPM_SLEEP_PIN6_EN BIT(6) /* GPIO0_A4 */ 62 #define RKPM_SLEEP_PIN7_EN BIT(7) /* GPIO0_A5 */ 63 64 #define RKPM_SLEEP_PIN0_ACT_LOW BIT(0) /* GPIO4_C2 */ 65 #define RKPM_SLEEP_PIN1_ACT_LOW BIT(1) /* GPIO4_B6 */ 66 #define RKPM_SLEEP_PIN2_7_ACT_LOW 0xfc /* GPIO0_A0~5 */ 67 #endif 68