1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Header providing constants for Rockchip suspend bindings. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd 5*4882a593Smuzhiyun * Author: Tony.Xie 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 8*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by 9*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or 10*4882a593Smuzhiyun * (at your option) any later version. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 13*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*4882a593Smuzhiyun * GNU General Public License for more details. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifndef __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3399_H__ 19*4882a593Smuzhiyun #define __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3399_H__ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* the suspend mode */ 22*4882a593Smuzhiyun #define RKPM_SLP_WFI (1 << 0) 23*4882a593Smuzhiyun #define RKPM_SLP_ARMPD (1 << 1) 24*4882a593Smuzhiyun #define RKPM_SLP_PERILPPD (1 << 2) 25*4882a593Smuzhiyun #define RKPM_SLP_DDR_RET (1 << 3) 26*4882a593Smuzhiyun #define RKPM_SLP_PLLPD (1 << 4) 27*4882a593Smuzhiyun #define RKPM_SLP_OSC_DIS (1 << 5) 28*4882a593Smuzhiyun #define RKPM_SLP_CENTER_PD (1 << 6) 29*4882a593Smuzhiyun #define RKPM_SLP_AP_PWROFF (1 << 7) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* the wake up source */ 32*4882a593Smuzhiyun #define RKPM_CLUSTER_L_WKUP_EN (1 << 0) 33*4882a593Smuzhiyun #define RKPM_CLUSTER_B_WKUPB_EN (1 << 1) 34*4882a593Smuzhiyun #define RKPM_GPIO_WKUP_EN (1 << 2) 35*4882a593Smuzhiyun #define RKPM_SDIO_WKUP_EN (1 << 3) 36*4882a593Smuzhiyun #define RKPM_SDMMC_WKUP_EN (1 << 4) 37*4882a593Smuzhiyun #define RKPM_TIMER_WKUP_EN (1 << 6) 38*4882a593Smuzhiyun #define RKPM_USB_WKUP_EN (1 << 7) 39*4882a593Smuzhiyun #define RKPM_SFT_WKUP_EN (1 << 8) 40*4882a593Smuzhiyun #define RKPM_WDT_M0_WKUP_EN (1 << 9) 41*4882a593Smuzhiyun #define RKPM_TIME_OUT_WKUP_EN (1 << 10) 42*4882a593Smuzhiyun #define RKPM_PWM_WKUP_EN (1 << 11) 43*4882a593Smuzhiyun #define RKPM_PCIE_WKUP_EN (1 << 13) 44*4882a593Smuzhiyun #define RKPM_USB_LINESTATE_WKUP_EN (1 << 14) 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* the pwm regulator */ 47*4882a593Smuzhiyun #define PWM0_REGULATOR_EN (1 << 0) 48*4882a593Smuzhiyun #define PWM1_REGULATOR_EN (1 << 1) 49*4882a593Smuzhiyun #define PWM2_REGULATOR_EN (1 << 2) 50*4882a593Smuzhiyun #define PWM3A_REGULATOR_EN (1 << 3) 51*4882a593Smuzhiyun #define PWM3B_REGULATOR_EN (1 << 4) 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* the APIO voltage domain */ 54*4882a593Smuzhiyun #define RKPM_APIO0_SUSPEND (1 << 0) 55*4882a593Smuzhiyun #define RKPM_APIO1_SUSPEND (1 << 1) 56*4882a593Smuzhiyun #define RKPM_APIO2_SUSPEND (1 << 2) 57*4882a593Smuzhiyun #define RKPM_APIO3_SUSPEND (1 << 3) 58*4882a593Smuzhiyun #define RKPM_APIO4_SUSPEND (1 << 4) 59*4882a593Smuzhiyun #define RKPM_APIO5_SUSPEND (1 << 5) 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #endif 62