1 /* 2 * Header providing constants for Rockchip suspend bindings. 3 * 4 * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd 5 * Author: Power.xu 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #ifndef __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3288_H__ 19 #define __DT_BINDINGS_SUSPEND_ROCKCHIP_RK3288_H__ 20 21 /* the suspend mode */ 22 #define RKPM_CTR_PWR_DMNS (1 << 0) 23 #define RKPM_CTR_GTCLKS (1 << 1) 24 #define RKPM_CTR_PLLS (1 << 2) 25 #define RKPM_CTR_VOLTS (1 << 3) 26 #define RKPM_CTR_GPIOS (1 << 4) 27 #define RKPM_CTR_DDR (1 << 5) 28 #define RKPM_CTR_PMIC (1 << 6) 29 /* system clk is 24M,and div to min */ 30 #define RKPM_CTR_SYSCLK_DIV (1 << 7) 31 /* switch sysclk to 32k, need hardwart support, and div to min */ 32 #define RKPM_CTR_SYSCLK_32K (1 << 8) 33 /* switch sysclk to 32k,disable 24M OSC, 34 * need hardwart susport. and div to min 35 */ 36 #define RKPM_CTR_SYSCLK_OSC_DIS (1 << 9) 37 #define RKPM_CTR_BUS_IDLE (1 << 14) 38 #define RKPM_CTR_SRAM (1 << 15) 39 /*Low Power Function Selection*/ 40 #define RKPM_CTR_IDLESRAM_MD (1 << 16) 41 #define RKPM_CTR_IDLEAUTO_MD (1 << 17) 42 #define RKPM_CTR_ARMDP_LPMD (1 << 18) 43 #define RKPM_CTR_ARMOFF_LPMD (1 << 19) 44 #define RKPM_CTR_ARMLOGDP_LPMD (1 << 20) 45 #define RKPM_CTR_ARMOFF_LOGDP_LPMD (1 << 21) 46 #define RKPM_CTR_ARMLOGOFF_DLPMD (1 << 22) 47 48 /* the wake up source */ 49 #define RKPM_ARMINT_WKUP_EN (1 << 0) 50 #define RKPM_SDMMC_WKUP_EN (1 << 2) 51 #define RKPM_GPIO_WKUP_EN (1 << 3) 52 53 /* the pwm regulator */ 54 #define PWM0_REGULATOR_EN (1 << 0) 55 #define PWM1_REGULATOR_EN (1 << 1) 56 #define PWM2_REGULATOR_EN (1 << 2) 57 #define PWM3_REGULATOR_EN (1 << 3) 58 59 #endif 60