1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co. Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: Wyon Bi <bivvy.bi@rock-chips.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _RK628_RGU_H 9*4882a593Smuzhiyun #define _RK628_RGU_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define RGU_LOGIC 0 12*4882a593Smuzhiyun #define RGU_CRU 1 13*4882a593Smuzhiyun #define RGU_REGFILE 2 14*4882a593Smuzhiyun #define RGU_I2C2APB 3 15*4882a593Smuzhiyun #define RGU_EFUSE 4 16*4882a593Smuzhiyun #define RGU_ADAPTER 5 17*4882a593Smuzhiyun #define RGU_CLK_RX 6 18*4882a593Smuzhiyun #define RGU_BT1120DEC 7 19*4882a593Smuzhiyun #define RGU_VOP 8 20*4882a593Smuzhiyun #define RGU_GPIO0 9 21*4882a593Smuzhiyun #define RGU_GPIO1 10 22*4882a593Smuzhiyun #define RGU_GPIO2 11 23*4882a593Smuzhiyun #define RGU_GPIO3 12 24*4882a593Smuzhiyun #define RGU_GPIO_DB0 13 25*4882a593Smuzhiyun #define RGU_GPIO_DB1 14 26*4882a593Smuzhiyun #define RGU_GPIO_DB2 15 27*4882a593Smuzhiyun #define RGU_GPIO_DB3 16 28*4882a593Smuzhiyun #define RGU_RXPHY 17 29*4882a593Smuzhiyun #define RGU_HDMIRX 18 30*4882a593Smuzhiyun #define RGU_TXPHY_CON 19 31*4882a593Smuzhiyun #define RGU_HDMITX 20 32*4882a593Smuzhiyun #define RGU_GVIHOST 21 33*4882a593Smuzhiyun #define RGU_DSI0 22 34*4882a593Smuzhiyun #define RGU_DSI1 23 35*4882a593Smuzhiyun #define RGU_CSI 24 36*4882a593Smuzhiyun #define RGU_TXDATA 25 37*4882a593Smuzhiyun #define RGU_DECODER 26 38*4882a593Smuzhiyun #define RGU_ENCODER 27 39*4882a593Smuzhiyun #define RGU_HDMIRX_PON 28 40*4882a593Smuzhiyun #define RGU_TXBYTEHS 29 41*4882a593Smuzhiyun #define RGU_TXESC 30 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #endif 44