1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H 8*4882a593Smuzhiyun #define _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define CLKC_RESET_L2_CACHE_SOFT_RESET 0 11*4882a593Smuzhiyun #define CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET 1 12*4882a593Smuzhiyun #define CLKC_RESET_SCU_SOFT_RESET 2 13*4882a593Smuzhiyun #define CLKC_RESET_CPU0_SOFT_RESET 3 14*4882a593Smuzhiyun #define CLKC_RESET_CPU1_SOFT_RESET 4 15*4882a593Smuzhiyun #define CLKC_RESET_CPU2_SOFT_RESET 5 16*4882a593Smuzhiyun #define CLKC_RESET_CPU3_SOFT_RESET 6 17*4882a593Smuzhiyun #define CLKC_RESET_A5_GLOBAL_RESET 7 18*4882a593Smuzhiyun #define CLKC_RESET_A5_AXI_SOFT_RESET 8 19*4882a593Smuzhiyun #define CLKC_RESET_A5_ABP_SOFT_RESET 9 20*4882a593Smuzhiyun #define CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SOFT_RESET 10 21*4882a593Smuzhiyun #define CLKC_RESET_VID_CLK_CNTL_SOFT_RESET 11 22*4882a593Smuzhiyun #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_POST 12 23*4882a593Smuzhiyun #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_PRE 13 24*4882a593Smuzhiyun #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_POST 14 25*4882a593Smuzhiyun #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PRE 15 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif /* _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H */ 28