xref: /OK3568_Linux_fs/kernel/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2019 BayLibre, SAS.
4*4882a593Smuzhiyun  * Author: Jerome Brunet <jbrunet@baylibre.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
9*4882a593Smuzhiyun #define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define AUD_RESET_PDM		0
12*4882a593Smuzhiyun #define AUD_RESET_TDMIN_A	1
13*4882a593Smuzhiyun #define AUD_RESET_TDMIN_B	2
14*4882a593Smuzhiyun #define AUD_RESET_TDMIN_C	3
15*4882a593Smuzhiyun #define AUD_RESET_TDMIN_LB	4
16*4882a593Smuzhiyun #define AUD_RESET_LOOPBACK	5
17*4882a593Smuzhiyun #define AUD_RESET_TODDR_A	6
18*4882a593Smuzhiyun #define AUD_RESET_TODDR_B	7
19*4882a593Smuzhiyun #define AUD_RESET_TODDR_C	8
20*4882a593Smuzhiyun #define AUD_RESET_FRDDR_A	9
21*4882a593Smuzhiyun #define AUD_RESET_FRDDR_B	10
22*4882a593Smuzhiyun #define AUD_RESET_FRDDR_C	11
23*4882a593Smuzhiyun #define AUD_RESET_TDMOUT_A	12
24*4882a593Smuzhiyun #define AUD_RESET_TDMOUT_B	13
25*4882a593Smuzhiyun #define AUD_RESET_TDMOUT_C	14
26*4882a593Smuzhiyun #define AUD_RESET_SPDIFOUT	15
27*4882a593Smuzhiyun #define AUD_RESET_SPDIFOUT_B	16
28*4882a593Smuzhiyun #define AUD_RESET_SPDIFIN	17
29*4882a593Smuzhiyun #define AUD_RESET_EQDRC		18
30*4882a593Smuzhiyun #define AUD_RESET_RESAMPLE	19
31*4882a593Smuzhiyun #define AUD_RESET_DDRARB	20
32*4882a593Smuzhiyun #define AUD_RESET_POWDET	21
33*4882a593Smuzhiyun #define AUD_RESET_TORAM		22
34*4882a593Smuzhiyun #define AUD_RESET_TOACODEC	23
35*4882a593Smuzhiyun #define AUD_RESET_TOHDMITX	24
36*4882a593Smuzhiyun #define AUD_RESET_CLKTREE	25
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* SM1 added resets */
39*4882a593Smuzhiyun #define AUD_RESET_RESAMPLE_B	26
40*4882a593Smuzhiyun #define AUD_RESET_TOVAD		27
41*4882a593Smuzhiyun #define AUD_RESET_LOCKER	28
42*4882a593Smuzhiyun #define AUD_RESET_SPDIFIN_LB	29
43*4882a593Smuzhiyun #define AUD_RESET_FRATV		30
44*4882a593Smuzhiyun #define AUD_RESET_FRHDMIRX	31
45*4882a593Smuzhiyun #define AUD_RESET_FRDDR_D	32
46*4882a593Smuzhiyun #define AUD_RESET_TODDR_D	33
47*4882a593Smuzhiyun #define AUD_RESET_LOOPBACK_B	34
48*4882a593Smuzhiyun #define AUD_RESET_EARCTX	35
49*4882a593Smuzhiyun #define AUD_RESET_EARCRX	36
50*4882a593Smuzhiyun #define AUD_RESET_FRDDR_E	37
51*4882a593Smuzhiyun #define AUD_RESET_TODDR_E	38
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #endif
54