1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2*4882a593Smuzhiyun // 3*4882a593Smuzhiyun // Device Tree binding constants for Actions Semi S700 Reset Management Unit 4*4882a593Smuzhiyun // 5*4882a593Smuzhiyun // Copyright (c) 2018 Linaro Ltd. 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H 8*4882a593Smuzhiyun #define __DT_BINDINGS_ACTIONS_S700_RESET_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define RESET_AUDIO 0 11*4882a593Smuzhiyun #define RESET_CSI 1 12*4882a593Smuzhiyun #define RESET_DE 2 13*4882a593Smuzhiyun #define RESET_DSI 3 14*4882a593Smuzhiyun #define RESET_GPIO 4 15*4882a593Smuzhiyun #define RESET_I2C0 5 16*4882a593Smuzhiyun #define RESET_I2C1 6 17*4882a593Smuzhiyun #define RESET_I2C2 7 18*4882a593Smuzhiyun #define RESET_I2C3 8 19*4882a593Smuzhiyun #define RESET_KEY 9 20*4882a593Smuzhiyun #define RESET_LCD0 10 21*4882a593Smuzhiyun #define RESET_SI 11 22*4882a593Smuzhiyun #define RESET_SPI0 12 23*4882a593Smuzhiyun #define RESET_SPI1 13 24*4882a593Smuzhiyun #define RESET_SPI2 14 25*4882a593Smuzhiyun #define RESET_SPI3 15 26*4882a593Smuzhiyun #define RESET_UART0 16 27*4882a593Smuzhiyun #define RESET_UART1 17 28*4882a593Smuzhiyun #define RESET_UART2 18 29*4882a593Smuzhiyun #define RESET_UART3 19 30*4882a593Smuzhiyun #define RESET_UART4 20 31*4882a593Smuzhiyun #define RESET_UART5 21 32*4882a593Smuzhiyun #define RESET_UART6 22 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ 35