1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2*4882a593Smuzhiyun #ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__ 3*4882a593Smuzhiyun #define __DT_BINDINGS_POWER_RK3328_POWER_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /** 6*4882a593Smuzhiyun * RK3328 idle id Summary. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #define RK3328_PD_CORE 0 9*4882a593Smuzhiyun #define RK3328_PD_GPU 1 10*4882a593Smuzhiyun #define RK3328_PD_BUS 2 11*4882a593Smuzhiyun #define RK3328_PD_MSCH 3 12*4882a593Smuzhiyun #define RK3328_PD_PERI 4 13*4882a593Smuzhiyun #define RK3328_PD_VIDEO 5 14*4882a593Smuzhiyun #define RK3328_PD_HEVC 6 15*4882a593Smuzhiyun #define RK3328_PD_SYS 7 16*4882a593Smuzhiyun #define RK3328_PD_VPU 8 17*4882a593Smuzhiyun #define RK3328_PD_VIO 9 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #endif 20