1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2*4882a593Smuzhiyun #ifndef __DT_BINDINGS_POWER_RK3128_POWER_H__ 3*4882a593Smuzhiyun #define __DT_BINDINGS_POWER_RK3128_POWER_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* VD_CORE */ 6*4882a593Smuzhiyun #define RK3128_PD_CORE 0 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* VD_LOGIC */ 9*4882a593Smuzhiyun #define RK3128_PD_VIO 1 10*4882a593Smuzhiyun #define RK3128_PD_VIDEO 2 11*4882a593Smuzhiyun #define RK3128_PD_GPU 3 12*4882a593Smuzhiyun #define RK3128_PD_MSCH 4 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #endif 15