1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Header providing constants for Rockchip pinctrl bindings. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2013 MundoReader S.L. 6*4882a593Smuzhiyun * Author: Heiko Stuebner <heiko@sntech.de> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __DT_BINDINGS_ROCKCHIP_PINCTRL_H__ 10*4882a593Smuzhiyun #define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define RK_PA0 0 13*4882a593Smuzhiyun #define RK_PA1 1 14*4882a593Smuzhiyun #define RK_PA2 2 15*4882a593Smuzhiyun #define RK_PA3 3 16*4882a593Smuzhiyun #define RK_PA4 4 17*4882a593Smuzhiyun #define RK_PA5 5 18*4882a593Smuzhiyun #define RK_PA6 6 19*4882a593Smuzhiyun #define RK_PA7 7 20*4882a593Smuzhiyun #define RK_PB0 8 21*4882a593Smuzhiyun #define RK_PB1 9 22*4882a593Smuzhiyun #define RK_PB2 10 23*4882a593Smuzhiyun #define RK_PB3 11 24*4882a593Smuzhiyun #define RK_PB4 12 25*4882a593Smuzhiyun #define RK_PB5 13 26*4882a593Smuzhiyun #define RK_PB6 14 27*4882a593Smuzhiyun #define RK_PB7 15 28*4882a593Smuzhiyun #define RK_PC0 16 29*4882a593Smuzhiyun #define RK_PC1 17 30*4882a593Smuzhiyun #define RK_PC2 18 31*4882a593Smuzhiyun #define RK_PC3 19 32*4882a593Smuzhiyun #define RK_PC4 20 33*4882a593Smuzhiyun #define RK_PC5 21 34*4882a593Smuzhiyun #define RK_PC6 22 35*4882a593Smuzhiyun #define RK_PC7 23 36*4882a593Smuzhiyun #define RK_PD0 24 37*4882a593Smuzhiyun #define RK_PD1 25 38*4882a593Smuzhiyun #define RK_PD2 26 39*4882a593Smuzhiyun #define RK_PD3 27 40*4882a593Smuzhiyun #define RK_PD4 28 41*4882a593Smuzhiyun #define RK_PD5 29 42*4882a593Smuzhiyun #define RK_PD6 30 43*4882a593Smuzhiyun #define RK_PD7 31 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define RK_FUNC_GPIO 0 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define EXTIO_GPIO_P00 0 48*4882a593Smuzhiyun #define EXTIO_GPIO_P01 1 49*4882a593Smuzhiyun #define EXTIO_GPIO_P02 2 50*4882a593Smuzhiyun #define EXTIO_GPIO_P03 3 51*4882a593Smuzhiyun #define EXTIO_GPIO_P04 4 52*4882a593Smuzhiyun #define EXTIO_GPIO_P05 5 53*4882a593Smuzhiyun #define EXTIO_GPIO_P06 6 54*4882a593Smuzhiyun #define EXTIO_GPIO_P07 7 55*4882a593Smuzhiyun #define EXTIO_GPIO_P10 8 56*4882a593Smuzhiyun #define EXTIO_GPIO_P11 9 57*4882a593Smuzhiyun #define EXTIO_GPIO_P12 10 58*4882a593Smuzhiyun #define EXTIO_GPIO_P13 11 59*4882a593Smuzhiyun #define EXTIO_GPIO_P14 12 60*4882a593Smuzhiyun #define EXTIO_GPIO_P15 13 61*4882a593Smuzhiyun #define EXTIO_GPIO_P16 14 62*4882a593Smuzhiyun #define EXTIO_GPIO_P17 15 63*4882a593Smuzhiyun #define EXTIO_GPIO_P20 16 64*4882a593Smuzhiyun #define EXTIO_GPIO_P21 17 65*4882a593Smuzhiyun #define EXTIO_GPIO_P22 18 66*4882a593Smuzhiyun #define EXTIO_GPIO_P23 19 67*4882a593Smuzhiyun #define EXTIO_GPIO_P24 20 68*4882a593Smuzhiyun #define EXTIO_GPIO_P25 21 69*4882a593Smuzhiyun #define EXTIO_GPIO_P26 22 70*4882a593Smuzhiyun #define EXTIO_GPIO_P27 23 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #endif 73