1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Defines macros and constants for Renesas RZ/A1 pin controller pin 4*4882a593Smuzhiyun * muxing functions. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H 7*4882a593Smuzhiyun #define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define RZA1_PINS_PER_PORT 16 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Create the pin index from its bank and position numbers and store in 13*4882a593Smuzhiyun * the upper 16 bits the alternate function identifier 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun #define RZA1_PINMUX(b, p, f) ((b) * RZA1_PINS_PER_PORT + (p) | (f << 16)) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */ 18