1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __DTS_MT6397_PINFUNC_H 3*4882a593Smuzhiyun #define __DTS_MT6397_PINFUNC_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <dt-bindings/pinctrl/mt65xx.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define MT6397_PIN_0_INT__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) 8*4882a593Smuzhiyun #define MT6397_PIN_0_INT__FUNC_INT (MTK_PIN_NO(0) | 1) 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define MT6397_PIN_1_SRCVOLTEN__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) 11*4882a593Smuzhiyun #define MT6397_PIN_1_SRCVOLTEN__FUNC_SRCVOLTEN (MTK_PIN_NO(1) | 1) 12*4882a593Smuzhiyun #define MT6397_PIN_1_SRCVOLTEN__FUNC_TEST_CK1 (MTK_PIN_NO(1) | 6) 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define MT6397_PIN_2_SRCLKEN_PERI__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) 15*4882a593Smuzhiyun #define MT6397_PIN_2_SRCLKEN_PERI__FUNC_SRCLKEN_PERI (MTK_PIN_NO(2) | 1) 16*4882a593Smuzhiyun #define MT6397_PIN_2_SRCLKEN_PERI__FUNC_TEST_CK2 (MTK_PIN_NO(2) | 6) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define MT6397_PIN_3_RTC_32K1V8__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 19*4882a593Smuzhiyun #define MT6397_PIN_3_RTC_32K1V8__FUNC_RTC_32K1V8 (MTK_PIN_NO(3) | 1) 20*4882a593Smuzhiyun #define MT6397_PIN_3_RTC_32K1V8__FUNC_TEST_CK3 (MTK_PIN_NO(3) | 6) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define MT6397_PIN_4_WRAP_EVENT__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) 23*4882a593Smuzhiyun #define MT6397_PIN_4_WRAP_EVENT__FUNC_WRAP_EVENT (MTK_PIN_NO(4) | 1) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define MT6397_PIN_5_SPI_CLK__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) 26*4882a593Smuzhiyun #define MT6397_PIN_5_SPI_CLK__FUNC_SPI_CLK (MTK_PIN_NO(5) | 1) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define MT6397_PIN_6_SPI_CSN__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) 29*4882a593Smuzhiyun #define MT6397_PIN_6_SPI_CSN__FUNC_SPI_CSN (MTK_PIN_NO(6) | 1) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define MT6397_PIN_7_SPI_MOSI__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 32*4882a593Smuzhiyun #define MT6397_PIN_7_SPI_MOSI__FUNC_SPI_MOSI (MTK_PIN_NO(7) | 1) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define MT6397_PIN_8_SPI_MISO__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) 35*4882a593Smuzhiyun #define MT6397_PIN_8_SPI_MISO__FUNC_SPI_MISO (MTK_PIN_NO(8) | 1) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) 38*4882a593Smuzhiyun #define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_AUD_CLK (MTK_PIN_NO(9) | 1) 39*4882a593Smuzhiyun #define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_TEST_IN0 (MTK_PIN_NO(9) | 6) 40*4882a593Smuzhiyun #define MT6397_PIN_9_AUD_CLK_MOSI__FUNC_TEST_OUT0 (MTK_PIN_NO(9) | 7) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define MT6397_PIN_10_AUD_DAT_MISO__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) 43*4882a593Smuzhiyun #define MT6397_PIN_10_AUD_DAT_MISO__FUNC_AUD_MISO (MTK_PIN_NO(10) | 1) 44*4882a593Smuzhiyun #define MT6397_PIN_10_AUD_DAT_MISO__FUNC_TEST_IN1 (MTK_PIN_NO(10) | 6) 45*4882a593Smuzhiyun #define MT6397_PIN_10_AUD_DAT_MISO__FUNC_TEST_OUT1 (MTK_PIN_NO(10) | 7) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) 48*4882a593Smuzhiyun #define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_AUD_MOSI (MTK_PIN_NO(11) | 1) 49*4882a593Smuzhiyun #define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_TEST_IN2 (MTK_PIN_NO(11) | 6) 50*4882a593Smuzhiyun #define MT6397_PIN_11_AUD_DAT_MOSI__FUNC_TEST_OUT2 (MTK_PIN_NO(11) | 7) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) 53*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_COL0_USBDL (MTK_PIN_NO(12) | 1) 54*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_EINT10_1X (MTK_PIN_NO(12) | 2) 55*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_PWM1_3X (MTK_PIN_NO(12) | 3) 56*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_TEST_IN3 (MTK_PIN_NO(12) | 6) 57*4882a593Smuzhiyun #define MT6397_PIN_12_COL0__FUNC_TEST_OUT3 (MTK_PIN_NO(12) | 7) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) 60*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_COL1 (MTK_PIN_NO(13) | 1) 61*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_EINT11_1X (MTK_PIN_NO(13) | 2) 62*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_SCL0_2X (MTK_PIN_NO(13) | 3) 63*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_TEST_IN4 (MTK_PIN_NO(13) | 6) 64*4882a593Smuzhiyun #define MT6397_PIN_13_COL1__FUNC_TEST_OUT4 (MTK_PIN_NO(13) | 7) 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) 67*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_COL2 (MTK_PIN_NO(14) | 1) 68*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_EINT12_1X (MTK_PIN_NO(14) | 2) 69*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_SDA0_2X (MTK_PIN_NO(14) | 3) 70*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_TEST_IN5 (MTK_PIN_NO(14) | 6) 71*4882a593Smuzhiyun #define MT6397_PIN_14_COL2__FUNC_TEST_OUT5 (MTK_PIN_NO(14) | 7) 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) 74*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_COL3 (MTK_PIN_NO(15) | 1) 75*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_EINT13_1X (MTK_PIN_NO(15) | 2) 76*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_SCL1_2X (MTK_PIN_NO(15) | 3) 77*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_TEST_IN6 (MTK_PIN_NO(15) | 6) 78*4882a593Smuzhiyun #define MT6397_PIN_15_COL3__FUNC_TEST_OUT6 (MTK_PIN_NO(15) | 7) 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) 81*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_COL4 (MTK_PIN_NO(16) | 1) 82*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_EINT14_1X (MTK_PIN_NO(16) | 2) 83*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_SDA1_2X (MTK_PIN_NO(16) | 3) 84*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_TEST_IN7 (MTK_PIN_NO(16) | 6) 85*4882a593Smuzhiyun #define MT6397_PIN_16_COL4__FUNC_TEST_OUT7 (MTK_PIN_NO(16) | 7) 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) 88*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_COL5 (MTK_PIN_NO(17) | 1) 89*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_EINT15_1X (MTK_PIN_NO(17) | 2) 90*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_SCL2_2X (MTK_PIN_NO(17) | 3) 91*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_TEST_IN8 (MTK_PIN_NO(17) | 6) 92*4882a593Smuzhiyun #define MT6397_PIN_17_COL5__FUNC_TEST_OUT8 (MTK_PIN_NO(17) | 7) 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) 95*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_COL6 (MTK_PIN_NO(18) | 1) 96*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_EINT16_1X (MTK_PIN_NO(18) | 2) 97*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_SDA2_2X (MTK_PIN_NO(18) | 3) 98*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_GPIO32K_0 (MTK_PIN_NO(18) | 4) 99*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_GPIO26M_0 (MTK_PIN_NO(18) | 5) 100*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_TEST_IN9 (MTK_PIN_NO(18) | 6) 101*4882a593Smuzhiyun #define MT6397_PIN_18_COL6__FUNC_TEST_OUT9 (MTK_PIN_NO(18) | 7) 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) 104*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_COL7 (MTK_PIN_NO(19) | 1) 105*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_EINT17_1X (MTK_PIN_NO(19) | 2) 106*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_PWM2_3X (MTK_PIN_NO(19) | 3) 107*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_GPIO32K_1 (MTK_PIN_NO(19) | 4) 108*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_GPIO26M_1 (MTK_PIN_NO(19) | 5) 109*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_TEST_IN10 (MTK_PIN_NO(19) | 6) 110*4882a593Smuzhiyun #define MT6397_PIN_19_COL7__FUNC_TEST_OUT10 (MTK_PIN_NO(19) | 7) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) 113*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_ROW0 (MTK_PIN_NO(20) | 1) 114*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_EINT18_1X (MTK_PIN_NO(20) | 2) 115*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_SCL0_3X (MTK_PIN_NO(20) | 3) 116*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_TEST_IN11 (MTK_PIN_NO(20) | 6) 117*4882a593Smuzhiyun #define MT6397_PIN_20_ROW0__FUNC_TEST_OUT11 (MTK_PIN_NO(20) | 7) 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) 120*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_ROW1 (MTK_PIN_NO(21) | 1) 121*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_EINT19_1X (MTK_PIN_NO(21) | 2) 122*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_SDA0_3X (MTK_PIN_NO(21) | 3) 123*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_AUD_TSTCK (MTK_PIN_NO(21) | 4) 124*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_TEST_IN12 (MTK_PIN_NO(21) | 6) 125*4882a593Smuzhiyun #define MT6397_PIN_21_ROW1__FUNC_TEST_OUT12 (MTK_PIN_NO(21) | 7) 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) 128*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_ROW2 (MTK_PIN_NO(22) | 1) 129*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_EINT20_1X (MTK_PIN_NO(22) | 2) 130*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_SCL1_3X (MTK_PIN_NO(22) | 3) 131*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_TEST_IN13 (MTK_PIN_NO(22) | 6) 132*4882a593Smuzhiyun #define MT6397_PIN_22_ROW2__FUNC_TEST_OUT13 (MTK_PIN_NO(22) | 7) 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) 135*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_ROW3 (MTK_PIN_NO(23) | 1) 136*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_EINT21_1X (MTK_PIN_NO(23) | 2) 137*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_SDA1_3X (MTK_PIN_NO(23) | 3) 138*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_TEST_IN14 (MTK_PIN_NO(23) | 6) 139*4882a593Smuzhiyun #define MT6397_PIN_23_ROW3__FUNC_TEST_OUT14 (MTK_PIN_NO(23) | 7) 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) 142*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_ROW4 (MTK_PIN_NO(24) | 1) 143*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_EINT22_1X (MTK_PIN_NO(24) | 2) 144*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_SCL2_3X (MTK_PIN_NO(24) | 3) 145*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_TEST_IN15 (MTK_PIN_NO(24) | 6) 146*4882a593Smuzhiyun #define MT6397_PIN_24_ROW4__FUNC_TEST_OUT15 (MTK_PIN_NO(24) | 7) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) 149*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_ROW5 (MTK_PIN_NO(25) | 1) 150*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_EINT23_1X (MTK_PIN_NO(25) | 2) 151*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_SDA2_3X (MTK_PIN_NO(25) | 3) 152*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_TEST_IN16 (MTK_PIN_NO(25) | 6) 153*4882a593Smuzhiyun #define MT6397_PIN_25_ROW5__FUNC_TEST_OUT16 (MTK_PIN_NO(25) | 7) 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) 156*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_ROW6 (MTK_PIN_NO(26) | 1) 157*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_EINT24_1X (MTK_PIN_NO(26) | 2) 158*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_PWM3_3X (MTK_PIN_NO(26) | 3) 159*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_GPIO32K_2 (MTK_PIN_NO(26) | 4) 160*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_GPIO26M_2 (MTK_PIN_NO(26) | 5) 161*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_TEST_IN17 (MTK_PIN_NO(26) | 6) 162*4882a593Smuzhiyun #define MT6397_PIN_26_ROW6__FUNC_TEST_OUT17 (MTK_PIN_NO(26) | 7) 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) 165*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_ROW7 (MTK_PIN_NO(27) | 1) 166*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_EINT3_1X (MTK_PIN_NO(27) | 2) 167*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_CBUS (MTK_PIN_NO(27) | 3) 168*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_GPIO32K_3 (MTK_PIN_NO(27) | 4) 169*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_GPIO26M_3 (MTK_PIN_NO(27) | 5) 170*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_TEST_IN18 (MTK_PIN_NO(27) | 6) 171*4882a593Smuzhiyun #define MT6397_PIN_27_ROW7__FUNC_TEST_OUT18 (MTK_PIN_NO(27) | 7) 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) 174*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_PWM1 (MTK_PIN_NO(28) | 1) 175*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_EINT4_1X (MTK_PIN_NO(28) | 2) 176*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_GPIO32K_4 (MTK_PIN_NO(28) | 4) 177*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_GPIO26M_4 (MTK_PIN_NO(28) | 5) 178*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_TEST_IN19 (MTK_PIN_NO(28) | 6) 179*4882a593Smuzhiyun #define MT6397_PIN_28_PWM1__FUNC_TEST_OUT19 (MTK_PIN_NO(28) | 7) 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) 182*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_PWM2 (MTK_PIN_NO(29) | 1) 183*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_EINT5_1X (MTK_PIN_NO(29) | 2) 184*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_GPIO32K_5 (MTK_PIN_NO(29) | 4) 185*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_GPIO26M_5 (MTK_PIN_NO(29) | 5) 186*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_TEST_IN20 (MTK_PIN_NO(29) | 6) 187*4882a593Smuzhiyun #define MT6397_PIN_29_PWM2__FUNC_TEST_OUT20 (MTK_PIN_NO(29) | 7) 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) 190*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_PWM3 (MTK_PIN_NO(30) | 1) 191*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_EINT6_1X (MTK_PIN_NO(30) | 2) 192*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_COL0 (MTK_PIN_NO(30) | 3) 193*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_GPIO32K_6 (MTK_PIN_NO(30) | 4) 194*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_GPIO26M_6 (MTK_PIN_NO(30) | 5) 195*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_TEST_IN21 (MTK_PIN_NO(30) | 6) 196*4882a593Smuzhiyun #define MT6397_PIN_30_PWM3__FUNC_TEST_OUT21 (MTK_PIN_NO(30) | 7) 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) 199*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_SCL0 (MTK_PIN_NO(31) | 1) 200*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_EINT7_1X (MTK_PIN_NO(31) | 2) 201*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_PWM1_2X (MTK_PIN_NO(31) | 3) 202*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_TEST_IN22 (MTK_PIN_NO(31) | 6) 203*4882a593Smuzhiyun #define MT6397_PIN_31_SCL0__FUNC_TEST_OUT22 (MTK_PIN_NO(31) | 7) 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun #define MT6397_PIN_32_SDA0__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) 206*4882a593Smuzhiyun #define MT6397_PIN_32_SDA0__FUNC_SDA0 (MTK_PIN_NO(32) | 1) 207*4882a593Smuzhiyun #define MT6397_PIN_32_SDA0__FUNC_EINT8_1X (MTK_PIN_NO(32) | 2) 208*4882a593Smuzhiyun #define MT6397_PIN_32_SDA0__FUNC_TEST_IN23 (MTK_PIN_NO(32) | 6) 209*4882a593Smuzhiyun #define MT6397_PIN_32_SDA0__FUNC_TEST_OUT23 (MTK_PIN_NO(32) | 7) 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) 212*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_SCL1 (MTK_PIN_NO(33) | 1) 213*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_EINT9_1X (MTK_PIN_NO(33) | 2) 214*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_PWM2_2X (MTK_PIN_NO(33) | 3) 215*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_TEST_IN24 (MTK_PIN_NO(33) | 6) 216*4882a593Smuzhiyun #define MT6397_PIN_33_SCL1__FUNC_TEST_OUT24 (MTK_PIN_NO(33) | 7) 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun #define MT6397_PIN_34_SDA1__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) 219*4882a593Smuzhiyun #define MT6397_PIN_34_SDA1__FUNC_SDA1 (MTK_PIN_NO(34) | 1) 220*4882a593Smuzhiyun #define MT6397_PIN_34_SDA1__FUNC_EINT0_1X (MTK_PIN_NO(34) | 2) 221*4882a593Smuzhiyun #define MT6397_PIN_34_SDA1__FUNC_TEST_IN25 (MTK_PIN_NO(34) | 6) 222*4882a593Smuzhiyun #define MT6397_PIN_34_SDA1__FUNC_TEST_OUT25 (MTK_PIN_NO(34) | 7) 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) 225*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_SCL2 (MTK_PIN_NO(35) | 1) 226*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_EINT1_1X (MTK_PIN_NO(35) | 2) 227*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_PWM3_2X (MTK_PIN_NO(35) | 3) 228*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_TEST_IN26 (MTK_PIN_NO(35) | 6) 229*4882a593Smuzhiyun #define MT6397_PIN_35_SCL2__FUNC_TEST_OUT26 (MTK_PIN_NO(35) | 7) 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun #define MT6397_PIN_36_SDA2__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) 232*4882a593Smuzhiyun #define MT6397_PIN_36_SDA2__FUNC_SDA2 (MTK_PIN_NO(36) | 1) 233*4882a593Smuzhiyun #define MT6397_PIN_36_SDA2__FUNC_EINT2_1X (MTK_PIN_NO(36) | 2) 234*4882a593Smuzhiyun #define MT6397_PIN_36_SDA2__FUNC_TEST_IN27 (MTK_PIN_NO(36) | 6) 235*4882a593Smuzhiyun #define MT6397_PIN_36_SDA2__FUNC_TEST_OUT27 (MTK_PIN_NO(36) | 7) 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun #define MT6397_PIN_37_HDMISD__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) 238*4882a593Smuzhiyun #define MT6397_PIN_37_HDMISD__FUNC_HDMISD (MTK_PIN_NO(37) | 1) 239*4882a593Smuzhiyun #define MT6397_PIN_37_HDMISD__FUNC_TEST_IN28 (MTK_PIN_NO(37) | 6) 240*4882a593Smuzhiyun #define MT6397_PIN_37_HDMISD__FUNC_TEST_OUT28 (MTK_PIN_NO(37) | 7) 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun #define MT6397_PIN_38_HDMISCK__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) 243*4882a593Smuzhiyun #define MT6397_PIN_38_HDMISCK__FUNC_HDMISCK (MTK_PIN_NO(38) | 1) 244*4882a593Smuzhiyun #define MT6397_PIN_38_HDMISCK__FUNC_TEST_IN29 (MTK_PIN_NO(38) | 6) 245*4882a593Smuzhiyun #define MT6397_PIN_38_HDMISCK__FUNC_TEST_OUT29 (MTK_PIN_NO(38) | 7) 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun #define MT6397_PIN_39_HTPLG__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) 248*4882a593Smuzhiyun #define MT6397_PIN_39_HTPLG__FUNC_HTPLG (MTK_PIN_NO(39) | 1) 249*4882a593Smuzhiyun #define MT6397_PIN_39_HTPLG__FUNC_TEST_IN30 (MTK_PIN_NO(39) | 6) 250*4882a593Smuzhiyun #define MT6397_PIN_39_HTPLG__FUNC_TEST_OUT30 (MTK_PIN_NO(39) | 7) 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun #define MT6397_PIN_40_CEC__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) 253*4882a593Smuzhiyun #define MT6397_PIN_40_CEC__FUNC_CEC (MTK_PIN_NO(40) | 1) 254*4882a593Smuzhiyun #define MT6397_PIN_40_CEC__FUNC_TEST_IN31 (MTK_PIN_NO(40) | 6) 255*4882a593Smuzhiyun #define MT6397_PIN_40_CEC__FUNC_TEST_OUT31 (MTK_PIN_NO(40) | 7) 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun #endif /* __DTS_MT6397_PINFUNC_H */ 258