1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * This header provides constants for most at91 pinctrl bindings. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __DT_BINDINGS_AT91_PINCTRL_H__ 9*4882a593Smuzhiyun #define __DT_BINDINGS_AT91_PINCTRL_H__ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define AT91_PINCTRL_NONE (0 << 0) 12*4882a593Smuzhiyun #define AT91_PINCTRL_PULL_UP (1 << 0) 13*4882a593Smuzhiyun #define AT91_PINCTRL_MULTI_DRIVE (1 << 1) 14*4882a593Smuzhiyun #define AT91_PINCTRL_DEGLITCH (1 << 2) 15*4882a593Smuzhiyun #define AT91_PINCTRL_PULL_DOWN (1 << 3) 16*4882a593Smuzhiyun #define AT91_PINCTRL_DIS_SCHMIT (1 << 4) 17*4882a593Smuzhiyun #define AT91_PINCTRL_OUTPUT (1 << 7) 18*4882a593Smuzhiyun #define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8) 19*4882a593Smuzhiyun #define AT91_PINCTRL_SLEWRATE (1 << 9) 20*4882a593Smuzhiyun #define AT91_PINCTRL_DEBOUNCE (1 << 16) 21*4882a593Smuzhiyun #define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5) 26*4882a593Smuzhiyun #define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5) 27*4882a593Smuzhiyun #define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5) 28*4882a593Smuzhiyun #define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9) 31*4882a593Smuzhiyun #define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define AT91_PIOA 0 34*4882a593Smuzhiyun #define AT91_PIOB 1 35*4882a593Smuzhiyun #define AT91_PIOC 2 36*4882a593Smuzhiyun #define AT91_PIOD 3 37*4882a593Smuzhiyun #define AT91_PIOE 4 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define AT91_PERIPH_GPIO 0 40*4882a593Smuzhiyun #define AT91_PERIPH_A 1 41*4882a593Smuzhiyun #define AT91_PERIPH_B 2 42*4882a593Smuzhiyun #define AT91_PERIPH_C 3 43*4882a593Smuzhiyun #define AT91_PERIPH_D 4 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define ATMEL_PIO_DRVSTR_LO 1 46*4882a593Smuzhiyun #define ATMEL_PIO_DRVSTR_ME 2 47*4882a593Smuzhiyun #define ATMEL_PIO_DRVSTR_HI 3 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */ 50