1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2 /* 3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H 7 #define _DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H 8 9 #include <dt-bindings/memory/rockchip-dram.h> 10 11 #define PHY_DDR4_DS_ODT_DISABLE (0x0) 12 #define PHY_DDR4_DS_ODT_556ohm (0x1) 13 #define PHY_DDR4_DS_ODT_279ohm (0x2) 14 #define PHY_DDR4_DS_ODT_185ohm (0x3) 15 #define PHY_DDR4_DS_ODT_139ohm (0x4) 16 #define PHY_DDR4_DS_ODT_111ohm (0x5) 17 #define PHY_DDR4_DS_ODT_93ohm (0x6) 18 #define PHY_DDR4_DS_ODT_79ohm (0x7) 19 #define PHY_DDR4_DS_ODT_69ohm (0x8) 20 #define PHY_DDR4_DS_ODT_62ohm (0x9) 21 #define PHY_DDR4_DS_ODT_55ohm (0xa) 22 #define PHY_DDR4_DS_ODT_50ohm (0xb) 23 #define PHY_DDR4_DS_ODT_46ohm (0xc) 24 #define PHY_DDR4_DS_ODT_42ohm (0xd) 25 #define PHY_DDR4_DS_ODT_39ohm (0xe) 26 #define PHY_DDR4_DS_ODT_37ohm (0xf) 27 #define PHY_DDR4_DS_ODT_34ohm (0x18) 28 #define PHY_DDR4_DS_ODT_32ohm (0x19) 29 #define PHY_DDR4_DS_ODT_31ohm (0x1a) 30 #define PHY_DDR4_DS_ODT_29ohm (0x1b) 31 #define PHY_DDR4_DS_ODT_27ohm (0x1c) 32 #define PHY_DDR4_DS_ODT_26ohm (0x1d) 33 #define PHY_DDR4_DS_ODT_25ohm (0x1e) 34 #define PHY_DDR4_DS_ODT_24ohm (0x1f) 35 36 #define PHY_LPDDR4_DS_ODT_DISABLE (0x0) 37 #define PHY_LPDDR4_DS_ODT_576ohm (0x1) 38 #define PHY_LPDDR4_DS_ODT_289ohm (0x2) 39 #define PHY_LPDDR4_DS_ODT_192ohm (0x3) 40 #define PHY_LPDDR4_DS_ODT_144ohm (0x4) 41 #define PHY_LPDDR4_DS_ODT_115ohm (0x5) 42 #define PHY_LPDDR4_DS_ODT_96ohm (0x6) 43 #define PHY_LPDDR4_DS_ODT_82ohm (0x7) 44 #define PHY_LPDDR4_DS_ODT_72ohm (0x8) 45 #define PHY_LPDDR4_DS_ODT_64ohm (0x9) 46 #define PHY_LPDDR4_DS_ODT_57ohm (0xa) 47 #define PHY_LPDDR4_DS_ODT_52ohm (0xb) 48 #define PHY_LPDDR4_DS_ODT_48ohm (0xc) 49 #define PHY_LPDDR4_DS_ODT_44ohm (0xd) 50 #define PHY_LPDDR4_DS_ODT_41ohm (0xe) 51 #define PHY_LPDDR4_DS_ODT_38ohm (0xf) 52 #define PHY_LPDDR4_DS_ODT_36ohm (0x18) 53 #define PHY_LPDDR4_DS_ODT_34ohm (0x19) 54 #define PHY_LPDDR4_DS_ODT_32ohm (0x1a) 55 #define PHY_LPDDR4_DS_ODT_30ohm (0x1b) 56 #define PHY_LPDDR4_DS_ODT_28ohm (0x1c) 57 #define PHY_LPDDR4_DS_ODT_27ohm (0x1d) 58 #define PHY_LPDDR4_DS_ODT_26ohm (0x1e) 59 #define PHY_LPDDR4_DS_ODT_25ohm (0x1f) 60 61 #define PHY_LPDDR4X_DS_ODT_UP_DISABLE (0x0) 62 #define PHY_LPDDR4X_DS_ODT_UP_646ohm (0x1) 63 #define PHY_LPDDR4X_DS_ODT_UP_323ohm (0x2) 64 #define PHY_LPDDR4X_DS_ODT_UP_215ohm (0x3) 65 #define PHY_LPDDR4X_DS_ODT_UP_162ohm (0x4) 66 #define PHY_LPDDR4X_DS_ODT_UP_129ohm (0x5) 67 #define PHY_LPDDR4X_DS_ODT_UP_108ohm (0x6) 68 #define PHY_LPDDR4X_DS_ODT_UP_92ohm (0x7) 69 #define PHY_LPDDR4X_DS_ODT_UP_81ohm (0x8) 70 #define PHY_LPDDR4X_DS_ODT_UP_72ohm (0x9) 71 #define PHY_LPDDR4X_DS_ODT_UP_65ohm (0xa) 72 #define PHY_LPDDR4X_DS_ODT_UP_59ohm (0xb) 73 #define PHY_LPDDR4X_DS_ODT_UP_54ohm (0xc) 74 #define PHY_LPDDR4X_DS_ODT_UP_50ohm (0xd) 75 #define PHY_LPDDR4X_DS_ODT_UP_46ohm (0xe) 76 #define PHY_LPDDR4X_DS_ODT_UP_43ohm (0xf) 77 #define PHY_LPDDR4X_DS_ODT_UP_40ohm (0x18) 78 #define PHY_LPDDR4X_DS_ODT_UP_38ohm (0x19) 79 #define PHY_LPDDR4X_DS_ODT_UP_36ohm (0x1a) 80 #define PHY_LPDDR4X_DS_ODT_UP_34ohm (0x1b) 81 #define PHY_LPDDR4X_DS_ODT_UP_32ohm (0x1c) 82 #define PHY_LPDDR4X_DS_ODT_UP_31ohm (0x1d) 83 #define PHY_LPDDR4X_DS_ODT_UP_29ohm (0x1e) 84 #define PHY_LPDDR4X_DS_ODT_UP_28ohm (0x1f) 85 86 #define PHY_LPDDR4X_DS_ODT_DOWN_DISABLE (0x0) 87 #define PHY_LPDDR4X_DS_ODT_DOWN_513ohm (0x1) 88 #define PHY_LPDDR4X_DS_ODT_DOWN_259ohm (0x2) 89 #define PHY_LPDDR4X_DS_ODT_DOWN_172ohm (0x3) 90 #define PHY_LPDDR4X_DS_ODT_DOWN_130ohm (0x4) 91 #define PHY_LPDDR4X_DS_ODT_DOWN_104hm (0x5) 92 #define PHY_LPDDR4X_DS_ODT_DOWN_86hm (0x6) 93 #define PHY_LPDDR4X_DS_ODT_DOWN_74ohm (0x7) 94 #define PHY_LPDDR4X_DS_ODT_DOWN_65ohm (0x8) 95 #define PHY_LPDDR4X_DS_ODT_DOWN_58ohm (0x9) 96 #define PHY_LPDDR4X_DS_ODT_DOWN_52ohm (0xa) 97 #define PHY_LPDDR4X_DS_ODT_DOWN_47ohm (0xb) 98 #define PHY_LPDDR4X_DS_ODT_DOWN_43ohm (0xc) 99 #define PHY_LPDDR4X_DS_ODT_DOWN_40ohm (0xd) 100 #define PHY_LPDDR4X_DS_ODT_DOWN_37ohm (0xe) 101 #define PHY_LPDDR4X_DS_ODT_DOWN_35ohm (0xf) 102 #define PHY_LPDDR4X_DS_ODT_DOWN_32ohm (0x18) 103 #define PHY_LPDDR4X_DS_ODT_DOWN_30ohm (0x19) 104 #define PHY_LPDDR4X_DS_ODT_DOWN_29ohm (0x1a) 105 #define PHY_LPDDR4X_DS_ODT_DOWN_27ohm (0x1b) 106 #define PHY_LPDDR4X_DS_ODT_DOWN_26ohm (0x1c) 107 #define PHY_LPDDR4X_DS_ODT_DOWN_25ohm (0x1d) 108 #define PHY_LPDDR4X_DS_ODT_DOWN_24ohm (0x1e) 109 #define PHY_LPDDR4X_DS_ODT_DOWN_23ohm (0x1f) 110 111 #endif /* _DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H */ 112